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INTERNATIONAL STANDARD ISO/IEC 11518-8 First edition 1999-02 High-Performance Parallel Interface Mapping to Asynchronous Transfer Mode (HIPPI-ATM) ISO/IEC 1999 All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from the publisher. ISO/IEC Copyright Office Case postale 56 CH-1211 Genève 20 Switzerland PRICE CODE K For price, see current catalogue

Contents 11518-8 ISO/IEC:1999 (E) Page Foreword... iii 1 Scope...1 2 Normative references...1 3 Definitions and conventions...1 3.1 Definitions...1 3.2 Editorial conventions...1 4 HIPPI format and conversion...2 4.1 HIPPI format...2 4.2 HIPPI Converter...2 4.3 H-PDU format...3 4.4 Connection and routing control...6 4.5 Flow control...7 4.6 Error control...10 4.7 Bit and byte ordering...11 4.8 Inverse multiplexing (striping)...11 4.9 Loop back...12 5 ATM Specifics...13 5.1 ATM format...13 5.2 ATM routing and connection control...13 5.3 ATM error control...13 Tables Table 1 Mapping HIPPI_Burst_Data to 800 Mbit/s HIPPI-PH bursts...5 Table 2 Mapping HIPPI_Burst_Data to 1600 Mbit/s HIPPI-PH bursts...5 Table 3 Summary of V and H bit actions...6 Table 4 Byte assignments...11 Figures Figure 1 HIPPI logical framing hierarchy...2 Figure 2 System with generic HIPPI Converters...3 Figure 3 H-PDU format with the HB_Header carrying credit information...4 Figure 4 Credit parameters and credit control flow...9 Figure 5 Near-end HIPPI Converter in local loop back...12 Figure 6 AAL 5 CPCS-PDU for HIPPI-ATM Converter...14 Figure 7 System with HIPPI-ATM Converters...14 Figure 8 Mapping two 800 Mbit/s HIPPI-PH full bursts to an H-PDU and ATM cells...15 Figure 9 Mapping a 1600 Mbit/s HIPPI-PH full burst to an H-PDU and ATM cells...16 Figure A.1 System with HIPPI-ATM IP Router...18 Figure A.2 HIPPI to AAL 5 IP packet mapping...18 i

11518-8 ISO/IEC:1999 (E) Annexes A HIPPI-ATM IP Router...17 A.1 Overview...17 A.2 IP packet mapping...18 B Bibliography...19 ii

High-Performance Parallel Interface Mapping to Asynchronous Transfer Mode (HIPPI-ATM) 11518-8 ISO/IEC:1999 (E) Foreword ISO (the International Organization for Standardization) and IEC (the International Electrotechnical Commission) form the specialized system for worldwide standardization. National bodies that are members of ISO or IEC participate in the development of International Standards through technical committees established by the respective organization to deal with particular fields of technical activity. ISO and IEC technical committees collaborate in fields of mutual interest. Other international organizations, governmental and non-governmental, in liaison with ISO and IEC, also take part in the work. In the field of information technology, ISO and IEC have established a joint technical committee, ISO/IEC JTC 1. Draft International Standards adopted by the joint technical committee are circulated to national bodies for voting. Publication as an International Standard requires approval by at least 75% of the national bodies casting a vote. International Standard ISO/IEC 11518-8 was prepared by Joint Technical Committee ISO/IEC JTC 1, Information technology, Subcommittee SC 25, Interconnection of information technology equipment. ISO/IEC 11518 consists of the following parts, under the general title High-Performance Parallel Interface: Part 1: Mechanical, electrical, and signalling protocol specification (HIPPI-PH) Part 2: Framing Protocol (HIPPI-FP) Part 3: Encapsulation of ISO/IEC 8802-2 (IEEE Std 802.2) Logical Link Control Protocol Data Units (HIPPI-LE) Part 4: Mapping of HIPPI to IPI device generic command sets (HIPPI-IPI) Part 5: Memory Interface (HIPPI-MI) Part 6: Physical Switch Control (HIPPI-SC) Part 9: Serial Specification (HIPPI-Serial) Annexes A and B of this part of ISO/IEC 11518 are for information only. iii

11518-8 ISO/IEC:1999 (E) High-Performance Parallel Interface 1 Scope This part of ISO/IEC 11518 defines the frame formats and protocol definitions for encapsulation of High-Performance Parallel Interface Mechanical, Electrical, and Signalling Protocol Specification (HIPPI-PH) packets for transfer over Asynchronous Transfer Mode (ATM) equipment, i.e., tunnelling through ATM, or for use with other media. An informative annex describes an IP Router for use between HIPPI and ATM systems. ITU-T Recommendation I.361-1993, B-ISDN ATM Layer Specification ITU-T Recommendation I.363-1993, B-ISDN ATM Adaptation Layer (AAL) Specification Physical layer specifications for transporting ATM cells are not specified. Both the 800 Mbit/s (100 MByte/s) and 1600 Mbit/s (200 MByte/s) HIPPI-PH options are supported. Transfers from an 800 Mbit/s HIPPI-PH, through HIPPI-ATM, to a 1600 Mbit/s HIPPI-PH, and vice versa, are supported. 2 Normative references The following standards contain provisions which, through reference in this text, constitute provisions of this International Standard. At the time of publication, the editions indicated were valid. All standards are subject to revision, and parties to agreements based on this International standard are encouraged to investigate the possibility of applying the most recent editions of the standards listed below. ISO/IEC 11518-1:1995, High-Performance Parallel Interface - Part 1: Mechanical, electrical, and signalling protocol specification (HIPPI-PH) 1