Turning C into Object Code Code in files p1.c p2.c Compile with command: gcc -O p1.c p2.c -o p Use optimizations (-O) Put resulting binary in file p

Similar documents
Machine-Level Programming I: Introduction Jan. 30, 2001

Assembly Programmer s View Lecture 4A Machine-Level Programming I: Introduction

CISC 360. Machine-Level Programming I: Introduction Sept. 18, 2008

Assembly I: Basic Operations. Computer Systems Laboratory Sungkyunkwan University

ASSEMBLY I: BASIC OPERATIONS. Jo, Heeseung

Assembly I: Basic Operations. Jo, Heeseung

Page # CISC 360. Machine-Level Programming I: Introduction Sept. 18, IA32 Processors. X86 Evolution: Programmerʼs View.

X86 Assembly -Data II:1

MACHINE-LEVEL PROGRAMMING I: BASICS COMPUTER ARCHITECTURE AND ORGANIZATION

The Hardware/Software Interface CSE351 Spring 2015

Meet & Greet! Come hang out with your TAs and Fellow Students (& eat free insomnia cookies) When : TODAY!! 5-6 pm Where : 3rd Floor Atrium, CIT

The course that gives CMU its Zip! Machine-Level Programming I: Introduction Sept. 10, 2002

CS241 Computer Organization Spring 2015 IA

Instruction Set Architectures

! Starting in 1978 with ! Added more features as time goes on. ! Still support old features, although obsolete

Machine Programming 1: Introduction

Machine-Level Programming Introduction

Machine- level Programming

Giving credit where credit is due

Machine Level Programming I: Basics

Carnegie Mellon. 5 th Lecture, Jan. 31, Instructors: Todd C. Mowry & Anthony Rowe

IA32 Processors The course that gives CMU its Zip! Machine-Level Programming I: Introduction Sept. 10, X86 Evolution: Programmer s View

Instruction Set Architectures

Today: Machine Programming I: Basics

Software. Hardware. x86 basics. ISA View. a brief history of x86 10/6/15. Program, Application. Programming Language. Compiler/Interpreter

MACHINE-LEVEL PROGRAMMING I: BASICS

Last Time: Floating Point. Intel x86 Processors. Lecture 4: Machine Basics Computer Architecture and Systems Programming ( )

Machine Level Programming I: Basics. Credits to Randy Bryant & Dave O Hallaron

Systems I. Machine-Level Programming I: Introduction

Machine-Level Programming Introduction

Today: Machine Programming I: Basics. Machine Level Programming I: Basics. Intel x86 Processors. Intel x86 Evolution: Milestones

Sungkyunkwan University

Machine Programming I: Basics

Assembly level Programming. 198:211 Computer Architecture. (recall) Von Neumann Architecture. Simplified hardware view. Lecture 10 Fall 2012

CS241 Computer Organization Spring Addresses & Pointers

Machine-level Representation of Programs. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University

Computer Systems Architecture I. CSE 560M Lecture 3 Prof. Patrick Crowley

+ Machine Level Programming: x86-64 History

Assembly I: Basic Operations. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University

Machine-Level Programming II: Control and Arithmetic

Questions about last homework? (Would more feedback be useful?) New reading assignment up: due next Monday

CS429: Computer Organization and Architecture

Machine-Level Programming II: Arithmetic & Control. Complete Memory Addressing Modes

Machine-Level Programming II: Arithmetic & Control /18-243: Introduction to Computer Systems 6th Lecture, 5 June 2012

1 /* file cpuid2.s */ 4.asciz "The processor Vendor ID is %s \n" 5.section.bss. 6.lcomm buffer, section.text. 8.globl _start.

Credits to Randy Bryant & Dave O Hallaron

Chapter 3 Machine-Level Programming I: Basics. Bryant and O Hallaron, Computer Systems: A Programmer s Perspective, Third Edition

Credits and Disclaimers

Process Layout and Function Calls

Machine-Level Programming I Introduction

Process Layout, Function Calls, and the Heap

x86 Programming I CSE 351 Winter

Machine-Level Programming I: Introduction

Machine-Level Programming I: Basics

Machine- Level Programming I: Basics

Today: Machine Programming I: Basics. Machine-Level Programming I: Basics. Intel x86 Processors. Intel x86 Evolution: Milestones

Machine-Level Programming I Introduction

Machine- Level Programming: Basics

CS165 Computer Security. Understanding low-level program execution Oct 1 st, 2015

Today: Machine Programming I: Basics. Machine-Level Programming I: Basics. Intel x86 Processors. Intel x86 Evolution: Milestones

Credits and Disclaimers

CSE2421 FINAL EXAM SPRING Name KEY. Instructions: Signature

Machine Level Programming: Basics

x86 64 Programming I CSE 351 Autumn 2018 Instructor: Justin Hsia

Machine Level Programming: Basics

CS 31: Intro to Systems ISAs and Assembly. Martin Gagné Swarthmore College February 7, 2017

Ge-ng at things on the chip you can t easily reach from C

Machine Level Programming II: Arithmetic &Control

Homework. In-line Assembly Code Machine Language Program Efficiency Tricks Reading PAL, pp 3-6, Practice Exam 1

x86 Programming I CSE 351 Autumn 2016 Instructor: Justin Hsia

CS 31: Intro to Systems ISAs and Assembly. Kevin Webb Swarthmore College February 9, 2016

CS 31: Intro to Systems ISAs and Assembly. Kevin Webb Swarthmore College September 25, 2018

Machine-level Programming (3)

X86 Addressing Modes Chapter 3" Review: Instructions to Recognize"

Assembly III: Procedures. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University

ASSEMBLY III: PROCEDURES. Jo, Heeseung

Machine- Level Programming II: Arithme c & Control

Assembly III: Procedures. Jo, Heeseung

Machine- Level Programming II: Arithme6c & Control

Machine-Level Programming I: Basics

Access. Young W. Lim Sat. Young W. Lim Access Sat 1 / 19

The Hardware/Software Interface CSE351 Spring 2015

CS241 Computer Organization Spring Introduction to Assembly

administrivia today start assembly probably won t finish all these slides Assignment 4 due tomorrow any questions?

CS213. Machine-Level Programming III: Procedures

Bryant and O Hallaron, Computer Systems: A Programmer s Perspective, Third Edition. Carnegie Mellon

Instruction Set Architecture

Machine Programming 3: Procedures

Instruction Set Architecture

Access. Young W. Lim Fri. Young W. Lim Access Fri 1 / 18

Three Kinds of Instruc;ons

CS , Fall 2001 Exam 1

Sungkyunkwan University

Binghamton University. CS-220 Spring x86 Assembler. Computer Systems: Sections

The course that gives CMU its Zip! Machine-Level Programming III: Procedures Sept. 17, 2002

Compila(on, Disassembly, and Profiling

IA32 Stack. Stack BoDom. Region of memory managed with stack discipline Grows toward lower addresses. Register %esp contains lowest stack address

Handout #2: Machine-Level Programs

Y86 Processor State. Instruction Example. Encoding Registers. Lecture 7A. Computer Architecture I Instruction Set Architecture Assembly Language View

MACHINE LEVEL PROGRAMMING 1: BASICS

Transcription:

Turning C into Object Code Code in files p1.c p2.c Compile with command: gcc -O p1.c p2.c -o p Use optimizations (-O) Put resulting binary in file p text C program (p1.c p2.c) Compiler (gcc -S) text Asm program (p1.s p2.s) binary binary Assembler (gcc or as) Object program (p1.o p2.o) Linker (gcc or ld) Executable program (p) Static libraries (.a)

Compiling Into Assembly C Code int sum(int x, int y) { int t = x+y; return t; } Generated IA32 Assembly sum: pushl %ebp movl %esp,%ebp movl 12(%ebp),%eax addl 8(%ebp),%eax movl %ebp,%esp popl %ebp ret Obtain with command gcc -O -S code.c Produces file code.s Some compilers use single instruction leave

Assembly Characteristics: Data Types Integer data of 1, 2, or 4 bytes Data values Addresses (untyped pointers) Floating point data of 4, 8, or 10 bytes No aggregate types such as arrays or structures Just contiguously allocated bytes in memory

Assembly Characteristics: Operations Perform arithmetic function on register or memory data Transfer data between memory and register Load data from memory into register Store register data into memory Transfer control Unconditional jumps to/from procedures Conditional branches

Object Code Code for sum 0x401040 <sum>: 0x55 0x89 0xe5 0x8b 0x45 0x0c 0x03 0x45 0x08 0x89 0xec 0x5d 0xc3 Total of 13 bytes Each instruction 1, 2, or 3 bytes Starts at address 0x401040 Assembler Translates.s into.o Binary encoding of each instruction Nearly-complete image of executable code Missing linkages between code in different files Linker Resolves references between files Combines with static run-time libraries E.g., code for malloc, printf Some libraries are dynamically linked Linking occurs when program begins execution

Machine Instruction Example int t = x+y; addl 8(%ebp),%eax Similar to expression: x += y More precisely: int eax; int *ebp; eax += ebp[2] 0x401046: 03 45 08 C Code Add two signed integers Assembly Add 2 4-byte integers Long words in GCC parlance Same instruction whether signed or unsigned Operands: x: Register %eax y: Memory M[%ebp+8] t: Register %eax Return function value in %eax Object Code 3-byte instruction Stored at address 0x401046

Disassembling Object Code Disassembled 00401040 <_sum>: 0: 55 push %ebp 1: 89 e5 mov %esp,%ebp 3: 8b 45 0c mov 0xc(%ebp),%eax 6: 03 45 08 add 0x8(%ebp),%eax 9: 89 ec mov %ebp,%esp b: 5d pop %ebp c: c3 ret d: 8d 76 00 lea 0x0(%esi),%esi Disassembler objdump -d p Useful tool for examining object code Analyzes bit pattern of series of instructions Produces approximate rendition of assembly code Can be run on either a.out (complete executable) or.o file

What Can be Disassembled? % objdump -d WINWORD.EXE WINWORD.EXE: file format pei-i386 No symbols in "WINWORD.EXE". Disassembly of section.text: 30001000 <.text>: 30001000: 55 push %ebp 30001001: 8b ec mov %esp,%ebp 30001003: 6a ff push $0xffffffff 30001005: 68 90 10 00 30 push $0x30001090 3000100a: 68 91 dc 4c 30 push $0x304cdc91 Anything that can be interpreted as executable code Disassembler examines bytes and reconstructs assembly source

general purpose Integer Registers (IA32) Origin (mostly obsolete) %eax %ax %ah %al accumulate %ecx %cx %ch %cl counter %edx %dx %dh %dl data %ebx %bx %bh %bl base %esi %si source index %edi %di destination index %esp %sp stack pointer %ebp %bp base pointer 16-bit virtual registers (backwards compatibility)

Moving Data: IA32 Moving Data movx Source, Dest x in {b, w, l} movl Source, Dest: Move 4-byte long word movw Source, Dest: Move 2-byte word movb Source, Dest: Move 1-byte byte %eax %ecx %edx %ebx %esi %edi %esp %ebp

Moving Data: IA32 Moving Data movl Source, Dest: %eax %ecx %edx Operand Types Immediate: Constant integer data Example: $0x400, $-533 Like C constant, but prefixed with $ Encoded with 1, 2, or 4 bytes Register: One of 8 integer registers Example: %eax, %edx But %esp and %ebp reserved for special use Memory: 4 consecutive bytes of memory at address given by register Simplest example: (%eax) Various other address modes %ebx %esi %edi %esp %ebp

Cannot do memory-memory transfer with a single instruction movl Operand Combinations Source Dest Src,Dest C Analog Imm Reg Mem movl $0x4,%eax temp = 0x4; movl $-147,(%eax) *p = -147; movl Reg Reg Mem movl %eax,%edx movl %eax,(%edx) temp2 = temp1; *p = temp; Mem Reg movl (%eax),%edx temp = *p;

Simple Memory Addressing Modes Normal (R) Mem[Reg[R]] Register R specifies memory address movl (%ecx),%eax Displacement D(R) Mem[Reg[R]+D] Register R specifies start of memory region Constant displacement D specifies offset movl 8(%ebp),%edx

Using Simple Addressing Modes void swap(int *xp, int *yp) { int t0 = *xp; int t1 = *yp; *xp = t1; *yp = t0; } swap: pushl %ebp movl %esp,%ebp pushl %ebx movl 12(%ebp),%ecx movl 8(%ebp),%edx movl (%ecx),%eax movl (%edx),%ebx movl %eax,(%edx) movl %ebx,(%ecx) movl -4(%ebp),%ebx movl %ebp,%esp popl %ebp ret Set Up Body Finish

Using Simple Addressing Modes void swap(int *xp, int *yp) { int t0 = *xp; int t1 = *yp; *xp = t1; *yp = t0; } swap: pushl %ebp movl %esp,%ebp pushl %ebx movl 12(%ebp),%ecx movl 8(%ebp),%edx movl (%ecx),%eax movl (%edx),%ebx movl %eax,(%edx) movl %ebx,(%ecx) movl -4(%ebp),%ebx movl %ebp,%esp popl %ebp ret Set Up Body Finish

Understanding Swap void swap(int *xp, int *yp) { int t0 = *xp; int t1 = *yp; *xp = t1; *yp = t0; } Offset 12 8 4 yp xp Rtn adr Stack (in memory) 0 Old %ebp %ebp Register %ecx %edx %eax %ebx Value yp xp t1 t0-4 Old %ebx movl 12(%ebp),%ecx # ecx = yp movl 8(%ebp),%edx # edx = xp movl (%ecx),%eax # eax = *yp (t1) movl (%edx),%ebx # ebx = *xp (t0) movl %eax,(%edx) # *xp = eax movl %ebx,(%ecx) # *yp = ebx

%eax %edx %ecx %ebx %esi %edi %esp %ebp Understanding Swap 0x104 movl 12(%ebp),%ecx movl 8(%ebp),%edx movl (%ecx),%eax movl (%edx),%ebx movl %eax,(%edx) movl %ebx,(%ecx) yp xp Offset 12 8 4 %ebp 0-4 123 456 # ecx = yp # edx = xp Rtn adr # eax = *yp (t1) # ebx = *xp (t0) # *xp = eax # *yp = ebx Address 0x11c 0x118 0x114 0x110 0x10c 0x108 0x104 0x100

%eax %edx %ecx %ebx %esi %edi %esp %ebp Understanding Swap 0x104 movl 12(%ebp),%ecx movl 8(%ebp),%edx movl (%ecx),%eax movl (%edx),%ebx movl %eax,(%edx) movl %ebx,(%ecx) yp xp Offset 12 8 4 %ebp 0-4 123 456 # ecx = yp # edx = xp Rtn adr # eax = *yp (t1) # ebx = *xp (t0) # *xp = eax # *yp = ebx Address 0x11c 0x118 0x114 0x110 0x10c 0x108 0x104 0x100

%eax %edx %ecx %ebx %esi %edi %esp %ebp Understanding Swap 0x104 yp xp movl 12(%ebp),%ecx movl 8(%ebp),%edx movl (%ecx),%eax movl (%edx),%ebx movl %eax,(%edx) movl %ebx,(%ecx) Offset 12 8 4 %ebp 0-4 123 456 # ecx = yp # edx = xp Rtn adr # eax = *yp (t1) # ebx = *xp (t0) # *xp = eax # *yp = ebx Address 0x11c 0x118 0x114 0x110 0x10c 0x108 0x104 0x100

%eax %edx %ecx %ebx %esi %edi %esp %ebp Understanding Swap 456 0x104 yp xp movl 12(%ebp),%ecx movl 8(%ebp),%edx movl (%ecx),%eax movl (%edx),%ebx movl %eax,(%edx) movl %ebx,(%ecx) Offset 12 8 4 %ebp 0-4 123 456 # ecx = yp # edx = xp Rtn adr # eax = *yp (t1) # ebx = *xp (t0) # *xp = eax # *yp = ebx Address 0x11c 0x118 0x114 0x110 0x10c 0x108 0x104 0x100

%eax %edx %ecx %ebx %esi %edi %esp %ebp Understanding Swap 456 123 0x104 yp xp movl 12(%ebp),%ecx movl 8(%ebp),%edx movl (%ecx),%eax movl (%edx),%ebx movl %eax,(%edx) movl %ebx,(%ecx) Offset 12 8 4 %ebp 0-4 123 456 # ecx = yp # edx = xp Rtn adr # eax = *yp (t1) # ebx = *xp (t0) # *xp = eax # *yp = ebx Address 0x11c 0x118 0x114 0x110 0x10c 0x108 0x104 0x100

%eax %edx %ecx %ebx %esi %edi %esp %ebp Understanding Swap 456456 123 0x104 yp xp movl 12(%ebp),%ecx movl 8(%ebp),%edx movl (%ecx),%eax movl (%edx),%ebx movl %eax,(%edx) movl %ebx,(%ecx) Offset 12 8 4 %ebp 0-4 456 456 # ecx = yp # edx = xp Rtn adr # eax = *yp (t1) # ebx = *xp (t0) # *xp = eax # *yp = ebx Address 0x11c 0x118 0x114 0x110 0x10c 0x108 0x104 0x100

%eax %edx %ecx %ebx %esi %edi %esp %ebp Understanding Swap 456 123 0x104 yp xp movl 12(%ebp),%ecx movl 8(%ebp),%edx movl (%ecx),%eax movl (%edx),%ebx movl %eax,(%edx) movl %ebx,(%ecx) Offset 12 8 4 %ebp 0-4 456 123 # ecx = yp # edx = xp Rtn adr # eax = *yp (t1) # ebx = *xp (t0) # *xp = eax # *yp = ebx Address 0x11c 0x118 0x114 0x110 0x10c 0x108 0x104 0x100

Complete Memory Addressing Modes Most General Form D(Rb,Ri,S) Mem[Reg[Rb]+S*Reg[Ri]+ D] D: Constant displacement 1, 2, or 4 bytes Rb: Base register: Any of 8 integer registers Ri: Index register: Any, except for %esp Unlikely you d use %ebp, either S: Scale: 1, 2, 4, or 8 Special Cases (Rb,Ri) D(Rb,Ri) (Rb,Ri,S) Mem[Reg[Rb]+Reg[Ri]] Mem[Reg[Rb]+Reg[Ri]+D] Mem[Reg[Rb]+S*Reg[Ri]]

Address Computation Examples %edx %ecx 0xf000 0x100 Expression Address Computation Address 0x8(%edx) 0xf000 + 0x8 0xf008 (%edx,%ecx) 0xf000 + 0x100 0xf100 (%edx,%ecx,4) 0xf000 + 4*0x100 0xf400 0x80(,%edx,2) 2*0xf000 + 0x80 0x1e080

Address Computation Examples %edx %ecx 0xf000 0x100 Expression Address Computation Address 0x8(%edx) 0xf000 + 0x8 0xf008 (%edx,%ecx) 0xf000 + 0x100 0xf100 (%edx,%ecx,4) 0xf000 + 4*0x100 0xf400 0x80(,%edx,2) 2*0xf000 + 0x80 0x1e080

Address Computation Examples %edx %ecx 0xf000 0x100 Expression Address Computation Address 0x8(%edx) 0xf000 + 0x8 0xf008 (%edx,%ecx) 0xf000 + 0x100 0xf100 (%edx,%ecx,4) 0xf000 + 4*0x100 0xf400 0x80(,%edx,2) 2*0xf000 + 0x80 0x1e080

Address Computation Examples %edx %ecx 0xf000 0x100 Expression Address Computation Address 0x8(%edx) 0xf000 + 0x8 0xf008 (%edx,%ecx) 0xf000 + 0x100 0xf100 (%edx,%ecx,4) 0xf000 + 4*0x100 0xf400 0x80(,%edx,2) 2*0xf000 + 0x80 0x1e080

Address Computation Examples %edx %ecx 0xf000 0x100 Expression Address Computation Address 0x8(%edx) 0xf000 + 0x8 0xf008 (%edx,%ecx) 0xf000 + 0x100 0xf100 (%edx,%ecx,4) 0xf000 + 4*0x100 0xf400 0x80(,%edx,2) 2*0xf000 + 0x80 0x1e080

Load Effective Address: Computation leal Src,Dest Src is address mode expression Set Dest to address denoted by expression Uses Computing addresses without a memory reference E.g., translation of p = &x[i]; Computing arithmetic expressions of the form x + k*y k = 1, 2, 4, or 8

Some Arithmetic Operations Two Operand Instructions: Format Computation addl Src,Dest Dest = Dest + Src subl Src,Dest Dest = Dest - Src imull Src,Dest Dest = Dest * Src sall Src,Dest Dest = Dest << Src Also called shll sarl Src,Dest Dest = Dest >> Src Arithmetic shrl Src,Dest Dest = Dest >> Src Logical xorl Src,Dest Dest = Dest ^ Src andl Src,Dest Dest = Dest & Src orl Src,Dest Dest = Dest Src No distinction between signed and unsigned int (why?)

Some Arithmetic Operations One Operand Instructions incl Dest Dest = Dest + 1 decl Dest Dest = Dest - 1 negl Dest Dest = -Dest notl Dest Dest = ~Dest See book for more instructions