Release Notes for QNX Neutrino BSP for Renesas SH7785 SDK 1.0.0#

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Release Notes for QNX Neutrino 6.4.0 BSP for Renesas SH7785 SDK 1.0.0# System requirements# Target system# QNX Neutrino RTOS 6.4.0 Board version: renesas sdk7785 board 128M AMD / SPANSION MirrorBit flash 128M RAM Host development system# QNX Momentics 6.4.0, one of the following host systems: o QNX Neutrino 6.4.0 o Microsoft Windows Vista, XP SP2 or SP3, 2000 SP4 o Linux Red Hat Enterprise Workstation 4 or 5, Red Hat Fedora Core 6 or 7, Ubuntu 6.0.6 LTS or 7, or SUSE 10 Terminal emulation program (Qtalk, Momentics IDE Terminal, tip, HyperTerminal, etc.) RS-232 serial port NULL-modem serial cable Ethernet link Getting Started# Step 1: Connect your hardware# Connect the serial cable to the serial port of the Renesas SDK7785 and to a free serial port on the host machine (e.g. ser1 on a Neutrino host). Step 2: Build the BSP# unzip the bsp package archive to the desired location on the host machine cd to the root of the BSP and type 'make'. The resulting OS image will be located in the images directory Step 3: Transferring the Combined IPL / OS Image (e.g. ipl-ifs-sdk7785.bin) to flash# The OS image generated by this BSP will not boot when loaded by the ROM monitor shipped on the board. Therefore you'll need to first copy the combined IPL and OS image to the flash, then load and boot the OS image from flash, using the IPL. Alternatively the IPL can be used to serially download the OS image directly to memory, and execute it. STEP 1: Apply power to the SDK7785. STEP 2: The following should display in the serial console: Starting ETS... Current SDK Configuration PCB Revision Number: 1.10

CPU Silicon Revision: 2 Endian Mode: Little Endian Boot mode: 32 Bit Clock Operating Mode: 16 Local Bus: 100 MHz DDR-SDRAM: 300 MHz Peripheral Bus: 50 MHz Flash Type: Spansion S29GL512N90FAIR20 Flash Memory Size: 128 MBytes Flash Bank Select Switch: CS0 BankA, CS1 BankB Flash Write Protect: BANK A Not Protected NAND Flash Enable Switch: NAND Enabled NAND Flash Write Protect: Not Protected DDR-SDRAM Total Size: 128 MBytes Emulation Mode: Debug Enabled Bus Mode: PCI Host IO Card Fitted: Empty(nothing connected) Real Time Clock: 01:05:19 Feb 06 1970 (c) Renesas Technology Europe Ltd. www.renesas.com Embedded Test Suite (ETS) for SDK7785 ETS Version: 2.04.00 Dec 20 2005 FPGA Version: 1.00 Dec 14 2005 Ethernet MAC Address for this platform: 00:00:87:d6:35:b6 ETS MAIN MENU 0. Flash Programming Menu 1. Test Menu 2. Boot Configuration Menu 3. Upgrade FPGA Version 4. Display System Configurtion > STEP 3: Below is an example of the ETS output displayed when setting up a TFTP download and when downloading an OS image to flash. If you require more details on how to setup ETS for a TFTP download refer to the ETS instructions in the User's Manual provided by Renesas. > 2 BOOT CONFIGURATION MENU 0. Display Configuration 1. Change Configuration E. Exit from this menu. > 1 Setup Boot Configuration: Boot application [0 ETS, 1 TFTP, 2 USER] (default=0): 1

Boot Delay [1-9 sec] (default = 5): Are you sure you want to save new Boot Configuration? (y/n): y Updating Boot Flash - Do not switch-off or disconnect until complete Please wait, saving the new Boot configuration... Successfully saved new Boot configuration. Reset platform to execute new Boot configuration. Press any key to continue... BOOT CONFIGURATION MENU 0. Display Configuration 1. Change Configuration E. Exit from this menu. > Press 'SPACE' or wait for 5 seconds to enter TFTP Boot Loader. Press any other key to start ETS. Starting TFTP Boot Loader... Renesas SDK7785 (Little Endian Mode) SH TFTP Bootloader Version 2.30 Copyright (C) 2000 Free Software Foundation, Inc. Copyright (C) 2004 Renesas Technology Europe Limited This software comes with ABSOLUTELY NO WARRANTY. This is free software, and you are welcome to redistribute it under the terms of the GNU Lesser General Public License version 2.1 or later. Built: Dec 19 2005, 12:47:17 Press Space or wait 5 seconds to boot from network, any other key for menu TFTP Bootloader Main Menu ------------------------- 1. Boot from network 2. Boot from flash 3. Boot from FAT32 format MMC card 4. Load program into flash 5. Display configuration 6. Change configuration

> 6 Setup TFTP Bootloader Configuration: At any prompt press 'Enter' to leave unchanged or 'Esc' key to quit Use DHCP to setup network? (default=static IP) [y/n]: n Enter board IP address [10.42.106.251]: Enter server IP address [10.42.106.240]: Enter kernel (/xfer/ipl-ifs-sdk7785.bin) filename: Download to flash Bank B? (default=bank A) [y/n]: y Download file format bin/srec? [b/s]: b Binary load address [default=h'40010000] : Load a disk image? [y/n]: n Setup kernel command line? [y/n]: n Boot option: TFTP, Flash, None(TFTP Menu)? [t/f/n]: t Is flash Bank A write protect switch SW4-4 = 'OFF'? [Y/N] : y Updating Boot Flash - Do not switch-off or disconnect until complete Please wait, saving the new Boot configuration... Successfully saved new TFTP Bootloader configuration. TFTP Bootloader Main Menu ------------------------- 1. Boot from network 2. Boot from flash 3. Boot from FAT32 format MMC card 4. Load program into flash 5. Display configuration 6. Change configuration > 4 Board IP address: 10.42.106.251 Server IP address: 10.42.106.240 Downloading /xfer/ipl-ifs-sdk7785.bin to flash bank B 0020003 Downloaded 3432 bytes, crc 17 Is flash Bank B write protect switch SW4-5 = 'OFF'? [Y/N] : y Flash: AM29GL512N (67108864 bytes) Sectors: 256 (262144 bytes each) Writing Binary to flash... Is the BIN image Big or Little Endian? [b/l]: l b 2 add A4000000 Toggle flash bank select switch to boot from bank B STEP 4: Power down the target. Once the power is off, flip Dip Switch MISC_SW1 to OFF in order to boot from the flash bank B STEP 5: Reset the board and the IPL should now execute: STEP 6: Once the IPL is loaded, you will be given two choices: o Boot the image in flash. o Download the image serially. STEP 7: Press any key (other than d) to boot the OS image from flash.

Step 3 Alternate: Transferring the OS Image (e.g. ifs-sdk7785.bin) serially using the IPL# Once the IPL is loaded on the board, the OS image can be downloaded serially as follows: sendnto -b115200 -d/dev/ser1 ifs-sdk7785.bin Once the transfer is complete, the OS image will be executed. Note: The serial port may change, depending on which one is connected to the target. Please see the sendnto documentation in the Utilities Reference. System Layout# The table below depicts the memory layout for the image and for the flash. Item OS image loaded Flash Base Address Address 0x88010000 0x0 Depending on the position of the MISC_SW1 switch the flash base address 0x0 will point to one flash bank or the other: MISC_SW1 Position ON OFF _Flash Bank ranges Bank A (0 to 64MB) and bank B (64MB to 128MB) Bank A (64MB to 128MB) and bank B (0 to 64MB) Summary of driver commands# The driver command lines below are specific to the Renesas SDK7785. See the online docs for each driver for additional command-line options and other details. Serial# devc-sersci -e -F -x -b115200 -c1843200/16 scif1 & Flash# devf-edosk7780 -s0x0,128m Ethernet# Command to start the networking stack: io-pkt-v4 -dsmc9118 ioport=0x15800000,irq=6 PCI# pci-edosk7780

EIDE# devb-eide-sdk7785 Note: For the EIDE controller to work a FPGA version of 1.0.1 or greater must be present on the board Note: The DMA seed utitlity resource_seed must be executed prior to running the devb-eide-sdk7785 driver. Audio# Command" io-audio -dedosk7780_ac97 Known issues for this BSP# Due to the use of an external clock, the serial driver must run at 115200 Baud. The documentation references the OS image and the combined IPL/OS image files respectively as ifssdk7785.bin and ipl-ifs-sdk7785.bin. These are the correct names when building the BSP from the command line. However when building the BSP from the IDE these names are renamed respectively to bsp-renesas-sdk7785.ifs and ipl-bsp-renesas-sdk7785.bin. The trigger levels for the devc-sersci driver listed in the QNX Momentics documentation are for the 7750, and have not been updated for the 7780, 7785. (Ref# 27945 Workaround: Use the following trigger levels for the 7780 and 7785: o 64 byte tx/rx FIFO's o tx FIFO triggers: 0, 4, 16, 32 o rx FIFO triggers: 1, 16, 32, 48 o RTS triggers: 1, 8, 16, 32, 48, 54, 60, 63 The OS image generated by this BSP will not boot when loaded by the ROM monitor shipped on the board. Workaround: Load and boot the OS image on the board using the IPL provided with this BSP. Refer to the BSP documentation for more details. On SH platform when 2 consecutive pipes are cascaded (using ksh), the second pipe doesn't appear to output anything, as seen in the following output: # uname -a QNX renesas_sh7785 6.4.0 2008/09/26-04:27:12EDT SDK_7785 shle # uname -a grep renesas QNX renesas_sh7785 6.4.0 2008/09/26-04:27:12EDT SDK_7785 shle # uname -a grep shle QNX renesas_sh7785 6.4.0 2008/09/26-04:27:12EDT SDK_7785 shle # uname -a grep renesas grep shle #