An Integrator s Guide to MicroTCA Part II How a FRU starts up

Similar documents
for Special Applications

MTCA.4 TUTORIAL BASICS INTRODUCTION IN XTCA

MicroTCA / AMC Solutions for Real-Time Data Acquisition

An Introduction to PICMG 3.7 ATCA Base Extensions PENTAIR

Your Solution Partner

MicroTCA for Medical Applications

UTC040C MicroTCA Carrier Hub (MCH) Conduction Cooled, PCIe Gen3

Components of a MicroTCA System

Pigeon Point BMR-A2F-AMCc Reference Design Board Management Reference Design Add-on for Carrier IPMCs

3U ATCA Hybrid Chassis with 8 AMCs (Mid-size) VT835

5U µtca Chassis, 12 AMC, 40GbE VT866

Low cost 1U µtca Chassis with 2 AMC slots and integrated option for Dual 2.5 SATA/SAS Disk

Management building blocks speed AdvancedTCA product development

1U Chassis with 6 AMCs, Quad SPF+, Redundant Power VT840

1U MTCA Shelf. User s Manual. Product Number: /025

NATIVE-STARTER (Plus) Users Manual. NATIVE-STARTER NATIVE-STARTER-PLUS Users Manual Version 0.4

2U µtca Chassis with 12 AMC slots VT881

1U µtca Chassis, 10 AMCs, 10GbE, 1100W VT848

MicroTCA Power Module

ATCA Platform Considerations for Backplane Ethernet. Aniruddha Kundu Michael Altmann Intel Corporation May 2004

-Page 1 of 21 -

Predetermined I/O on SBC s

OPTIONS FOR NEXT GENERATION DIGITAL ACQUISITION SYSTEMS

Standardized LAN-Attached Management Controllers Yield xtca Performance and Serviceability Gains

Choosing the Right COTS Mezzanine Module

White Paper. About MicroTCA.4: An High-Performance Architecture with I/O and Signal Conditioning Provisions

User Manual UTCA MicroTCA Carrier Hub

Product Catalog Embedded Computing Products

Kontron Completes Triple 10-Gigabit ATCA Portfolio for Triple Play IPTV-Based Broadband Network Solutions

Leveraging the PCI Support in Windows 2000 for StarFabric-based Systems

ZLE User Guide

Version PEX 8516

6U µtca Desktop Chassis, 6 AMC Full Size, 40GbE VT898

9U MTCA.4 Shelf JTAG/White Rabbit Support

AXIe-1: Base Architecture Specification. Revision 2.0

AXIe-1: Base Architecture Specification. Revision 3.1

1 VT814 2U µtca.4 Chassis with 6 AMC Slots

INSTITUTO DE PLASMAS E FUSÃO NUCLEAR

VT816 1U µtca.4 Chassis with 2 AMC Slots, PCIe Gen 3

AMC759. Key Features. Benefits. Intel Xeon E3 Processor AMC, SRIO Gen2 AMC759. Processor AMC Intel Xeon Processor E3-1505M v6 (Kaby Lake)

Version PEX Recommended only for designs migrating from PEX 8516 please use PEX 8518 for new designs

AMC516 Virtex-7 FPGA Carrier for FMC, AMC

The Advantages of AdvancedTCA * The Telecom Industry s Open Standard for Equipment Manufacturers

PEX8764, PCI Express Gen3 Switch, 64 Lanes, 16 Ports

VT857 1U µtca Chassis, 12 AMC, 10 GbE

Agilent E2943A/E2944A ATCA Probes for Advanced Switching Interconnect

AMC517 Kintex-7 FPGA Carrier for FMC, AMC

Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment

An Oracle White Paper February Enabling End-to-End 10 Gigabit Ethernet in Oracle s Sun Netra ATCA Product Family

UTC041 µtca.3 Conduction Cooled MicroTCA Carrier Hub (MCH), PCIe Gen 3

PICMG AMC.0 R2.0. Advanced Mezzanine Card Base Specification

User Manual MIC Advanced Mezzanine Card SAS/SATA Storage AMC

PCIE PCIE GEN2 EXPANSION SYSTEM USER S MANUAL

Customized COTS (C 2 OTS) Series Part 1

PCIe on 3U and 6U CompactPCI Mark Wetzel Principal Engineer National Instruments

PEX 8696, PCI Express Gen 2 Switch, 96 Lanes, 24 Ports

Promentum MPCBL0050 PRODUCT BENEFITS. Dual-Core Intel Xeon Processor LV Dual Core Xeon processor module FEATURE SUMMARY. [Print This Datasheet]

AMC7800 Advanced Mezzanine Card PMC Carrier For MTCA.4

MicroTCA Carrier Hub (MCH), Double Module, PCIe Gen 3 Expansion UTC006

PICMG 3.4 Revision 1.0 Specification. PCI Express /Advanced Switching for AdvancedTCA Systems

PCIE FIVE SLOT EXPANSION SYSTEM USER S MANUAL

PCIE PCIE GEN2 EXPANSION SYSTEM USER S MANUAL

3. Install Graphics/PCIe Cards in NA255A 8

PEX 8636, PCI Express Gen 2 Switch, 36 Lanes, 24 Ports

White Paper Broadband Multimedia Servers for IPTV Design options with ATCA

NVMe SSDs Becoming Norm for All Flash Storage

CompactPCI Serial SB1-OBOE

Extending PCI-Express in MicroTCA Platforms. Whitepaper. Joey Maitra of Magma & Tony Romero of Performance Technologies

µtca Conduction Cooled Chassis with 8 AMC slots

Whenever your system needs to communicate COMMUNICATE WITH N.A.T. FMC. backplane-viewer. SRIO Gen 2 SFP+ test. redundancy ADSP-8/16.

PCI EXPRESS EXPANSION SYSTEM USER S MANUAL

CompactPCI Serial SBX-DUB

PEX 8680, PCI Express Gen 2 Switch, 80 Lanes, 20 Ports

PICMG AMC.2 Revision 1.0. Ethernet Advanced Mezzanine Card Specification

CES - Creative Electronic Systems S.A. ETT 2015: SWaP and Modularity: Extending VPX Concepts Into a Smaller Scale Using VNX

1. There are 10uF capacitors, symbol is CC0402, should double check if it is available in 0402 package.

NAT-MCH Ethernet Switch Configuration Manual. NAT-MCH Ethernet Switch Configuration Manual Firmware v Revision v21. Version 21 N.A.T.

UTC rd Gen MicroTCA Carrier Hub (MCH), 40GbE/PCIe Gen 3. Key Features. Benefits UTC004

AMC GSPS 8-bit ADC, 2 or 4 channel with XCVU190 UltraScale

MSC8144AMC-S Getting Started Guide

Vol. S Cost Effective Customization Capabilities Wide Breadth of Products.

NA265A. External PCIe 3.0 to GPU Rackmount Enclosure. User Manual

Whitepaper. What s new at COM Express Revision 2.0. What changes with Revision 2.0? Compact Form Factor

AMC524 / AMC524C Quad ADC, 125 MSPS, Dual DAC, Artix-7

COMPUTING ATCA G ATCA Server Blade

MicroTCA Carrier Hub (MCH), 3rd gen, 40GbE/PCIe Gen 3 UTC004

atca-6100 Quad-Core Intel Xeon L GHz 5.86 GT/s (Intel QPI) Intel 5520 ICH10R Four DDR pin 48 GB REG/ECC ATI ES1000

PCI-SIG ENGINEERING CHANGE NOTICE

Server System Infrastructure (SM) (SSI) Blade Specification Technical Overview

PCIe Gen3 Module for PCIe Bus Expansion PCI123

PCI EXPRESS EXPANSION SYSTEM USER S MANUAL

AMC540. Key Features. Benefits. Xilinx Virtex-7 FPGA AMC with Dual TI DSP AMC540. Xilinx Virtex-7 XC7VX690T FPGA

VT992 1U External Power Supply for MTCA Systems, Quad 1200 W

What is PXImc? By Chetan Kapoor, PXI Product Manager National Instruments

ATCA-7301 AdvancedTCA Processor Blade

NA381TB3. 4U 24 bay ( 3.5" / 2.5" ) Thunderbolt 3 Storage and PCIe Expansion. User Manual

1U Rugged Chassis Platform, 6 AMC Slots VT950

TCA connectors. ept GmbH & Co. KG I Phone +49 (0) 88 61/ I Fax +49 (0) 88 61/55 07 I I

NAT-MCH HUB-Module PCIe-x80 Technical Reference Manual

COMPUTING ATCA-7368-CE. AdvancedTCA Processor Blade

Transcription:

An Integrator s Guide to MicroTCA Part II How a FRU starts up By Thomas Kastner, Advantech In the previous article of this series we covered the basic system management aspects and architecture of MicroTCA. In this second article we will explain the basic processes of the start up of a Field Replaceable Unit (FRU) using the example of the insertion of an AMC module aka Advanced Mezzanine Card into a MicroTCA chassis. This leads us to the first big bullet point: Hot Swap & FRU States As MicroTCA has been designed for mission critical systems and high availability it has inherent support for live insertion and extraction of all FRUs. The AMC specification and MicroTCA specifications define a hot swap model for the system components which clearly defines the module s states and the transitions between them (figure 1). We do not want to recap all of the PICMG specifications in this article, but give a practical overview and present the background know-how required for system integration. This includes a basic understanding of FRU states: - M0: FRU Not Installed. In this state the FRU is not present in the system (i.e. extracted or waiting to be extracted). - M1: FRU Inactive. In this state, the FRU has been inserted into the system, but is not yet activated. The module s presence in the system has been detected and the power rail for the management circuitry on the module has been applied. The Blue LED on the module s front panel is permanently on. - M2: FRU Activation Request. After the handle switch has been fully closed in M1, this state is entered where an activation request is initiated. The Blue LED is blinking slowly. - M3: FRU Activation In Progress. This state is entered after the shelf manager has acknowledged the activation of the module. The Blue LED is turned off. The detailed power negotiation including the physical activation of module power is happening in this state. - M4: FRU Active. In this state the FRU is fully operational inside the system. E-keying is used to activate the links and interfaces of the FRU. The Blue LED is off. - M5: FRU Deactivation Request. The handle switch has been opened. The Blue LED starts to blink in short intervals. A deactivation request is sent to the shelf manager. - M6: FRU Deactivation In Progress. This state is entered after the shelf manager acknowledges the deactivation request. All AMC ports & interfaces are shut down and the power for the module (except the rail powering the management portion of the AMC) is removed. The Blue LED is still blinking in M6. Figure 1. FRU State Diagram

Most of the debug information available during system integration and debug refers to the FRU states above, and, of course, the above builds the bridge between the FRU states and the user perceptible items: the physical position of the module, the state of the handle switch and the signaling of the Blue LED (As shown in table 1). FRU State M0 Table 1: FRU States Name Blue LED Handle Switch FRU Not Installed M1 FRU Inactive On M2 M3 FRU Activation Request FRU Activation In Progress Off (extracted) or On (inserted) Long Blink Off (Extraction) or Closed (Insertion) Closed Closed M4 FRU Active Off Closed M5 M6 FRU Deactivation Request FRU Deactivation In Progress Short Blink Short Blink FRU Physical Insertion Now, let s take this step by step and clarify the role and actions performed by each element of the MicroTCA infrastructure. The physical insertion comprises the start of the insertion until the module is fully seated and the handle switch is closed. When the backplane connectors mate during insertion the state of the presence detect signals changes. This is recognized by the power module. Yes, you are right to ask, why by the power module and not by the MCH? The answer is quite simple: there is a lack of pins on the MCH physical backplane connector. There is no space to put all the hot swap signals to all the modules on a MicroTCA Carrier Hub. Thus, the management controller on the power module (EMMC) detects the change in presence detect signals and sends a notification to the Carrier Manager (presented by the active MCH). The MCH sends commands to the power module to turn on management power for that module and release the reset to the module s management controller. After that the MCH starts to read the AMC s FRU Information (i.e. FRU EEPROM) and stores the relevant information locally. After a sanity check and after the module s handle switch has been closed, the physical insertion process is completed. The FRU activation state starts with the transition to M2. The most important thing to highlight about the physical insertion management is that it is a co-work of the MCH and the Power Module(s), once more. Figure 2: AMC and face plate with Handle and Blue LED, shown here on an Advantech Processor AMC Module.

FRU Activation & Power Budgeting The FRU activation process starts in M2 when the handle switch has been closed. The Carrier Manager is notified by the module s MMC through a Hot Swap Event message when the handle state changes. The Carrier Manager will send another message in return to change the Blue LED state to Long blink. The first decision to be taken is if the module should be activated or not. The policy for making this decision is contained in a data structure named the MicroTCA Carrier Activation and Current Descriptor which provides the following options: - The Shelf Manager activates this FRU automatically. The FRU transitions to M3 when the Carrier Manager receives the Set FRU Activation (Activate) command from the Shelf Manager. - The Carrier Manager activates this FRU, and it proceeds to M3. - The System Manager activates this FRU. The FRU waits in M2 until the System Manager decides to activate it. One descriptor is provided per slot in the Carrier FRU EEPROM on the backplane. If activation is rejected, the FRU state changes back to M1 (Blue LED on). If activation proceeds, the state changes to M3 (Blue LED off). In M3 the Carrier Manager does the power budgeting to decide if the carrier infrastructure can deliver sufficient power to the FRU. The parameters considered in the power budgeting are divided into two groups: First, a set of parameters dedicated to that special slot on the backplane and the FRU: - the current drawn by the FRU (i.e. AMC module s power consumption) - the maximum current the backplane can carry for this slot - the maximum current the Power Module can deliver to this slot. The second group comprises the carrier s overall power budget: - the current drawn by the FRU (same as above) - the maximum total power of the carrier (limited by the power module s output power and backplane s current carrying capabilities) - the power already assigned to other FRUs on the carrier. If both evaluations indicate that there is enough power left for the FRU being inserted, the power to the FRU is activated and the module advances to state M4. Power budgeting seems to be a straight forward thing, but the flexibility inherent to MicroTCA can make it a quite complicated process: - a carrier can support 1 to 4 power modules - a carrier may be equipped with 1 to 4 power modules - power modules have varying output current & power capabilities - power modules may be used as redundant PMs with hot standby MicroTCA and related specifications The MicroTCA specification builds upon the Advanced Mezzanine Card (AMC) and AdvancedTCA (ATCA) specifications, especially in terms of system management architecture and interfaces. For a detailed understanding of MicroTCA system management it is inevitable to have a solid understanding of all three specifications. These specifications can be obtained from the PCI Industrial Computers Manufacturers Group (PICMG). FRU active & E-keying The final step to complete in M4 is E-keying. E-keying is the process to match the fabric interfaces supported by the modules inserted into the carrier backplane, the fabric routing (connectivity) of the carrier backplane and the fabrics supported by the MCH and make sure that only compliant interfaces are enabled. Non compliant ports connected by a specific backplane routing stay disabled to avoid physical damage and interoperability issues. So, what are the variables in the E-keying game? First of all, there are the interfaces presented by the AMCs themselves. The AMC standard defines 21 ports on the AMC card edge connector. Table 2 gives an overview of common AMC port implementations. For the fat pipes implementation there is a number of different

implementations defined by AMC.x subsidiary specifications. Most importantly, these specifications are guidelines and, whether this makes sense or not, there is a provision for custom implementations. This is especially true for the extended options which are the most prominent candidates for custom implementations. Table 2: AMC port options & MicroTCA routing Connector Region Basic Common Options Fat Pipe Fat Pipe Options AMC Port # Signal Conventions Non-redundant MCH Fabric # Redundant MCH Fabric # 0 AMC.2 1000BASE-BX A 1/A 1 AMC.2 1000BASE-BX 2/A 2 AMC.3 SATA/SAS B 1/B 3 AMC.3 SATA/SAS C 2/B 4 D 1/D 5 AMC.1 AMC.4 AMC.2 10G E 1/E 6 PCIe SRIO Base-BX4 F 1/F 7 G 1/G 8 2/D 9 AMC.4 AMC.2 10G 2/E 10 SRIO Base-BX4 2/F 11 2/G 12 13 14 15 16 17 18 18 20 Secondly, the connectivity on the backplane is the most variable thing in MicroTCA. Figure 3 shows an example backplane implementation and how the AMC ports hook up to the MCH slot. AMC ports may be wired to the MCH slots (dual star) like common for the base interface and parts of the fat pipes region or may be run as local point to point links between two AMC slots. A popular implementation is to run Ports 2 and 3 as local links between slots. A typical usage case is an x86 processor AMC connected to SAS/SATA HDD AMCs for mass storage extension. Thirdly, the MCH(s) may support different kind of fabrics as well such as PCIe, GbE, SRIO and 10GE. It is the Carrier Manager s responsibility to perform the E-keying and to identify matching and non-matching interfaces based on backplane topology. It uses Set Port State commands to enable or disable the individual ports of an AMC or MCH. Figure 3: MicroTCA connectivity example

Another important issue of E-keying to understand is the term link and its implications. A link can consist of anything between 1 to 4 ports. For example, the base fabric GbE Serdes links consist of a single port each. Fat pipe interfaces such as XAUI (10GE) use 4 ports per link and others like PCIe may consist of 1, 2 or 4 ports or even aggregate two 4-port links to one by 8 link. To make things a little bit more complicated, the two links may have the same width, but still may not be compliant. This can be found when the architecture of the underlying fabric implements an asymmetric hierarchy that differentiates between upstream and downstream ports. The best example is PCIe again where there is a (single) root complex at the top of the hierarchy and all devices use their upstream port to connect up the hierarchy towards the root complex. Switches and endpoints follow this scheme. Switches connect the secondary devices they host through downstream ports. To make a long story short, the only valid combination is to connect downstream to upstream ports. Connecting downstream to downstream ports and upstream to upstream ports does not work. This is reflected by the Asymmetric match type fields in the link descriptors defined by the PICMG specifications. Modules use this field to indicate whether they implement an upstream or downstream port. Carrier manager E-keying needs to be aware of these issues to guarantee seamless integration. A practical example of such a scenario on MicroTCA is a system with two processor AMCs inserted. Assuming that the two AMCs are connected by a local 4-port link on the backplane, and assuming both processor AMCs implement PCIe downstream ports on these links, the conflict between the modules is obvious. E-keying will not enable the PCIe ports on these ports to resolve the conflict. One thing to highlight in the previous example is the fact that E-keying is performed on a link by link basis, not on a module by module basis. I.e. although the two processor AMCs have conflicting implementations for the PCIe ports, the base fabrics and other ports/links may be free of conflict. Consequently, these will be enabled by E-keying. This means that it is not a requirement to have 100% percent matching modules in respect to all ports/links in the system. If there is just a partial match, only the corresponding links will be enabled, other links will be disabled. This feature boosts the value of the ecosystem of AMC board vendors by guaranteeing the re-usability of AMC cards in a lot of different configurations even though the port maps are not 100% compliant. It is the part of the system designer and integrator to pick the right AMCs, MCHs and backplane to create a system that fulfills the requirements of the target application. Standard profiles like that defined by the SCOPE Alliance or the one presented in table 2 will simplify this task. The third and final article of this series will shed more light on the management software options available to MicroTCA System Integrators.