The University of Texas at Arlington Lecture 7 CSE 3442/5442
Agenda HW 2 due today Begin Chapter 5 In class assignment. Reading Assignment for Tuesday, Continue Reading Chapter 6. Assignment 3 and 4 due Tuesday (September17) 2
Example of Interfacing PIC to LED/Switches on QwikFlash Potentiometer 1 k pull up resistor on OPEN DRAIN Push Button Switch 3
Use of RA4 on QuickFlash- (Open Drain pin) see http://en.wikipedia.org/wiki/open_drain An open drain terminal is connected to ground in the low voltage (logic 0) state, but has high impedance in the logic 1 state. This prohibits current flow, but as a result, such a device requires an external pull-up resistor which is also connected to the positive voltage 4
Open-Drain Discussion- Cont. When a device is in the high-impedance state, the pull-up resistor keeps the line at logic 1. The line stays there until the device goes into the logic 0 state, and begins to sink current. This current flow creates a voltage drop across the pull-up resistor, and the line drops to the logic 0 voltage. 5
Open-Drain Discussion- Cont. Open-drain devices are commonly used to connect multiple devices to a bus.this enables one device to drive the bus without interference from the other inactive devices - if open-drain devices are not used, then the outputs of the inactive devices would attempt to hold the bus voltage high, resulting in unpredictable output. 6
Consider the One-Transistor Inverter Figure C-2 in the Appendix illustrates the simple transistor inverter. 7
Some Logic Family Specifications 8
Drive and Fan Out Capabilities of Different Semiconductor Families 9
Computing The Fan-Out 10
STD TTL Low I OL /I IL = 16/1.6 = 10 High I OH /I Ih = 0.4/.04 = 10 11
Computing Pull Up Value for Open Collector 12
Consider Pull up for the One- Transistor Inverter Assume R C in figure below, is an external pull up resistor V OL = V CC - V IL v OH ~ V IH(max) I PU I PU IOH(Leakage) I OL I IL I PU = I OL + I IL I IH I PU = I OH - I IH 13
Driving Multiple Devices For driving multiple (N) similar modules, use R Max = ()V CC - V O )/(I PU ) where: V O set to 0 I PU = I OL - N*I IL R Min = (V CC - V IH )/(I PU ) where: V IH I PU = I OH + N*I IH Also See: http://www.interfacebus.com/ic_open_collector_output _pins.html 14
Computing Pull-Up Resistor TPS62067 into TPS62067 From Referenced TI Application Note: SLVA485-Oct 2011 See Link http://www.ti.com/lit/an/slva485/slva485.pdf 15
Open Drain Example - TI Application SLVA485) 16
TI Application SLVA485 pp. 2 SVS Supply Voltage Supervisor PG - power good and LBI - Low battery 17
Open Drain High 18
Computing R pull-up Max And I pullup 19
I OL 20
Open Drain Low V PG = 0 for Lower R 21
Computing R pull-up Min And I pullup V PG = 0 for Lower R, or use Vout 22
R pull-up 1.8 kω R Pull-up 727.3 k Ω 23
Chapter 5 ARITHMETIC, LOGIC INSTRUCTIONS, AND PROGRAMS 24
Chapter 5 Instructions ADDWF filereg d add contents of working register to filereg result in filereg or WREG ADDWFC same as first instruction but adds previous carry bit to result (multibyte instructions) C = 1 3C E7 + 3B 8D -------------- = 78 74 25
ADDWFC ; Loc 6 = (8D) ; Loc 7 = (3B) MOVLW 0xE7 ;Load WREG with E7H ADDWF 0x6,F ;F = W + F C=1 MOVLW 0x3C ; WREG 3CH ADDWFC 0x7,F ; F = W + F + carry 26
BCD/DAW Unpacked BCD lower bits number in BCD upper 4 bits zero Packed BCD both lower 4 and upper 4 bits BCD number DAW, decimal adjust MOVLW 0X47 ADDLW 0X25 DAW ; ADJUST FOR BCD (WREG = 72H) 27
Multiplication of unsigned numbers MULLW K ;PRODH = high byte, SFR and PRODL = low byte Byte x Byte WREG K SFR One byte must be in WREG and second - Literal 28
Division of Unsigned Numbers No single instruction for division of byte/byte numbers in PIC18. Must use repeated subtraction see Example 5-8 pp164 29
Signed Numbers Positive numbers +127 to -128 Overflows indicated by flag in Status Register (See examples pp 169-170) If result of an operation on signed numbers too large for the register 30
OV flag The Overflow flag is set when 1. carry from D6 to D7 but no carry out (C=0) 2. carry from D7 our (C=1) but no carry from D6 to D7 31
Example 5-14 Example: -128 1000 0000 + -2 1111 1110-130 0111 1110 N=0, C=1 No carry from D6 to D7 32
Logic Instructions AND OR XORLW K (exclusive of two operands) COMF (complement filereg) (1 s Complement) NEG (negate filereg) (2 s Complement) 33
Compare Instructions CPFSGT Skip if FileREG > WREG CPFSEQ Skip if FileREG = WREG CPFSLT Skip if FileREG < WREG 34
Rotate and Swap Nibbles RRNCF(RLNCF) filereg,d ; rotate right/left RRCF(RLCF) filereg,d ; rotate right/left through carry SWAPF filereg,d ; swaps upper and lower nibbles (4bits) 35
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Embedded Design with the PIC18F452 Microcontroller Prentice Hall, 2003 Peatman 37
Work the following Examples in Class 1a. Find the C,Z, and DC flags for: MOVLW 0x3F ADDLW 0X45 1b. MOVLW 0xEF MOVWF MYREG BSF STATUS,C MOVLW 0 ADDWFC MYREG,F 38
In Class Example - CONT 2. True or False The DAW instruction only works with the WREG register 3. Which register holds the OV flag 4. True or False In using the CPFSEQ instruction, we must use WREG as one of the registers. 39
Parity and Check Sum Parity and Check Sum: Parity and checksum are used to help insure data is transmitted from one module to another without loss of bits or data. Your text discusses check sum in Chapter 5. Neither method will guarantee signal integrity, but are simple methods often used for aiding loss of information in communications. 40
Parity and Check Sum Check Sum: 1. Add the bytes and ignore the carries 2. The 2 s complement of the result in 1. forms the check sum. Parity: For odd carry, count the number of ones in each column. Make the carry bit for that column one if there is an even number of ones. If an odd number the carry bit should be zero. 41
Parity and Check Sum cont. Parity Example Check Sum Example 1001 40 0110 20 1101 31 1111 91 = 1001 0001 0010 Or 2 s Comp. 0110 1111 42
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Parity and Checksum Additional Examples: The (vertical) parity and checksum bytes for the following four hex bytes are 35 (0011 0101) and E8 respectively. 23 (0010 0011) 23 + A2 + 8F + C4 = 218h A2 (1010 0010) 0001 1000 = 1110 0111 = 8F (1000 1111) E7 + 1 = E8 C4 (1100 0100) 0011 0101 35 Parity (odd) 46
In Class Assignment #2 cont. The Hex files generated by Microchip s assembler uses a check sum with each load file. Additional information can be found on the web at the following two links: http://en.wikipedia.org/wiki/parity_bit http://en.wikipedia.org/wiki/checksum 47
Parity and Checksum cont. Compute first the odd (vertical) parity byte and then checksum for the following bytes: 1. 0010 1001 29 1101 0111 D7 1000 1010 8A 1100 1001 C9 48
In Class Assignment - Answers 1. a. Find the C,Z, and DC flags for: MOVLW 0x3F ADDLW 0X45 3 F +4 5 -------------- = 8 4 C = 0, Z=0, DC = 1 49
Answers - Continued b. MOVLW 0xEF MOVWF MYREG BSF STATUS,C MOVLW 0 ADDWFC MYREG,F 1 + E F + 0 0 -------------- = (0) F 0 C = 0, Z=0, DC = 1 50
Answers - Continued 2. True or False The DAW instruction only works with the WREG register - TRUE 3. Which register holds the OV flag - STATUS 4. True or False In using the CPFSEQ instruction, we must use WREG as one of the registers. - TRUE 51
Parity and Checksum cont. Compute first the odd (vertical) parity byte and then checksum for the following bytes: 1. 0010 1001 29 1101 0111 D7 1000 1010 8A 1100 1001 C9 0100 0010 ODD Parity AD Check Sum 52
Chapter 6 Addressing 53
Addressing Methods Immediate Addressing Operand part of the instruction Direct Addressing Instruction has the operand address and thus can be directly addressed Register Indirect Addressing Instructions specifies a register that has the address of the operand (pointer to the operand). 54
Addressing Methods - cont Immediate Addressing operand is part of the instruction, thus immediately available when instruction is fetched. MOVLW 0X25 ; 25H WREG ANDLW B 01000000 ;AND WREG with 40H Using EQU COUNT EQU 0x30 MOVLW COUNT ; 30H WREG ; Assembler insures 30H placed in the second byte of the instruction 55
Addressing Methods- cont. Direct Addressing operand is obtained from file register. MOVLW 0X25 ; 25H WREG MOVFW 0x45 ; MOVE CONTENTS OF FILE ; REGISTER 45H TO WREG, ; (0x45) WREG MOVFF 0x40, 0x50 ; (40H) (50H) Note the MOVWF only access the current bank while the MOVFF instruction can access all of the 4K RAM address space File register (RAM) arranged into 16 Banks of 256 bytes. 56
Data RAM Registers 16 Banks of 256 Bytes 57
Bank Addressing Direct Addressing Instructions take 2 bytes, one for the operation and the other for an 8 bit 256 byte Access Bank address. Thus need way to access the other Banks. 58
Direct Addressing cont. When using direct addressing recall the result of the operation can be saved in either the file register ( F ) or WREG ( W ) Example: INCF 0x20,W ;(0x20) + 1 (WREG) INCF 0X20,F ;(0x20) + 1 (0x20) or INCF 0X20 ;(0x20) + 1 (0x20) (Default ; File Register 59
SFR Note: The Special Function Registers or SFR can be directly accessed by their names. (For C, see header file, e.g.. MPLAB-Cxx PIC18F452 processor header) MOVWF PORTB BSF register STATUS,C ; set c bit of status 60