Combinational Logic Use the Boolean Algebra and the minimization techniques to design useful circuits No feedback, no memory Just n inputs, m outputs

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Combinational Logic Use the Boolean Algebra and the minimization techniques to design useful circuits No feedback, no memory Just n inputs, m outputs and an arbitrary truth table

Analysis Procedure We need to analyze digital circuits to verify our designs (as well as understand designs without documentation) Assume we have the logic diagram (and some minimal info about the inputs)

Steps in Analysis Label all the outputs of the gates that are connected directly to the inputs with (short) arbitrary names Label all the outputs of the gates that are connected directly to the previous set Repeat till all gates are done.

Symbolic Manipulation Substitute symbolically till all intermediate symbols are gone Build the truth table HDL compiler packages have good tools to speed this up

Design The purpose is to translate a high level description of the circuit to a logic diabram or something that is directly implementable Normally we are expected to minimize some cost measure

Design Procedure Give short names to all inputs and outputs Derive truth table from the specification Simplify Draw diagram

HDLs The first two steps cannot be handled by HDLs but the compiler packages provide tools there are libraries that can be reused or modified The other two are handled very well by HDLs

Example: BCD-Exc3 We design a converter from BCD to Excess3 Excess-3 is essentially BCD+3

Truth Table ABCD wxyz 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 xxxx xxxx xxxx xxxx xxxx xxxx

Handicraft... The boolean expressions are w = A + BC + BD = A + B(C + D) x = B C + B D + BC D =B (C+D)+B(C+D) y = CD + C D = CD + (C+D) z = D Notice that (C+D) and its negation appear 4 times

Add-Subtract Extremely important subcomponent of most digital systems Does not have a good solution Astonishing amount of ingenuity has been invested There are many researchers that still hope...

Half Adder 2 inputs, 2 outputs So simple that can be done without maps etc S = x y + xy C = xy

Half Adder Truth Table xy CS 00 01 10 11 00 01 01 10

Full Adder A bit more interesting Adds 3 bits (2 bits plus a carry-in) Produces 2 outputs Needs maps

Full Adder Truth Table xyz CS 000 001 010 011 100 101 110 111 00 01 01 10 01 10 10 11

Multi-bit Adders For multi-bit adders we cascade several full adders Easier to package because we do not need the intermediate carries (but our ingenuity may come back to hunt us)

Carry Propagation For a N bit adder we have 2N gate delays Addition is very important for memory management, array access, etc, multiplication, and on its own rightcan t leave it like this!

Carry LookAhead Find nice tricks to reduce the number of gate levels Define Carry-Propagate and Carry-Generate P_i = A_i (+) B_i G_i = A_i B_i

The Sum and Carry The Sum and Carry are then S_i = P_i (+) C_i C_i+1 = G_i + P_i C_i So the carries are C_1 = G_0 + P_0 C_0 C_2 = G_1 + P_1 G_0 + P_1 P_0 C_0 C_3 = G_2 + P_2 G_1 + P_2 P_1 G_0 + P_2 P_1 P_0 C_0

Other Ways to speed up Addition Add three numbers to obtain two Can be done in few gate delays Good when we have many additions Adding the two numbers to obtain one still costs Hard to check for overflow

Other Ways to Speedup Addition Speculative addition Normally the MSBits have to wait for the carryin to arrive from the LSBit stages We can do twh MSBit addition twice: once with carry-in=0 and once with carry-in=1 When the real carry-in arrives we choose the correct answer.

Subtraction We have to take the 2 s complement we use the trick with the carry-in Normally we do both add and subtract on the same circuit

Why is that? The rule is that we have an over(under)flow when the sum of two positive numbers is negative the sum of two negatives is positive

Truth Table A3B3C3 S3C4 V 000 001 010 011 100 101 110 111 0 1 1 0 1 0 0 1 0 1 0 0 0 0 1 0 0 0 0 1 0 1 1 1

BCD Addition Just like binary addition but with an extra step: if the result is greater than 9: we generate a carry and add 6 to skip the unused numbers Example:0111+0101=1100<=>1100+0110= 10010=C:1,S:10

Binary Multiplication Like the decimal one we SHIFTMULTIPLY_ADD It is easier with binary 1-bit multiplication because it is just AND

Comparator A comparator compares two numbers Can tell us if they are equal Can also tell us which one is the biggest

How it works A 4-bit comparator contains 4 1-bit comparators An 1-bit comparator is easy to design in an ad-hoc way Two numbers are equal if all the 1-bit comparators shout equal

How it works A is greater then B if The MSB of A is greater then the MSB of B Or the MSBs of A and B are equal and the second MSB of A is greater then the second MSB of B etc

A_0<B_0

Decoder A standard and quite useful MSI chip Has n input and 2^n outputs The output with number that corresponds to the binary value of the input is high and the rest are low Produces all the minterms

Enable pin Decoders usually have an ENABLE pin Very often ENABLE pins have negative logic (active low) Without the ENABLE one of the decoder outputs is always true

Many uses The main advantage of the ENABLE is that it allows us to build big decoders out of smaller ones. E.g. build a 4x16 decoder out of two 3x8 and a 1x2.

Combinational Logic Decoders produce all the minterms So can be used to implement functions Very good for hard to minimize functions Very good for MSI-SSI implementations

Combinational Logic using MUX Really useful things for implementing complex logic When the MSIs ruled the world, MUXes were kings

General Procedure The simplest way to design a combinational circuit with N inputs is to use an N x (2^N) MUX Connect the inputs to the control inputs Assign 1 to the data inputs that correspond to the minterms, zero o/w

Too simple... Too simple to be mentally satisfying We could use a smaller MUX and very little other hardware (or have more inputs)

General Procedure Assign the N control inputs of the MUX to the first N inputs to the circuit we want to design Separate the truth table to 2^N blocks Treat each block as an individual truth table and minimize it

Advantages We can implement efficiently quite large combinational circuits with a 16x4 MUX we can implement a 10 input circuit using nothing but maps. Can attempt to minimize further by assigning different inputs to the control inputs of the MUX

Disadvantages It is not always a standard form (AND-OR or OR-AND) The advantages are less significant if we do not use MSI

Three State Gates Tri-state Gates are gates whose output can have one of three values: 0, 1 and highimpedance Impedance means resistance but sounds more important

How the look Tri-state gates all have a control input. When the control input is enabled the circuit acts like a normal gate When the control input is disabled, the output is in high-impedance state and behaves as if it is disconnected

What they are good for It is an alternative to wired-or and wired-and In some technologies (CMOS) it is easy to implement Has many desirable electrical properties