Application note STM8A reset application examples Introduction This document is one of a set of application notes giving examples of how to use the various blocks of the STM8A microcontroller family and the STM8 firmware library. It provides two practical application examples of the STM8A reset peripheral use. The examples are: Independent watchdog (IWDG) reset Illigal opcode (ILLOP) reset For further information on the STM8A family features, pinout, electrical characteristics, mechanical data and ordering information, please refer to the STM8AF61xx, STM8AF51xx datasheet. This document, its associated firmware, and other such application notes are written to accompany the STM8 firmware library. Please contact STMicroelectronics for information on the STM8 firmware library. April 2008 Rev 2 1/6 www.st.com
Contents Contents 1 Example 1: IWDG reset....................................... 3 1.1 Hardware description......................................... 3 1.2 Firmware description......................................... 3 2 Example 2: ILLOP reset...................................... 4 2.1 Hardware description......................................... 4 2.2 Firmware description......................................... 4 3 Revision history............................................ 5 2/6
Example 1: IWDG reset 1 Example 1: IWDG reset This section provides a short description of how to generate, detect and manage an IWDG reset. 1.1 Hardware description In a real application, no external hardware is needed to configure the IWDG reset. Figure 1 shows the connections for the user interface for example 1. This example is based on the STM8/128-EVAL evaluation board. Figure 1. STM8A hardware connections for IWDG reset example +5 V 4.7 kω 2 3 Key 100 nf 1 4 PCO PH0 PH1 PH2 PH3 LD1 LD2 LD3 LD4 100 Ω STM8A AI15021a 1.2 Firmware description The STM8 firmware library includes the reset driver that supports all reset features through a set of functions. The current example uses all functionalities of the reset driver and is provided as reset example 1 in the STM8 firmware library. TIM4 timer is used to refresh the IWDG every 16 ms. Pressing the key button (see Figure 1) stops the IWDG from being refreshed and thus generates a reset LEDs 1 to 4 blink five times signaling the IWDG reset. When the reset flag is cleared, LEDs 1 to 4 light up permanently. 3/6
Example 2: ILLOP reset 2 Example 2: ILLOP reset This section describes how to generate, detect and manage an illegal opcode reset. 2.1 Hardware description Figure 1 shows the connections for the user interface for example 2. This example is based on the STM8/128-EVAL evaluation board. 2.2 Firmware description The current example is provided as reset example 2 in the STM8 firmware library. By pressing the key buttom (see Figure 1), the example program performs a jump to a specific memory address where an illegal opcode is written. Its execution generates a reset. LEDs 1 to 4 blink quickly to signal the ILLOP reset. When the reset flag is cleared LEDs 1 to 4 blink slowly. 4/6
Revision history 3 Revision history Table 1. Document revision history Date Revision Changes 14-Mar-2008 1 Initial release 08-Apr-2008 2 Removed all references to the standard version of the STM8 5/6
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