Solutions - Homework (Due date: Februar 5 th @ 5: pm) Presentation and clarit are ver important! Show our procedure! PROBLEM ( PTS) In these problems, ou MUST show our conversion procedure. a) Convert the following decimal numbers to their s complement representations: binar and headecimal. (6 pts) -9.5, 7.6565, -8.5785, -.5. - 9.5 =. -9.5 =. = E76.B - 7.6565 =. = 5.A8-8.5785 =. -8.5785 =. = F7F.7E -.5 =. -.5 =. = E.C b) Complete the following table. The decimal numbers are unsigned: (8 pts.) Decimal BCD Binar Reflective Gra Code 97 64 85 56 4 4 95 c) Complete the following table. Use the fewest number of bits in each case: (6 pts.) REPRESENTATION Decimal Sign-and-magnitude 's complement 's complement - -56-77 -5-65 7 PROBLEM (5 PTS) a) What is the minimum number of bits required to represent: ( pts), smbols? Numbers between 5, and 4,9? log = 7 log (49 5 + ) = log 89 = 4 b) A microprocessor has a -bit address line. The sie of the memor contents of each address is 8 bits. The memor space is defined as the collection of memor positions the processor can address. (5 pts) - What is the address range (lowest to highest, in headecimal) of the memor space for this microprocessor? What is the sie (in btes, KB, or MB) of the memor space? KB = btes, MB = btes, GB = btes Address range: to FFFFFFFF. With bits, we can address btes, thus we have = 4 GB of address space - A memor device is connected to the microprocessor. Based on the sie of the memor, the microprocessor has assigned the addresses BC to BFFFFFF to this memor device. What is the sie (in btes, KB, or MB) of this memor device? What is the minimum number of bits required to represent the addresses onl for this memor device? As per the figure below, we onl need bits for the addresses in the given range. Thus, the sie of the memor device is = 4MB. Address : BC : BC : BFFFFFF 8 bits Instructor: Daniel Llamocca
b 8 = b 7 = b 6 = b 5 = b 4 = b = b = b = c 9 = c 8 = c 4 = b 8 = b 7 = b 6 = b 5 = b 4 = b = b = b = c 6 = c 5 = b 8 = b 7 = b 6 = b 5 = b 4 = b = b = b = c) The figure below depicts the entire memor space of a microprocessor. Each memor address occupies one bte. (8 pts) - What is the sie (in btes, KB, or MB) of the memor space? What is the address bus sie of the microprocessor? Address sie: to FFFFFF. To represent all these addresses, we require 4 bits. So, the address bus sie of the microprocessor is 4 bits. The sie of the memor space is then 4 = 6 MB. - If we have a memor chip of MB, how man bits do we require to address MB of memor? MB memor device: MB = = btes. Thus, we require bits to address the memor device. - We want to connect the MB memor chip to the microprocessor. Provide an address range so that MB of memor is properl addressed. You can onl use the non-occupied portions of the memor space as shown in the figure below. MB of memor require bits. The -bit address range would be from to FFFFF. Within the entire 4- bit memor space, there are four options to place those MB in the figure. In particular, we picked the address range from 4 to 5FFFFF. FFFFFF C 7FFFFF 5FFFFF 6 4 FFFFF 8 bits PROBLEM ( PTS) a) Perform the following additions and subtractions of the following unsigned integers. Use the fewest number of bits n to represent both operators. Indicate ever carr (or borrow) from c to c n (or b to b n). For the addition, determine whether there is an overflow. For the subtraction, determine whether we need to keep borrowing from a higher bte. (8 pts) Eample (n=8): 54 + 77-94 Borrow out! 54 = 6 = + = D = 77 = 4D = - 94 = C = 7 + 7 4 97 + 75 8 4 7 = F = + 7 = 89 = 48 = 98 = Borrow out! 4 = B = - 97 = 6 = CA = = 6F = + 75 = 4B = No Borrow Out 8 = 8 = - 4 = B = 85 = 55 = Instructor: Daniel Llamocca
c = c= c8= c 6 = c5= c4= c = c= c5= c= c = c6= c 5 = c 4 = c= c = c6= c4= c= c8= c5= c= c= c6= c= c= b) We need to perform the following operations, where numbers are represented in 's complement: (6 pts) -97 + 56 99-6 4 + 67-7 - 7 For each case: Determine the minimum number of bits required to represent both summands. You might need to sign-etend one of the summands, since for proper summation, both summands must have the same number of bits. Perform the binar addition in s complement arithmetic. The result must have the same number of bits as the summands. Determine whether there is overflow b: i. Using c n, c n (carries). ii. Performing the operation in the decimal sstem and checking whether the result is within the allowed range for n bits, where n is the minimum number of bits for the summands. If we want to avoid overflow, what is the minimum number of bits required to represent both the summands and the result? n = bits n = 8 bits c c 9 = -97 = + 56 = 59 = -97+56 = 59 [- 9, 9 -] no overflow n = bits c 8 99 = + -6 = 7 = 99-6 = 7 [- 7, 7 -] no overflow n = 8 bits c 4 = + 67 = c 8-7 = + -7 = 4+67 = [-, -] overflow! -7-7 = -64 [- 7, 7 -] overflow! To avoid overflow: n = bits (sign-etension) c c = 4 = + 67 = = 4+67 = [-, -] no overflow To avoid overflow: n = 9 bits (sign-etension) c 9 c 8 = -7 = + -7 = -64 = -7-7 = -64 [- 8, 8 -] no overflow c) Get the multiplication results of the following numbers that are represented in s complement arithmetic with 4 bits. (6 pts),,. Instructor: Daniel Llamocca
PROBLEM 4 (5 PTS) In these problems, ou can use full adders and logic gates. Make sure our circuit works for all cases. If there is overflow, design our circuit so that the final answer is alwas the correct one with the correct number of bits. a) Given two 4-bit numbers provided in gra code, sketch the circuit that computes the summation of the unsigned decimal numbers these gra codes represent. a a a a b b b b a b a b a b a b c 4 c c c c s 4 s s s s b) Given two 4-bit signed ( s complement) numbers A, B, sketch the circuit that computes (A B) 4. a b a b a b a b a b c 5 c 4 c c c c r 4 r r r r PROBLEM 5 ( PTS) s 6 s 5 s 4 s s s s a) Implement the following functions using i) decoders (and OR gates) and ii) multipleers: (5 pts) F a = Y + Z + XY F b = X Y Z w w w 4 5 6 7 s = 4 5 6 7 s = w w w 4 5 6 7 w w w 4 5 6 7 4 Instructor: Daniel Llamocca
b) Using onl a 4-to- MUX, implement the following functions. (5 pts) F a (X, Y, Z) = (m, m, m 4, m 6 ) F b (X, Y, Z) = (M, M 4, M 5, M 6 ) c) Complete the timing diagram of the circuit shown below: ( pts) s = s = w E DECODER k w E P P Unknown s s P P P P P PRIORITY ENCODER f P k f 5 Instructor: Daniel Llamocca