Zefeer EVB-L. Hardware Manual

DATE CREATION: Nov 2004 DATE LAST MODIFIED: May 2007 DAVE s.r.l. VERSION: 1.0.1 www.dave.eu FILE NAME: Zefeer-evb-l-hm Zefeer EVB-L Hardware Manual

History Rev. Date EVB-L Hw Rev. DZB Hw Rev. Details 0.9.0 20041101 CS044404 CS024204 Initial Release 0.9.2 20050522 CS044404A CS024204A Small fixes in Cap. 6,Changed pinout of J1 connector 1.0.0 20051022 CS044404A CS024204A Removed Zefeer connectors pinout. Changed default boot configuration. Small corrections. 1.1.0 20070509 CS044404A CS024204A Changed info about Power Supply. Small corrections.

Contents Cap. 1 - Block Scheme... 4 Cap. 2 - Board layout and Physical... 6 Cap. 3 - Plug in Zefeer module on the Zefeer EVB... 7 Cap. 4 - Bootstrap Settings... 8 Cap. 5 - Providing Power to the board: Power Supply Connector (JP3)... 8 Cap. 6 - LEDs... 9 6.1 Power LEDs... 9 6.2 Reset LED... 9 6.3 Boot LEDs : Green LED and Red LED... 9 Cap. 7 - Reset and Bootstrapping... 9 Cap. 8 - Interfaces and Connectors... 10 8.1 RS232 Serial Ports (P0,P1)... 10 8.2 10/100BaseT LAN (JPF1)... 11 8.3 USB-A Host Ports (JP4,JP5)... 11 8.4 JTAG Interface Connector (JP2)... 12 8.5 Expansion Connector (JP1)... 13 8.6 Zefeer Socket Connectors (J1, J2)... 16 Cap. 9 - NAND... 16 Cap. 10 - RTC... 16 Cap. 11 - Support... 16 Cap. 12 - Schematics... 16 page3 of 17

Zefeer EVB-L Hardware Manual Printed in Italy Trademarks Ethernet is a registered trademark of XEROX Corporation Copyright All rights reserved. Specifications may change any time without notification. Life Support Applications Zefeer EVB-L Embedded Computer Board are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. DAVE Srl customers who using or selling these products for use in such applications do so at their own risk and agree to fully indemnify DAVE Srl for any damages resulting from such improper use or sale. Company Address DAVE S.r.L. Via Forniz 2 33080 Porcia (PN) Italy Phone: +39 0434 921215 e-mail:info@dave.eu URL: http://www.dave.eu Technical Support e-mail:support-zefeer@dave.eu Cap. 1 - Block Scheme

Zefeer EVB-L Evaluation Board is the target board where the Zefeer module DZB powered with an EP9302 Cirrus microprocessor can be fitted and rapidly tested. Zefeer module comes with all essential features needed in order to quickly set up a customized system based on this processor. As an example, module comes with its flash NOR memory and SDRAM memory as well as reset logic, in order to provide proper power-on reset sequence and power monitor. Nevertheless Zefeer module provide autonomously to generate the core power supply at 1.8V voltage that microprocessor requires from 3.3V on input. All interface and power signals are passed through two 140 pin 0.6mm pitch stacking connectors, therefore users should complete hardware interfaces and connectors when they want to use them through the host board 1. A quick overview of the board is given, both from mechanical and electrical point of view. Nevertheless, for detailed information, user should refer to components manufacturer s data sheet. Zefeer EVB-L Socket Connector JTAG ETH0 UART0 Full RS232 UART1 USB0 USB1 Rx/Tx-ETH0 RS232 Drivers RS232 Drivers Current Limiter Current Limiter JTAG Interface ETH0 RJ45 D B 9 D B 9 DTE DCE HOST USB0 HOST USB1 RTC IIC BUS USER RESET EXTERNAL BUS DIGITAL I/O PORTS ADC Input Power Supply NAND FLASH Fig. 1 Zefeer EVB-L Block Scheme Reset Button E x p a n s i o n C o n n Power supply 1 Please, for further details about Zefeer module, refer to [1] page5 of 17

Cap. 2 - Board layout and Physical Zefeer EVB-L layout board is depicted below in Fig. 2. Fig. 2 Zefeer EVB-L board layout

Cap. 3 - Plug in Zefeer module on the Zefeer EVB In order to insert the Zefeer module on EVB user should take care to the direction of insertion. Zefeer module must be inserted as depicted in the following picture wher the microprocessor chip is closer to the JTAG 10x2 pin Connector (JP4) : Fig. 3 Zefeer EVB-L image WARNING: Zefeer EVB-L can accommodate the DZB Zefeer model type ONLY. (See for more information about models family). Inserting different Zefeer model hardware may be damaged permanently the Zefeer EVB. page7 of 17

Cap. 4 - Bootstrap Settings When users plugs Zefeer module onto Zefeer EVB-L, they have to trim some settings. Settings are performed via dip switch S2 whose functions are described in Tab. 1. PIN Function ON OFF DEFAULT 1 Serial Boot or Normal Boot SERIAL NORMAL OFF 2 External Boot or Internal Boot EXTERNAL INTERNAL ON 3 - - - - 4 - - - - Tab. 1 S1 (pin1, 2 and 4) settings As shown above, Pin 1 selects Serial Boot or Normal Boot option. Pin 2 selects the boot from Internal BootROM (OFF) or from an external memory device. Default configuration sets NORMAL and EXTERNAL mode. Cap. 5 - Providing Power to the board: Power Supply Connector (JP3) The board accepts a unique mean of power supply connection, through JP3 connector. This is a conventional Phoenix, mod. MSTBA 2.5/3-G-5.08. The range voltage accepted is from +7.5V to +12V DC at maximum 1A. Zefeer EVB-L can take a Maximum current of 650mA 2. The first On-board LDO regulator provide +3.3V at max 1A. An other LDO provide +7.5V voltage at max 1A for external USB devices. We remember that EVB provide on-board current limiter devices for each USB Port with a fix current limit of 500mA. For further details Polarity of JP3 is specified in Fig. 4. It s worthwhile to remember that some settings are needed before turning on the board (See Chapter. 4 ) VCC n.c. GND 1 2 3 Fig. 4 JP3 Power Supply Connector Zefeer EVB-L provides Led DL6 close to the Power Jack JP6 that indicates +3.3V voltage and a led DL7 that indicates +5V voltage (USB section power supply). 2 This value is been measured in the following working conditions: Serial Ports 0,1 in use, Ethernet in use, USB Port 0,1 in use with two keyboard devices, Signals of Expansion Connector JP1 not utilized. Current Supply could be subject to large changes in function of external USB device interconnection and in function of external peripherals interconnected.

Cap. 6 - LEDs Some leds are available on the board. Their meaning is described below. 6.1 Power LEDs DL6 led monitoring +3.3V level voltage, while DL7 indicates +5V level voltage. Connecting power supply to Zefeer EVB you should see such leds turning on. 6.2 Reset LED This is the red led close to S1 reset button with RST silkscreen. When system is on and microprocessor is running, it should be turned-off. When the system stuck in reset this leds will turn on (red light). 6.3 Boot LEDs : Green LED and Red LED These are the leds used by microprocessor using Boot phase. They are placed near S1 reset button. The green one is the Green LED and is driven directly by GLED microprocessor signal, while the red one is the Red Led and is driven directly by RLED signal. For further details about such signal, refer to [1] and[2]. Cap. 7 - Reset and Bootstrapping On EVB there is no reset CPU supervisor nor power-monitoring. Thus, reset signal RST that comes out from the module, is generated at power-up by a CPU supervisor that monitors +3V3. Furthermore user can give a Manual Reset thorugh S1 button. This reset button is strightly connected to MRSTn pin (J2.102) that is a Master Reset Input of the same CPU supervisor device mounted on Zefeer module. When such pin goes low global system will be reset (for further details see reference [1]). Pushing reset button user should see the RST LED turning-on. page9 of 17

Cap. 8 - Interfaces and Connectors 8.1 RS232 Serial Ports (P0,P1) P0 is a DB9 male connector featuring a full RS232 (except for RI signal) from UART0 of microprocessor. In Tab. 2 are listed signal carried over it. PIN SIGNAL 1 n.c. 2 UART0_RX 3 UART0_TX 4 UART0_DTR 5 GND 6 UART0_DSR 7 UART0_RTS 8 UART0_CTS 9 n.c. Tab. 2 P0 Connector pinout (DTE) Since P0 is a DTE connector type, user must use a null-modem serial cable to connect with a PC. Using a normal serial cable user may damage the board. P1 is a DB9 female connector featuring an RS232(not full). This serial port doesn t provide all signals as P0 serial port. Signals available are listed in Tab. 3. PIN SIGNAL 1 n.c. 2 UART1_TX 3 UART1_RX 4 n.c. 5 GND 6 n.c. 7 n.c. 8 n.c. 9 n.c. Tab. 3 P1 Connector pinout (DCE) Since P1 is a DCE connector type, user must use a normal serial cable (not null-modem) to connect with a PC.

8.2 10/100BaseT LAN (JPF1) JPF1 is the LAN 10/100BASE-T connector for ethernet interface, related to ethernet chip mounted on Zefeer module. There is two type of connectors that EVB-ZL can provide: TYPE A that incorporates Link Led and Tx Led TYPE B that doesn t incorporate any LEDs In both cases, the pinout of connector, for what concern foundamental signals, is explained in Tab. 4 and in Fig. 5. PIN SIGNAL 1 TX+ 2 TX- 3 RX+ 4 N.C. 5 N.C. 6 RX- 7 N.C. 8 N.C. Tab. 4 - JPF1 - RJ45 LAN Connector - pinout Pin2: Tx- Pin1: Tx+ Pin3: Rx+ Pin6: Rx- 8.3 USB-A Host Ports (JP4,JP5) Fig. 5 JPF1 - RJ45 LAN Connector Zefeer EVB provide two USB-Host Serial Ports on JP4(USB0) and JP5(USB1). Two Ports are functionally identical. JP4 and JP5 are standard USB-connector Molex 89485-0000, so user can connect a large variety of USB devices like keyboard mouse etc. EVB provides on-board current limiter device for current sink from external USB devices and protection diodes on each USB signals. For further details about USB section refer to EVB schematics [3]. page11 of 17

8.4 JTAG Interface Connector (JP2) In Tab. 5 pinout of JP2 connector are described. JP2 make available JTAG signals of the microprocessor in order to connect a JTAG Hardware Interface. Signals are pulled up internally to Zefeer module with a 10KΩ resistor. PIN SIGNAL PIN SIGNAL 1 VCC 2 n.c. 3 TRSTn 4 GND 5 TDI 6 GND 7 TMS 8 GND 9 TCK 10 GND 11 n.c. 12 GND 13 TDO 14 GND 15 RSTn 16 GND 17 n.c. 18 GND 19 n.c. 20 GND Tab. 5 JP2-JTAG connector pinout

8.5 Expansion Connector (JP1) In the next table are shown signal of JP1 Expansion Connector. It can be used by users in order to set-up their own boards and to quickly develop their own interfaces. Only main function is indicated in the table, under column name, being several pins available for multiple puroses. The column Alt.function indicates if the pin have some alternatives function other than the primary one. Furthermore each pins also marked with * have a digital I/O port function. In order to know in detail which functions each pins provides, user should refer to the Data Sheet of the microprocessor manufacturer. Also detailed electrical specifications (levels, tolerances, timings and so on) must be verified on official document released by manufacturer (See [2]). Notice that pins marked with pin (1) are connected directly to the microcontroller. Please, take note that Addresses and Data relative to the Peripheral Bus are annotated with the convention that the zeroed bit is always the Least Significant Bit. That is D0 is the LSB of the Data and A0 is the LSB of the Addresses. page13 of 17

Pin Name Alt.function Description 1 CSn0 Chip select out used by Zefeer module for its Intenal FLASH 3 CSn1 Chip select out 5 CSn2 Chip select out NOT FREE used for NAND FLASH 7 CSn3 Chip select out 9 CSn6 Chip select out 11 CSn7 Chip select out 13 D0 Shared Data bus in/out 15 D2 Shared Data bus in/out 17 D4 Shared Data bus in/out 19 D6 Shared Data bus in/out 21 D8 Shared Data bus in/out 23 D10 Shared Data bus in/out 25 D12 Shared Data bus in/out 27 D14 Shared Data bus in/out 29 A0 Shared Address bus out 31 A2 Shared Address bus out 33 A4 Shared Address bus out 35 A6 Shared Address bus out 37 A8 Shared Address bus out 39 A10 Shared Address bus out 41 A12 Shared Address bus out 43 A14 Shared Address bus out 45 A16 Shared Address bus out 47 A18 Shared Address bus out 49 A20 Shared Address bus out 51 A22 Shared Address bus out 53 A24 Shared Address bus out 55 WEn Write Enable out 57 EGPIO0 General Purpose I/O 59 EGPIO2 General Purpose I/O 61 EGPIO8 General Purpose I/O 63 EGPIO10 General Purpose I/O 65 ADC0 External Analog Measurement Input 67 ADC1 External Analog Measurement Input 69 ADC2 External Analog Measurement Input 71 nwc Internal EEProm Write Protect (Active Low) 73 3V3 Power Supply 75 3V3 Power Supply 77 GND Ground reference 79 GND Ground reference Tab. 6 Summary of JP1 odd pins D0 = LSB, D15 = MSB

Pin Name Alt.function Description 2 INT0 Interrupt Request 0 4 INT1 Interrupt Request 1 6 INT3 Interrupt Request 3 8 D1 Shared Data bus in/out 10 D3 Shared Data bus in/out 12 D5 Shared Data bus in/out 14 D7 Shared Data bus in/out 16 D9 Shared Data bus in/out 18 D11 Shared Data bus in/out 20 D13 Shared Data bus in/out 22 D15 Shared Data bus in/out 24 A1 Shared Address bus out 26 A3 Shared Address bus out 28 A5 Shared Address bus out 30 A7 Shared Address bus out 32 A9 Shared Address bus out 34 A11 Shared Address bus out 36 A13 Shared Address bus out 38 A15 Shared Address bus out 40 A17 Shared Address bus out 42 A19 Shared Address bus out 44 A21 Shared Address bus out 46 A23 Shared Address bus out 48 A25 Shared Address bus out 50 RDn SRAM Read/OE strobe out 52 DQMn0 Shared data mask out 54 DQMn1 Shared data mask out 56 WAITn SRAM Wait In 58 EGPIO1 General Purpose I/O 60 EGPIO3 General Purpose I/O 62 EGPIO9 General Purpose I/O 64 EECLK EEPROM / Two-wire Interface clock 66 EEDAT EEPROM / Two-wire Interface data 68 ADC3 External Analog Measurement Input 70 ADC4 External Analog Measurement Input 72 RSTn System Reset 74 PORSTn Power On Reset 76 MRSTn Master Reset 78 GND Ground reference 80 GND Ground reference A0 = LSB, A15 = MSB Tab. 7 Summary of JP1 even pins page15 of 17

8.6 Zefeer Socket Connectors (J1, J2) J1 and J2 are socket connectors where Zefeer module is plugged-in. These connectors mate with the connectors of Zefeer DZA/DZB modules 3 described in chapter 4 of Zefeer Hardware Manual ([1]). Please see this reference for the detailed pinouts. Please, take note that Addresses and Data relative to the Peripheral Bus are annotated with the convention that the zeroed bit is always the Least Significant Bit. That is D0 is the LSB of the Data and A0 is the LSB of the Addresses. Cap. 9 - NAND On the Evaluation Board a NAND Flash is mounted. Since Zefeer module doesn t provide a similar type on-board, users may experiment the advantage to have a filing system on-board. Electronic schematics attached with the kit show how NAND is electrically connected to microprocessor bus. As far as software drivers, please refer to source code included in the Kits. Some GPIO pins available at J2 are used in order to access to NAND device : GPIO4,GPIO5,GPIO6,GPIO7, CSn2 so user can not use such pins. Chip select utilized for NAND access is CSn2, so user must not use it. Cap. 10 - RTC Zefeer EVB provide an IIC RTC-device with backup-lithium-battery type CR1220. Microprocessor communicates through IIC protocol (EECLK,EEDATA signals) with RTC device. Cap. 11 - Support To contact technical support, please send an e-mail to address support-zefeer@dave.eu indications of the codes. with the Cap. 12 - Schematics 3 Connector J1 of the ZefeerEVB-L will mate with connector J1 of the processor module. Connector J2 of the ZefeerEVB-L will mate with connector J2 of the processor module.

ZefeerEVB-L Schematics in PDF format are included in Zefeer Development Kits. Please contact our sales deparment for more details at sales@dave.eu References [1] Dave Srl, Zefeer Hardware Manual, 2004 [2] Cirrus Logic, EP9302 Data Sheet, 2004 [3] DAVE Srl, Zefeer EVB-L Schematics, 2004 page17 of 17