Rapid Control Prototyping Solutions Electrical Drive, Power Conversion and Power Systems

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Rapid Control Prototyping Solutions Electrical Drive, Power Conversion and Power Systems Presented by Guillaume Boué guillaume.boue@opal-rt.com 2013 OPAL-RT www.opal-rt.com

Presentation outline WHY INTRO RAPID CONTROL PROTOTYPING? APPLICATION HIGHLIGHTS 1 2 3 4 5 6 ABOUT OPAL-RT RCP TECHNOLOGY Q/A 2

Key Take-Aways Find errors at the start of your project to save time, costs and increase overall quality. Easily build real-time execution of control design; tweak and tune it with efficient tools. Efficiently address power electronics, electric drive and power systems with OPAL-RT RCP solution. 3

OPAL-RT TECHNOLOGIES in Brief Opal-RT in Brief Established in 1997 Strong R&D with 20% of turnover reinvested Large and diversified customer base One-stop-shop for Model-Based Engineering Simulators Power Electronics Power Systems Automotive Aerospace Rapid Control Prototyping (RCP) Hardware in the Loop (HIL) MATLAB/Simulink Integration 4

Client List (partial) Automotive Aerospace & Defense Education & Research Electrical & Power 5

WHY INTRO RAPID CONTROL PROTOTYPING? APPLICATION HIGHLIGHTS 1 2 3 4 5 6 ABOUT OPAL-RT RCP TECHNOLOGY Q/A 6

Model-Based Engineering Desktop Simulation Validation Rapid Control Prototyping Hardware in the Loop Testing Automatic Coding Implementation 7

What is Rapid Control Prototyping? Workstation Real-Time Computer Plant Electronic Control Unit Model Design Signal Acquisition & Display Parameter change Real-time model execution on CPU Fast I.O and signal processing Communication Real-time data logging Assess control designs in a representative environment. 8

Rapid design iteration Model Design I/O configuration Automatic Code Generation Test (easy parameter change and data visualization) Real-Time Execution 9

Benefits of RCP When software errors are introduced 70 60 50 40 30 20 Verify controler design at the earliest stage 10 0 Design Coding & Impl. Integration tests System tests Delivery 120 Cost of fixing software errors 100 at low rework and validation cost 80 60 40 20 0 Design Coding & Impl. Integration tests System tests Delivery 10

LIVE Demonstration - Overview Prepare a model for real-time execution Connect to a real plant, run experiments Benefit from handy software interfaces and dynamic parameter access to easily tweak and tune control design 11

LIVE - DFIG Control Demonstration 12

LIVE Demonstration Outcome Check DFIG control design in a representive environment Run your model in real-time without coding Interact in realtime with control model Tune and fix, iterate rapidly Reuse for several projects 13

What makes OPAL-RT Unique FPGA firmware SmartGrid Powerful computing Complex topologies Fast controls True RT datalogging 14

OPAL-RT Dedicated Solutions Electric Drives Renewable Energy Hybrid Electric Drive Electric Steering Electrical actuators Renewable Energy Resources Storage Smart Home Automation RCP-DRIVE High Power Industrial drives Multi-machine drives Multi-phase drives Marine, Oil & Gas Off-track vehicles Trains RCP-GRID Power Systems & Smart Grids Protection Relay PMU SCADA Energy Management Systems Teaching Laboratory High Voltage Power Electronics Electric Drive 250W kit Doubly Fed Induction Generators 2KW kit HVDC Meshed DC grids MMC FACTS SVCs 15

WHY INTRO RAPID CONTROL PROTOTYPING? APPLICATION HIGHLIGHTS 1 2 3 4 5 6 ABOUT OPAL-RT RCP TECHNOLOGY Q/A 16

Fast and versatile architecture Real-Time Computer Ethernet PCIExpress Analog I/O Digital I/O Workstation Multicore CPU FPGA firmware System Under Control Communication Options CAN, RS232, RS485, LIN, ARINC, MILSTD 1553 Ethernet, IEC 61850, DNP 3.0, C37.118, 17

Choice of form factor OP 4500 (Q2 2013) CPU : QuadCore & Sixcore XEON FPGA : Virtex 6 IO : 96 channels max Com. Boards : 4 max Size :12 x 15, 2U size OP 5600 CPU : QuadCore & SixCore XEON FPGA Spartan 3, Virtex 6 IO : 256 channels max Com. Boards : 6 max Size : 14 x 19, 4U size + Signal converters & conditioning modules, electrical & optical 18

Flexible I/O Connectivity Analog ADC Resolver Sinus/Cosinus Input Resolver excitation input Voltage Sensor Current Sensor Temperature Sensor Digital Quadrature encoder (A,B,Z) Hall Effect Synchronous Serial interface (SSI) Serial Peripheral interface (SPI) Custom protocol FPGA Analog DAC Resolver excitation output Digital Gate Firing Out (PWM, SVM, ) Synchronous Serial interface (SSI) Serial Peripheral Interface (SPI) FPGA Firmware Input/Ouput management Generic control functions, such as electric motor drive Specific / user-made signal processing or control logics 19

Scalable I/O Solution Optimal for : Modular Multivel Converters Multidrive systems FPGA 256 I/O channels per unit FPGA Real-Time Computer PCIExpress I/O extension units 20µs cycle time FPGA Up to 3500 IO+ All synchronized FPGA 20

RCP-DRIVE FPGA Firmware Easy to use (Simulink blockset interface) Flexible PWM settings Accurate Extrem performance Up to 120 KHz switching frequency Multidrive configuration Features : ADC PWM synchonization Sensors setting Carrier wave mode Multi-carrier PWM (phase-shift method) Dead-time setting (10ns resolution) Interleaving (for multilevel topologies) Safety output in case of fault 21

Prototype Your Own FPGA Functions Compatible with Xilinx System Generator Develop faster with ready-made functions Access to I/O, exchange data with CPU Supports floating point (Virtex 6 version) RT Datalogging of FPGA signals OPAL-RT RT-XSG blockset : CPU data exchange IO Hardware access Frequency Measurement Mean-Square & Average Quadrature Decoder Resolver In 22

Accurate Datalogging for Simpler Debugging A must-have for fast controls found in power electronics and protection applications Real-time logging of CPU/FPGA/IO signals Down to 10ns resolution Stored in MATLAB format Advanced features : High frequency sampling External, internal or manual triggered Internal Hard Drive 23

User-friendly Software Interface Model edition HMI Project & Simulator Manager 24

Dedicated Technologies for Power Electronics, Drive & Power Systems a) High performance levels : meet the most challenging needs Lowest cycle time on the market, fastest CPU & FPGA Very large I/O configuration (MMC, ) b) RCP FPGA Firmware : fast, flexible and easy to use Generic I/O and control firmware Custom FPGA controls c) Real-Time Data Logging : efficient troubleshooting High speed & lossless I/O, CPU & FPGA signals 25

WHY INTRO RAPID CONTROL PROTOTYPING? APPLICATION HIGHLIGHTS 1 2 3 4 5 6 ABOUT OPAL-RT RCP TECHNOLOGY Q/A 26

Application Highlights: Electric Motor Drive Electric Drives Hybrid Electric Drive Electric Steering Electrical actuators Electric Motor Drive Control (PMSM, BLDC, Induction ) Range extender R&D development (electric vehicle program) Used for engineering of new products (control algorithm validation) Saves expensive prototype ECU development, allows rapid control validation Illustration picture 27

Application Highlights: Modular Multilevel Converters High Voltage Power Electronics HVDC Meshed DC grids MMC FACTS SVCs Chosen by : Cell & Pole Controls Cycle time of 20µs 2500 IO channels, all synchronized Supports Half-Bridge and Full-Bridge Mode Optical interface (option)

29 Application Highlights: PMU and Relay Prototyping Power Systems & Smart Grids Protection Relay PMU SCADA Energy Management Systems Real Power System GPS clock IEC 61850, IEC 60870-5-104, DNP 3 MODBUS, Ethernet, OPC Real-Time EMT Simulation of Power System

Application Highlights: MTDC Grids High Voltage Power Electronics HVDC Meshed DC grids MMC FACTS SVCs Pole Controls Power Amplifier Pole 1 Pole 2 Power Amplifier Pole 3 Power Amplifier AC GRID REAL-TIME SIMULATOR 30

Application Highlights: Education Laboratory 2KW DFIG Teaching Laboratory Electric Drive 250W kit Doubly Fed Induction Generators 2KW kit DFIG Control Wind profile simulation 31

Thank You Questions? 32

Sources «Validation of System Architecture for Software Reliant Systems Using AADL (Architecture Analysis & Design Language) Software Engineering Institute Carnegie Mellon, Bruce Lewis (US Army), Peter H Feiler (SEI), Nov 2010. http://fm.csl.sri.com/law/2010/law2010-slides-lewis.pdf NIST Planning report 02-3, The Economic Impacts of Inadequate Infrastructure for Software Testing, May 2002. D. Galin, Software Quality Assurance: From Theory to Implementation, Pearson/Addison-Wesley (2004) B.W. Boehm, Software Engineering Economics, Prentice Hall (1981) 33