Intermediate representation

Similar documents
Intermediate Representation (IR)

ECE 5775 High-Level Digital Design Automation Fall More CFG Static Single Assignment

CSE P 501 Compilers. Intermediate Representations Hal Perkins Spring UW CSE P 501 Spring 2018 G-1

6. Intermediate Representation

Intermediate Representations. Reading & Topics. Intermediate Representations CS2210

CSE 401/M501 Compilers

6. Intermediate Representation!

Intermediate Representations

Intermediate Representations Part II

Control Flow Analysis & Def-Use. Hwansoo Han

Computing Static Single Assignment (SSA) Form. Control Flow Analysis. Overview. Last Time. Constant propagation Dominator relationships

Data Structures and Algorithms in Compiler Optimization. Comp314 Lecture Dave Peixotto

Principles of Compiler Design

Intermediate Code Generation

Middle End. Code Improvement (or Optimization) Analyzes IR and rewrites (or transforms) IR Primary goal is to reduce running time of the compiled code

Control flow and loop detection. TDT4205 Lecture 29

Compiler Construction 2009/2010 SSA Static Single Assignment Form

Lecture 3 Local Optimizations, Intro to SSA

Prof. Mohamed Hamada Software Engineering Lab. The University of Aizu Japan

Intermediate Representations

opt. front end produce an intermediate representation optimizer transforms the code in IR form into an back end transforms the code in IR form into

An Overview of GCC Architecture (source: wikipedia) Control-Flow Analysis and Loop Detection

Advanced Compilers CMPSCI 710 Spring 2003 Computing SSA

Topic I (d): Static Single Assignment Form (SSA)

Compiler Optimization Techniques

Static Single Assignment (SSA) Form

Control Flow Analysis

CS415 Compilers. Intermediate Represeation & Code Generation

CS577 Modern Language Processors. Spring 2018 Lecture Optimization

ECE 5775 (Fall 17) High-Level Digital Design Automation. Static Single Assignment

Compilers. Intermediate representations and code generation. Yannis Smaragdakis, U. Athens (original slides by Sam

SSA. Stanford University CS243 Winter 2006 Wei Li 1

Control-Flow Analysis

Compiler Passes. Optimization. The Role of the Optimizer. Optimizations. The Optimizer (or Middle End) Traditional Three-pass Compiler

Control Flow Analysis

8. Static Single Assignment Form. Marcus Denker

Control flow graphs and loop optimizations. Thursday, October 24, 13

Lecture 23 CIS 341: COMPILERS

Copyright 2003, Keith D. Cooper, Ken Kennedy & Linda Torczon, all rights reserved. Students enrolled in Comp 412 at Rice University have explicit

Goals of Program Optimization (1 of 2)

G Compiler Construction Lecture 12: Code Generation I. Mohamed Zahran (aka Z)

Computer Science Department Carlos III University of Madrid Leganés (Spain) David Griol Barres

Intermediate Representations & Symbol Tables

Tour of common optimizations

Administration CS 412/413. Why build a compiler? Compilers. Architectural independence. Source-to-source translator

What If. Static Single Assignment Form. Phi Functions. What does φ(v i,v j ) Mean?

A Bad Name. CS 2210: Optimization. Register Allocation. Optimization. Reaching Definitions. Dataflow Analyses 4/10/2013

Introduction to Machine-Independent Optimizations - 6

Alternatives for semantic processing

SSA Construction. Daniel Grund & Sebastian Hack. CC Winter Term 09/10. Saarland University

Intermediate Representations

Challenges in the back end. CS Compiler Design. Basic blocks. Compiler analysis

Principles of Compiler Design

Compiler Theory. (Intermediate Code Generation Abstract S yntax + 3 Address Code)

COP5621 Exam 4 - Spring 2005

Intermediate Representations

Loop Optimizations. Outline. Loop Invariant Code Motion. Induction Variables. Loop Invariant Code Motion. Loop Invariant Code Motion

Intermediate Representations

Data Flow Analysis and Computation of SSA

Lecture 4. More on Data Flow: Constant Propagation, Speed, Loops

Programming Language Processor Theory

Compiler Optimization Intermediate Representation

Example. Example. Constant Propagation in SSA

Example (cont.): Control Flow Graph. 2. Interval analysis (recursive) 3. Structural analysis (recursive)

Module 14: Approaches to Control Flow Analysis Lecture 27: Algorithm and Interval. The Lecture Contains: Algorithm to Find Dominators.

Acknowledgement. CS Compiler Design. Intermediate representations. Intermediate representations. Semantic Analysis - IR Generation

Compiler Design. Fall Control-Flow Analysis. Prof. Pedro C. Diniz

Where we are. What makes a good IR? Intermediate Code. CS 4120 Introduction to Compilers

COMP 181. Prelude. Intermediate representations. Today. High-level IR. Types of IRs. Intermediate representations and code generation

Compiler Construction 2016/2017 Loop Optimizations

Sardar Vallabhbhai Patel Institute of Technology (SVIT), Vasad M.C.A. Department COSMOS LECTURE SERIES ( ) (ODD) Code Optimization

Intermediate Code & Local Optimizations. Lecture 20

CS 406/534 Compiler Construction Putting It All Together

CS293S Redundancy Removal. Yufei Ding

CSE443 Compilers. Dr. Carl Alphonce 343 Davis Hall

4/1/15 LLVM AND SSA. Low-Level Virtual Machine (LLVM) LLVM Compiler Infrastructure. LL: A Subset of LLVM. Basic Blocks

Concepts Introduced in Chapter 6

CSE Section 10 - Dataflow and Single Static Assignment - Solutions

PSD3A Principles of Compiler Design Unit : I-V. PSD3A- Principles of Compiler Design

Intermediate Code & Local Optimizations

PRINCIPLES OF COMPILER DESIGN

ELEC 876: Software Reengineering

CODE GENERATION Monday, May 31, 2010

Lecture Outline. Intermediate code Intermediate Code & Local Optimizations. Local optimizations. Lecture 14. Next time: global optimizations

CS5363 Final Review. cs5363 1

CSE P 501 Compilers. SSA Hal Perkins Spring UW CSE P 501 Spring 2018 V-1

CONTROL FLOW ANALYSIS. The slides adapted from Vikram Adve

A Practical and Fast Iterative Algorithm for φ-function Computation Using DJ Graphs

Homework 1 Answers. CS 322 Compiler Construction Winter Quarter 2006

VIVA QUESTIONS WITH ANSWERS

Run-time Environments. Lecture 13. Prof. Alex Aiken Original Slides (Modified by Prof. Vijay Ganesh) Lecture 13

CMSC430 Spring 2014 Midterm 2 Solutions

Static single assignment

Data Flow Analysis. Agenda CS738: Advanced Compiler Optimizations. 3-address Code Format. Assumptions

CFG (Control flow graph)

Induction Variable Identification (cont)

Compiler Structure. Data Flow Analysis. Control-Flow Graph. Available Expressions. Data Flow Facts

Group B Assignment 9. Code generation using DAG. Title of Assignment: Problem Definition: Code generation using DAG / labeled tree.

Compiler Construction 2010/2011 Loop Optimizations

Loops. Lather, Rinse, Repeat. CS4410: Spring 2013

Transcription:

Intermediate representation Goals: encode knowledge about the program facilitate analysis facilitate retargeting facilitate optimization scanning parsing HIR semantic analysis HIR intermediate code gen. LIR optim LIR code gen. 1

Intermediate representation Components Issues code representation symbol table analysis information string table Use an existing IR or design a new one? How close should it be to the source/target? 2

IR selection Using an existing IR cost savings due to reuse it must be expressive and appropriate for the compiler operations Designing an IR decide how close to machine code it should be decide how expressive it should be decide its structure consider combining different kinds of IRs 3

IR classification: Level High-level closer to source language used early in the process usually converted to lower form later on Example: AST 4

IR classification: Level Medium-level try to reflect the range of features in the source language in a language-independent way most optimizations are performed at this level algebraic simplification copy propagation dead-code elimination common subexpression elimination loop-invariant code motion etc. 5

IR classification: Level Low-level very close to target-machine instructions architecture dependent useful for several optimizations loop unrolling branch scheduling instruction/data prefetching register allocation etc. 6

IR classification: Level for i := op1 to op2 step op3 instructions endfor High-level i := op1 if step < 0 goto L2 L1: if i > op2 goto L3 instructions i := i + step goto L1 L2: if i < op2 goto L3 instructions i := i + step goto L2 L3: Medium-level 7

IR classification: Structure Graphical Linear Hybrid Trees, graphs Not easy to rearrange Large structures Looks like pseudocode Easy to rearrange Combine graphical and linear IRs Example: low-level linear IR for basic blocks, and graph to represent flow of control 8

Graphical IRs Parse tree Abstract syntax tree High-level Useful for source-level information Retains syntactic structure Common uses source-to-source translation semantic analysis syntax-directed editors 9

Graphical IRs Tree, for basic block* Uses: root: operator up to two children: operands can be combined algebraic simplifications may generate locally optimal code. gt, t2 add, t1 0 L1: i := 2 assgn, i add, t1 gt, t2 t1:= i+1 t2 := t1>0 if t2 goto L1 2 i 1 t1 0 assgn, i 1 2 *straight-line code with no branches or branch targets. 10

Graphical IRs Directed acyclic graphs (DAGs) Like compressed trees leaves: variables, constants available on entry internal nodes: operators annotated with variable names? distinct left/right children Used for basic blocks (DAGs don't show control flow) Can generate efficient code. Note: DAGs encode common expressions But difficult to transform Good for analysis 11

Graphical IRs Generating DAGs Check whether an operand is already present if not, create a leaf for it Check whether there is a parent of the operand that represents the same operation if not create one, then label the node representing the result with the name of the destination variable, and remove that label from all other nodes in the DAG. 12

Graphical IRs Directed acyclic graphs (DAGs) Example m := 2 * y * z n := 3 * y * z p := 2 * y - z 13

Graphical IRs Control flow graphs (CFGs) Each node corresponds to a basic block, or part of a basic block, or may need to determine facts at specific points within BB a single statement more space and time Each edge represents flow of control 14

Graphical IRs Dependence graphs : they represents constraints on the sequencing of operations Dependence = a relation between two statements that puts a constraint on their execution order. Control dependence Based on the program's control flow. Data dependence Based on the flow of data between statements. Nodes represent statements Edges represent dependences Labels on the edges represent types of dependences Built for specific optimizations, then discarded 15

Graphical IRs Dependence graphs Example: s1 a := b + c s2 if a>10 goto L1 s3 d := b * e s4 e := d + 1 s5 L1: d := e / 2 s1 s2 s3 s4 s5 control dependence: s3 and s4 are executed only when a<=10 true or flow dependence: s2 uses a value defined in s1 This is read-after-write dependence antidependence: s4 defines a value used in s3 This is write-after-read dependence output dependence: s5 defines a value also defined in s3 This is write-after-write dependence input dependence: s5 uses a value also uses in s3 This is read-after-read situation. It places no constraints in the execution order, but is used in some optimizations. 16

Basic blocks Basic block = a sequence of consecutive statements in which flow of control enters at the beginning and leaves at the end without halt or possibility of branching except at the end. Partitioning a sequence of statements into BBs 1. Determine leaders (first statements of BBs) The first statement is a leader The target of a conditional is a leader A statement following a branch is a leader 2. For each leader, its basic block consists of the leader and all the statements up to but not including the next leader. 17

Basic blocks unsigned int fibonacci (unsigned int n) { unsigned int f0, f1, f2;; f0 = 0;; f1 = 1;; if (n <= 1) return n;; for (int i=2;; i<=n;; i++) { f2 = f0+f1;; f0 = f1;; f1 = f2;; } return f2;; } read(n) f0 := 0 f1 := 1 if n<=1 goto L0 i := 2 L2: if i<=n goto L1 return f2 L1: f2 := f0+f1 f0 := f1 f1 := f2 i := i+1 go to L2 L0: return n 18

Basic blocks Leaders: entry read(n) f0 := 0 f1 := 1 if n<=1 goto L0 i := 2 L2: if i<=n goto L1 return f2 L1: f2 := f0+f1 f0 := f1 f1 := f2 i := i+1 go to L2 L0: return n i := 2 i<=n f2 := f0+f1 f0 := f1 f1 := f2 i := i+1 read(n) f0 := 0 f1 := 1 n <= 1 return f2 return n exit 19

Linear IRs Sequence of instructions that execute in order of appearance Control flow is represented by conditional branches and jumps Common representations stack machine code three-address code 20

Linear IRs Stack machine code Assumes presence of operand stack Useful for stack architectures, JVM Operations typically pop operands and push results. Advantages Easy code generation Compact form Disadvantages Difficult to rearrange Difficult to reuse expressions 21

Linear IRs Three-address code Compact Generates temp variables Level of abstraction may vary Loses syntactic structure Quadruples operator up to two operands destination Triples similar to quadruples but the results are not named explicitly (index of operation is implicit name) Implement as table, array of pointers, or list 22

Linear IRs L1: i := 2 t1:= i+1 t2 := t1>0 if t2 goto L1 Quadruples (1) 2 (2) i st (1) (3) i + 1 (4) (3) > 0 (5) if (4), (1) Triples 23

SSA form Static Single Assignment Form Encodes information about data and control flow Two constraints: Each definition has a unique name Each use refers to a single definition all uses reached by a definition are renamed accordingly Advantages: Simplifies data flow analysis & several optimizations SSA size is linear to program size Eliminates certain dependences (write-after-read, writeafter-write) Example: x := 5 x := x +1 y := x * 2 x 0 := 5 x 1 := x 0 +1 y 0 := x 1 * 2 24

SSA form Consider a situation where two control-flow paths merge (e.g. due to a loop, or an if-statement) read(x) if ( x > 0) y:= 5 else y:=10 x := y read(x) x > 0 y := 5 y := 10 x := y read(x 0 ) x 0 > 0 y 0 := 5 y 1 := 10 x 1 := y should this be y 0 or y 1? 25

SSA form The compiler inserts special join functions (called ϕ- functions) at points where different control flow paths meet. read(x 0 ) x 0 > 0 y 0 := 5 y 1 := 10 y 2 = ϕ(y 0, y 1 ) x 1 := y 2 ϕ is not an executable function! If we do need to generate executable code from this form, we insert appropriate copy statements in the predecessors: y 0 := 5 y 1 := 10 y 2 := y 0 y 2 := y 1 x 1 := y 2 26

SSA form Example 2: x := 0 i := 1 while (i<10) x := x+i i := i+1 x := 0 i := 1 i < 10 x 0 := 0 i 0 := 1 x 1 := ϕ(x 0, x 2 ) i 1 := ϕ(i 0, i 2 ) i 1 < 10 x := x + 1 i := i + 1 exit x 2 := x 1 + 1 i 2 := i 1 + 1 exit 27

SSA form B2 B1 B3 x 0 := 0 i 0 := 1 x 1 := ϕ(x 0, x 2 ) i 1 := ϕ(i 0, i 2 ) i 1 < 10 x 2 := x 1 + 1 i 2 := i 1 + 1 exit When and where do we add ϕ functions? Intuition: There is a definition of x in B1 and another in B2 There is a path from B1 to B3 There is a path from B2 to B3 B3 is the first "common" node in these two paths. A ϕ function for x should be placed in B3. 28

SSA form A program is in SSA form if Each variable is assigned a value in exactly one statement Each use of a variable is dominated by the definition. Domination Node A dominates node B if every path from the flow graph entry to B goes through A Every node dominates itself Intuition: control will have to go through A in order to reach B Dominators are useful in identifying loops and in computing the SSA form. 29

Dominators A node N may have several dominators, but one of them will be closest to N and be dominated by all other dominators of N. That node is called the immediate dominator of N. The dominator tree is a data structure that shows the dominator relationships of a control flow graph. Each node in the tree is the immediate dominator of its children. 30

entry B2 B1 B3 B4 The dominator tree shows the dominator relation: each node in the tree is the immediate dominator of its children. Example: B7 is dominated by B1, B3, and B4, but its immediate (closest) dominator is B4 Note: B5 does not dominate B7 because we can go from the entry to B7 through the B6 path. B1 B5 B6 B2 B3 B7 B8 B4 B5 B6 B7 B9 exit B10 B9 B8 B10 31

Dominators and loops We can use dominators to identify the loops in a flow graph: Natural Loop = A set of basic blocks with a single entry point called the header, which dominates all other blocks in the set, and at least one way to iterate (i.e. go back to the header) Loop-finding algorithm: Find an edge B A where A dominates B. This is called a back-edge. Add A and B to the loop Find all nodes that can reach B without going through A. Add them to the loop. 32

entry Loops B2 B1 back edge: B9 B1 loop: {B9, B8, B7, B10, B6, B5, B4, B3, B2, B1} B3 back edge: B10 B7 loop: {B10, B8, B7} B4 B5 B6 back edge: B8 B3 loop: {B8, B7, B10, B6, B5, B4, B3 } B7 back edge: B7 B4 loop: {B7, B10, B6, B5, B8, B4} B9 B8 B10 back edge: B4 B3 loop: {B4, B7, B10, B8, B6, B5, B3} exit 33

Nested Loops Loop K is nested within loop L if L and K have different headers, λ and κ respectively, and λ is dominated by κ 34

Dominators and SSA form Dominators can be used in a more efficient computation of the SSA form. Node A strictly dominates node B if A dominates B and A B. The dominance frontier of a node B is the set of all nodes X such that B does not strictly dominate X B dominates a predecessor of X Intuition: The nodes in the dominance frontier of B are destinations of the edges that leave an area dominated by B. Since those destinations are not dominated by B, there must be some other path from the entry to them. Therefore, they must be convergence points, and we need to place ϕ functions in them for any variables defined in B. Y is a successor of X if there is an edge X Y in the flow graph. 35

Dominance frontier B0 B2 dominates B3, B4, and B5. B1 B2 does not dominate B6 or B8, but does dominate their predecessors. B11 B3 B2 B4 B7 B6 and B8 are the dominance frontier of B2. The paths that converge to B8 have been marked. B5 B8 B9 For each variable definition in B2, insert a ϕ function in B6 and in B8. B6 B10 36

Dominance frontier The dominance frontier of a node B can be computed as follows: DF(B) = DF local (B) U where: U C DF up (C) C is the set of children of B in the dominator tree DF up (C) is the set of nodes in the dominance frontier of C, that are not strictly dominated by C's immediate dominator DF local (B) are the successors of B that are not strictly dominated by B. 37

Dominance frontier algorithm compute the dominator tree for each X in a bottom-up traversal of the tree, do DF(X) := { } for each Y Succ (X) do if (idom (Y) X) DF local then DF(X) := DF(X) {Y} end for for each Z in children(x) do for each W DF(Z) do if (idom (W) X) then DF(X) := DF(X) {Y} DF up end for end for end for 38

entry 1 entry 3 2 1 exit {ex} 4 5 7 2 {ex} 6 8 {8} 3 7 8 {8} {2, ex} 9 4 5 6 9 {6} {6} {8} {2, ex} 1 0 1 1 1 0 {11} 1 1 {9, 2, ex} 1 2 exit 1 2 {local, up} {2, ex} 39

entry B0 B1 entry B0 {} B2 B11 B1 B6 exit B11 B3 B4 B7 {B6} {B6, exit} {exit} B5 B8 B9 B8 B2 B7 {B8, B6} {B10} {B8, B10} B10 {exit} B6 B10 B3 B4 B5 B9 exit {B5} {B8} {B6} {B10} 40