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SMBus Slave Datasheet SMBusSlave V 2.00 001-81371 Rev. *A SMBusSlave Copyright 2012-2013 Cypress Semiconductor Corporation. All Rights Reserved. PSoC Blocks API Memory (Bytes) Resources Digital Analog CT Analog SC Flash RAM Pins Supported devices: CY8C29x66, CY8C27x43, CY8C28xxx, CY8C24x23, CY8C24x33, CY8C21x23, CY8C21x34, CY8C21x45, CY8C22x45, CY8C24x94 Configuration 1 0 0 0 934 31 2 5 Features and Overview Industry standard SMBus compatible slave interface Supports SMBus Host Notify Protocol (HNP) using command and through a dedicated Alert pin Optional Packet Error Check (PEC) Standard data rate of 50/100 kbps High-level Application Program Interface (API) requires minimal user programming The SMBus Slave User Module provides a SMBus slave interface that is fully compliant with the Physical and Digital Link layers described in the SMBus Specification Version 2.0. This user module can be used in conjunction with other master and slave devices connected to a single SMBus segment. This user module uses an I2C controller and its interrupt for its physical layer. Functional Description The SMBus Slave User Module communicates with the bus master using the protocol described in the Data Link layer of the SMBus Specification Version 2.0. It communicates over the SMBDAT and SMBCLK lines and has the following features: Detects START, repeated START, STOP, and bus idle conditions Responds with an ACK when addressed by the bus master Achieves clock-stretching and synchronization Communicates in accordance with all of the specification's bus protocols Responds to data with ACK/NACK Implements PEC when specified by the user Notifies the host using the SMBus HNP Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-81371 Rev. *A Revised May 16, 2013

The SMBus Slave User Module supports all of the bus protocols mentioned in Section 5.5 of the SMBus Specification Version 2.0. For all of these protocols, PEC applies if the Packet Error Check parameter is enabled. The generic protocol diagram is shown in Figure 1. Figure 1. Generic Protocol Diagram Note The SMBus Slave User Module does not support Address Resolution Protocol (ARP). Addressing Mechanism The slave address has to be configured in the parameters wizard using the Slave Address parameter. It can also be dynamically changed in firmware using SMBusSlave_SetAddr(). You can use two GPIO pins to set the lower two bits of the slave address by enabling the Hardwired Slave Address parameter. The Slave Address Pin A0 and Slave Address Pin A1 parameters select the two GPIO pins. If the Hardwired Slave Address parameter is enabled, these two pins will be monitored during startup, and their logic levels will be used to set the two least significant bits of the slave address (Pin A1 = slave address bit 1, Pin A0 = slave address bit 0). The upper five bits of the slave address will equal bits 6 2 of the Slave Address parameter. When SMBusSlave_SetAddr() is used to dynamically change the slave address in firmware, Slave Address Pin A0 and Slave Address Pin A1 are ignored even if the Hardwired Slave Address parameter is enabled. The new slave address will be set by the parameters passed to the SMBusSlave_SetAddr() function. Slave Address Pin A0 and Slave Address Pin A1 are only monitored during startup. Document Number: 001-81371 Rev. *A Page 2 of 17

RAM Interface for SMBus Commands The SMBus Slave User Module allows the master to access specific RAM buffers through each SMBus command. The data presented to the master can be a single variable, an array of values, or a structure. A different RAM buffer can be exposed for each SMBus command. The SMBus Slave User Module will read from/write to the appropriate RAM buffer depending on the command it receives from the master. Before any transfers occur, the user has to assign a command code and initialize the RAM buffer for each SMBus command using SMBusSlave_SetCommand() and SMBusSlave_SetBuffer(). Both of these functions have to be performed during initialization before starting the user module. Assign a Command Code SMBusSlave_SetCommand (BYTE Command_Name, BYTE Command_Code) Command Name: The SMBus command name that the user module uses to map the command name to its command code. Possible values for this parameter are: WRITE_BYTE, WRITE_WORD, READ_BYTE, READ_WORD, PROCESS_CALL, BLOCK_WRITE, BLOCK_READ, and BLOCK_WRITE_BLOCK_READ_PROCESS_CALL. Command Code: The command code for the given command name. Possible values for this parameter are 0x00-0xFF. The user has to make sure no two commands have the same command code. Exceptions: The Quick Command, Send Byte, and Receive Byte commands do not need to be assigned a command code. Initialize the RAM Buffer SMBusSlave_ SetBuffer (BYTE Command_Name, (BYTE *) paddr) Command_Name: The SMBus command name that the User Module will use to map the command name to its RAM buffer. Possible values for this parameter are: WRITE_BYTE, WRITE_WORD, READ_BYTE, READ_WORD, BLOCK_WRITE, and BLOCK_READ. paddr: A pointer to the RAM buffer for the given command name. Exceptions: The Quick Command, Send Byte and Receive Byte commands do not need to be assigned a RAM Buffer. These commands use default single byte RAM variables. The Process Call command uses the Write Word and Read Word command buffers. The Block Write Block Read Process Call command uses the Block Write and Block Read command buffers. Buffer lengths: Write Byte and Read Byte command buffers = one byte Write Word and Read Word command buffers = two bytes Block Write = Block Write Buffer Length parameter Block Ready = Block Read Buffer Length parameter Note The sum of these two buffers cannot exceed 32 bytes Refer to the Sample Firmware Source Code for the initialization code. Document Number: 001-81371 Rev. *A Page 3 of 17

Command Descriptions Quick Command The SMBus Slave sets/clears a pre-defined flag (variable) which reflects the R/W bit received through this command. Send Byte The SMBus Slave writes the received byte to a pre-defined user module variable. Receive Byte The SMBus Slave sends the byte variable from a pre-defined user module variable. Write Byte When the SMBus Slave receives a byte through this protocol along with a valid command code defined by the user, it writes the byte to the RAM buffer initialized by the user. Write Word When the SMBus Slave receives a word through this protocol, along with a valid command code defined by the user, it writes the word to the RAM buffer initialized by user. Read Byte When the SMBus Slave receives this command along with a valid command code defined by the user, it sends one byte from the RAM buffer initialized by user. Read Word When the SMBus Slave receives this command along with a valid command code defined by the user, it sends the word from the RAM buffer initialized by user. Process Call When the SMBus Slave receives this command along with a valid command code defined by the user, it receives the word sent by the master, writes it to the RAM buffer assigned to the Write Word command, and sends the word from the RAM buffer assigned to the Read Word command. Block Write When the SMBus Slave receives this command along with a valid command code defined by the user, it checks the Byte Count (N) the master wants to write. If N is less than or equal to the Block Write Buffer Length parameter, the slave reads N bytes from the master, and writes them to the RAM buffer assigned to the Block Write command. If N is greater than the Block Write Buffer Length parameter, it NACKs the Byte Count byte sent by the master. Block Read When the SMBus Slave receives this command along with a valid command code defined by the user, it sends the Byte Count (N) to the master, where N is equal to the Block Read Buffer Length parameter. Then, it sends N bytes to the master from the RAM buffer assigned to the Block Read command. Block Write-Block Read Process Call When the SMBus Slave receives this command along with a valid command code defined by the user, it checks the Byte Count (N) the master wants to write. If N is less than or equal to the Block Write Buffer Length parameter, it reads N bytes from the master, and writes them to the RAM buffer assigned to the Block Write command. After a repeated start, the SMBus Slave sends the Byte Count (M) to the master, where M is equal to the Block Read Buffer Length parameter. Then, it sends M Document Number: 001-81371 Rev. *A Page 4 of 17

bytes to the master from the RAM assigned to the Block Read command. The total bytes transferred during this command must be less than 32 bytes. SMBus Host Notify Protocol This protocol will not be initiated by the master. Whenever the user wants to notify the host, they can do so using SMBusSlave_NotifyHost(). SMBusSlave_NotifyHost (BYTE, BYTE Databyte1, BYTE Databyte2) : This determines the method for notifying the host: 0 = SMBALERT pin method 1 = Host notify command method Databyte1: This is the Data Byte Low of the SMBus Host Notify protocol Databyte2: This is Data Byte High byte of the SMBus Host Notify protocol Note The Databyte1 and Databyte2 parameters are valid only for the HNP method. For the SMBALERT pin method, these parameters are ignored. The user module will momentarily become the master and drive both SMBDAT and SMBCLK. The SMBus Slave will use the byte sequence shown in Figure 2 to notify the host. Figure 2. Host Notify Protocol DC and AC Electrical Characteristics The following values are indicative of expected performance and based on initial characterization data. Unless otherwise specified, temperature ranges are 40 C to 125 C, supply voltages range from 2.95 V to 5.3 V. Table 1. DC Electrical Characteristics Limits Symbol Parameter Min Max Units VIL Data, Clock Input Low Voltage 0.8 V VIH Data, Clock Input High Voltage 2.1 VDD V VOL Data, Clock Output Low Voltage 0.4 V ILEAK Input leakage ±5 µa IPULLUP Current through pull-up resistor or current source 100 350 µa VDD Nominal bus voltage 2.7 5.5 V Document Number: 001-81371 Rev. *A Page 5 of 17

Note The T TIMEOUT, T SEXT, and T MEXT specifications mentioned in SMBus Specification Version 2.0, are not met by this user module because of the hardware limitation. Table 2. AC Electrical Characteristics Limits Symbol Parameter Min Max Units FSMB SMBus Operating Frequency 10 100 khz TBUF THD:STA Bus free time between Stop and Start Condition Hold time after (Repeated) Start Condition. After this period, the first clock is generated 4.7 µs 4.0 µs TSU:STA Repeated Start Condition setup time 4.7 µs TSU:STO Stop Condition setup time 4.0 µs THD:DAT Data hold time 300 ns TSU:DAT Data setup time 250 ns TLOW Clock low period 4.7 µs THIGH Clock high period 4.0 µs TF Clock/Data Fall Time 300 ns TR Clock/Data Rise Time 1000 ns TPOR Time in which a device must be operational after power-on reset 500 ms Placement The SMBus Slave User Module does not require any digital or analog PSoC blocks. It consumes one I 2 C controller block and its dedicated interrupt. The devices that have multiple I 2 C controller blocks will support multiple SMBus Slave User Module placements. Multiple placements are not supported in other devices. Parameters and Resources After a SMBus Slave User Module is selected and placed using the Device Editor, values may be selected and altered for the following parameters. Slave Address This parameter selects the 7-bit slave address for the SMBus_Slave User Module. Char Range 0 127 Default 0 Document Number: 001-81371 Rev. *A Page 6 of 17

Dependence on other parameters: If the Hardwired Slave Address is enabled, the slave address is limited to only the most significant five bits. The remaining two bits are set to Slave Address Pin A0 and Slave Address Pin A1. If the Hardwired Slave Address is disabled, the slave address is all seven bits of this parameter. Hardwired Slave Address This parameter selects whether the two least significant bits of the slave address are hardwired. Range Default Boolean Enable/Disable Disable Packet Error Check This parameter checks whether to use PEC during communication. Range Default Boolean Enable/Disable Enable Auto Address Check This parameter selects whether the hardware address recognizing feature is enabled. If it is disabled, the hardware address comparison feature is not available. This parameter is available only in the CY8C28xxx family PSoC devices. Range Default Boolean Enable/Disable Enable SMBus Clock This parameter selects the clock speed used with the SMBus slave. Range Default Integer 50 khz 100 khz 100 khz SMBus Pins This parameter selects the Port 1 pins for the SMBus Slave signals (SMBDAT and SMBCLK). Document Number: 001-81371 Rev. *A Page 7 of 17

Range Default Boolean P1[0] - P1[1] or P1[5] - P1[7] P1[0] - P1[1] SMBALERT Pin This parameter selects the pin for SMBALERT signal. Range Default Enum Any GPIO Slave Address Pin A0 This parameter selects the pin for A0 bit of slave address. Range Default Enum Any GPIO Dependence on other parameters: If the Hardwired Slave Address is enabled, this parameter is valid If the Hardwired Slave Address is disabled, this parameter is grayed out Slave Address Pin A1 This parameter selects the pin for A1 bit of slave address. Range Default Enum Any GPIO Dependence on other parameters: If the Hardwired Slave Address is enabled, this parameter is valid If the Hardwired Slave Address is disabled, this parameter is grayed out Block Write Buffer Length This parameter sets the RAM buffer length for the Block Write command. Document Number: 001-81371 Rev. *A Page 8 of 17

Integer Range 1 32 Default 1 Block Read Buffer Length This parameter sets the RAM buffer length for the Block Read command. Integer Range 1 32 Default 1 Application Programming Interface The Application Programming Interface (API) routines are provided as part of the User Module to allow the designer to deal with the module at a higher level. This section specifies the interface to each function together with related constants provided by the "include" files. Note In this, as in all user module APIs, the values of the A and X register may be altered by calling an API function. It is the responsibility of the calling function to preserve the values of A and X before the call if those values are required after the call. This registers are volatile policy was selected for efficiency reasons and has been in force since version 1.0 of PSoC Designer. The C compiler automatically takes care of this requirement. Assembly language programmers must ensure their code observes the policy, too. Though some user module API function may leave A and X unchanged, there is no guarantee they may do so in the future. Slave Functions The following functions are specific to the Slave version of the SMBusSlave User Module. SMBusSlave_Start Description: Enables the SMBusSlave. C Prototype: void SMBusSlave_Start (void); Assembly: lcall SMBusSlave_Start Parameters: Return Value: Document Number: 001-81371 Rev. *A Page 9 of 17

SMBusSlave_SetAddr Description: This function sets the slave address that is recognized by the SMBus Master. The range of this address should be limited depending on the Hardwired Slave Address parameter. C Prototype: void SMBusSlave_SetAddr (BYTE baddr); Assembly: mova, 0x05 lcall SMBusSlave_SetAddr Parameters: BYTE baddr: Slave address range depending on Hardwired Slave Address Return Value: SMBusSlave_Stop Description: Disables the SMBusSlave. C Prototype: void SMBusSlave_Stop (void); Assembly: lcall SMBusSlave_Stop Parameters: Return Value: SMBusSlave_SetBuffer Description: Configures the RAM Buffer for reading and writing operations from the master for a particular command. C Prototype: void SMBusSlave_SetBuffer (BYTE bcommand_name, BYTE * paddr); Assembly: lcall SMBusSlave_SetBuffer Parameters: BYTE Command_Name: The SMBus command being initialized. BYTE Command_Code: The command code for the specified command name. Document Number: 001-81371 Rev. *A Page 10 of 17

Return Value: SMBusSlave_SetCommand Description: Assigns a command code for a specific SMBus command. C Prototype: void SMBusSlave_SetCommand (BYTE Command_Name, BYTE Command_Code); Assembly: lcall SMBusSlave_SetCommand Parameters: BYTE Command_Name: The SMBus command being initialized. BYTE Command_Code: The command code for the specified command name. Return Value: SMBusSlave_NotifyHost Description: Notifies the host either through the SMBALERT pin or through the Host notify command depending on the "" parameter. C Prototype: void SMBusSlave_NotifyHost (BYTE, BYTE Databyte1, BYTE Databyte2); Assembly: lcall SMBusSlave_NotifyHost Parameters: BYTE : This determines the method of notifying the host. 0 = SMBALERT pin 1 = Host notify command BYTE Databyte1: This is the data byte 1 of the SMBus Host notify protocol. This parameter is only valid when = 1. BYTE Databyte2: This is the data byte 2 of the SMBus Host notify protocol. This parameter is only valid when = 1. Return Value: Document Number: 001-81371 Rev. *A Page 11 of 17

Sample Firmware Source Code The following C code illustrates the use of the APIs: //---------------------------------------------------------------------------- // SMBusSlave sample code // UM should be configured as follows: // - Name: SMBusSlave // - Slave Address: 4 // - Block Write Buffer Length: 6 // - Block Read Buffer Length: 6 // All other UM parameters should be left by default // //Here is almost SMBus Protocols to use with Bridge Control Panel tool: // w 4 bb 80 p ;send byte NOTIFYHOST (PEC 80) // r 4 x x p ;receive byte (PEC e2) // w 4 40 b6 01 p ;write byte SMBALERT (PEC 01) // w 4 50 ab cd 76 p ;write word (PEC 76) // w 4 60 r 4 x x p ;read byte (PEC 82) // w 4 70 r 4 x x x p ;read word (PEC b6) // w 4 80 ab cd r 4 x x x p ;process call (PEC 83) // w 4 20 4 1 2 3 4 bd p ;block write (PEC bd) // w 4 30 r 4 x x x x x x x x p ;block read (PEC a6) // w 4 10 5 2 3 4 5 6 r 4 x x x x x x x x p ;block process call (PEC 04) //---------------------------------------------------------------------------- #include <m8c.h> #include "PSoCAPI.h" // part specific constants and macros // PSoC API definitions for all User Modules BYTE bablockwritebuffer[smbusslave_block_write_buffer_length]; BYTE bablockreadbuffer[] = {10, 11, 12, 13, 14, 15}; BYTE WriteByteBuffer; WORD WriteWordBuffer; BYTE ReadByteBuffer = 0xad; WORD ReadWordBuffer = 0xbcde; void main(void) { M8C_EnableGInt; SMBusSlave_Start(); SMBusSlave_SetCommand(SMBusSlave_BLOCK_WRITE, 0x20); SMBusSlave_SetCommand(SMBusSlave_BLOCK_READ, 0x30); SMBusSlave_SetCommand(SMBusSlave_WRITE_BYTE, 0x40); SMBusSlave_SetCommand(SMBusSlave_WRITE_WORD, 0x50); SMBusSlave_SetCommand(SMBusSlave_READ_BYTE, 0x60); SMBusSlave_SetCommand(SMBusSlave_READ_WORD, 0x70); SMBusSlave_SetCommand(SMBusSlave_PROCESS_CALL, 0x80); SMBusSlave_SetCommand(SMBusSlave_BLOCK_WRITE_BLOCK_READ_PROCESS_CALL, 0x10); SMBusSlave_SetBuffer(SMBusSlave_BLOCK_WRITE, bablockwritebuffer); SMBusSlave_SetBuffer(SMBusSlave_BLOCK_READ, bablockreadbuffer); SMBusSlave_SetBuffer(SMBusSlave_WRITE_BYTE, &WriteByteBuffer); SMBusSlave_SetBuffer(SMBusSlave_WRITE_WORD, (BYTE *) &WriteWordBuffer); SMBusSlave_SetBuffer(SMBusSlave_READ_BYTE, &ReadByteBuffer); SMBusSlave_SetBuffer(SMBusSlave_READ_WORD, (BYTE *) &ReadWordBuffer); Document Number: 001-81371 Rev. *A Page 12 of 17

} SMBusSlave_bReceiveByte = 0xaa; while(1) { if(smbusslave_bsendbyte == 0xbb) { SMBusSlave_bSendByte = 0; SMBusSlave_NotifyHost(SMBusSlave_NOTIFYHOST, 5, 6); } if(writebytebuffer == 0xb6) { WriteByteBuffer = 0; } } SMBusSlave_NotifyHost(SMBusSlave_SMBALERT, 5, 6); The following is the Assembly sample code: ;---------------------------------------------------------------- ; SMBusSlave sample code ; ; UM should be configured as follows: ; - Name: SMBusSlave ; - Slave Address: 4 ; - Block Write Buffer Length: 6 ; - Block Read Buffer Length: 6 ; All other UM parameters should be left by default ; ; Here are some SMBus Protocols to use with Bridge Control Panel tool: ; w 4 bb 80 p ;send byte NOTIFYHOST (PEC 80) ; w 4 40 b6 01 p ;write byte SMBALERT (PEC 01) ; w 4 20 4 1 2 3 4 bd p ;block write (PEC bd) ; w 4 30 r 4 x x x x x x x x p ;block read (PEC a6) ; w 4 10 5 2 3 4 5 6 r 4 x x x x x x x x p ;block process call (PEC 04) ;---------------------------------------------------------------- include "m8c.inc" ; part specific constants and macros include "memory.inc" ; Constants & macros for SMM/LMM and Compiler include "PSoCAPI.inc" ; PSoC API definitions for all User Modules export _main export bablockwritebuffer export bablockreadbuffer export bwritebytebuffer area data (rel,con,ram) bablockwritebuffer: BLK SMBusSlave_BLOCK_WRITE_BUFFER_LENGTH bablockreadbuffer: BLK SMBusSlave_BLOCK_READ_BUFFER_LENGTH bwritebytebuffer: BLK 1 area text (rel,con,rom,code) Document Number: 001-81371 Rev. *A Page 13 of 17

_main: mov [bablockreadbuffer + 0], 10 mov [bablockreadbuffer + 1], 11 mov [bablockreadbuffer + 2], 12 mov [bablockreadbuffer + 3], 13 mov [bablockreadbuffer + 4], 14 mov [bablockreadbuffer + 5], 15 mov [SMBusSlave_bReceiveByte], aah M8C_EnableGInt lcall SMBusSlave_Start mov X, 40h mov A, SMBusSlave_WRITE_BYTE lcall SMBusSlave_SetCommand mov X, 30h mov A, SMBusSlave_BLOCK_READ lcall SMBusSlave_SetCommand mov X, 20h mov A, SMBusSlave_BLOCK_WRITE lcall SMBusSlave_SetCommand mov X, 10h mov A, SMBusSlave_BLOCK_WRITE_BLOCK_READ_PROCESS_CALL lcall SMBusSlave_SetCommand mov A, >bablockreadbuffer mov A, <bablockreadbuffer mov A, SMBusSlave_BLOCK_READ lcall SMBusSlave_SetBuffer add SP, -3 mov A, >bablockwritebuffer mov A, <bablockwritebuffer mov A, SMBusSlave_BLOCK_WRITE lcall SMBusSlave_SetBuffer add SP, -3 mov A, >bwritebytebuffer mov A, <bwritebytebuffer mov A, SMBusSlave_WRITE_BYTE lcall SMBusSlave_SetBuffer add SP, -3.mainloop: cmp [SMBusSlave_bSendByte], bbh jnz.smbalertcheck Document Number: 001-81371 Rev. *A Page 14 of 17

mov [SMBusSlave_bSendByte], 0 mov A, 6 ;Data Byte High mov A, 5 ;Data Byte Low mov A, SMBusSlave_NOTIFYHOST lcall SMBusSlave_NotifyHost add SP, -3.SmbAlertCheck: cmp [bwritebytebuffer], b6h jnz.mainloop mov [bwritebytebuffer], 0 mov A, SMBusSlave_SMBALERT lcall SMBusSlave_NotifyHost add SP, -1 jmp.mainloop Configuration Registers This section describes the PSoC Resource Registers used or modified by the SMBusSlave User Module. The use of these registers is not required when using the SMBusSlave User Module, but is provided as a reference. Table 3. Resource I2C_CFG: Bank 0 reg[d6] Configuration Register Bit 7 6 5 4 3 2 1 0 Value Reserved PinSelect Bus Error IE Stop IE Clock Rate[1] Clock Rate[0] 0 Enable Slave Pin Select: Selects either SCL and SDA as P1[5]/P1[7] or P1[0]/P1[1]. Bus Error Interrupt Enable: Enables I 2 C interrupt generation on a Bus Error. Stop Error Interrupt Enable: Enables an I 2 C interrupt on an I 2 C Stop condition. Clock Rate[1,0]: Selects among three valid clock rates 50, 100, or 400 kbps. Enable Slave: Enables the I 2 C HW block as a bus Slave. Table 4. Resource I2C_SCR: Bank 0 reg[d7] Status Control Register Bit 7 6 5 4 3 2 1 0 Value Bus Error NA Stop Status ACK out Address Transmit Last Recd Bit (LRB) Byte Complete Bus Error: Indicates detection of a Bus Error condition. Stop Status: Indicated detection of an I 2 C stop condition. ACK out: Directs the I 2 C block to Acknowledge (1) or Not Acknowledge (0) a received byte. Address: Received or transmitted byte is an address. Document Number: 001-81371 Rev. *A Page 15 of 17

Last Received Bit (LRB): Value of last received bit (bit 9) in a transmit sequence, status of ACK/NACK from destination device. Byte Complete: 8 data bits were received. For Receive Mode, the bus is stalled waiting for an ACK/NACK. For Transmit Mode ACK/NACK was also received (see LRB) and the bus is stalled for the next action. Table 5. Resource I2C_DR: Bank 0 reg[d8] Data Register Bit 7 6 5 4 3 2 1 0 Value Data Received or Transmitted data. To transmit data, you must load this register before a write to the I2C_SCR register. Received data is read from this register and may contain an address or data. Table 6. Resource I2C_ADDR: Bank 1 reg[ad] Data Register Bit 7 6 5 4 3 2 1 0 Value Data The I 2 C address register is used to configure the hardware address automatic comparison feature so that the microcontroller is not disturbed by an unwanted slave request. The hardware address automatic compare feature is available in the Slave only mode in the CY8C21x45, CY8C22x45, and CY8C28xxx family PSoC devices. Document Number: 001-81371 Rev. *A Page 16 of 17

Version History Version Originator Description 1.00 DHA Initial version. 2.00 MYKZ 1. Corrected method of clearing posted interrupts. 2. Fixed I2C address saving in User Module parameters and corrected I2C address constant generation. Note PSoC Designer 5.1 introduces a Version History in all user module datasheets. This section documents high level descriptions of the differences between the current and previous user module versions. Document Number: 001-81371 Rev. *A Revised May 16, 2013 Page 17 of 17 Copyright 2012-2013 Cypress Semiconductor Corporation. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. PSoC Designer and Programmable System-on-Chip are trademarks and PSoC is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress' product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement.