University of California, Berkeley College of Engineering

Similar documents
University of California, Berkeley College of Engineering

University of California, Berkeley College of Engineering

University of California, Berkeley College of Engineering

Computer Architecture I Midterm I

University of California, Berkeley College of Engineering

University of California, Berkeley College of Engineering

University of California, Berkeley College of Engineering

Department of Electrical Engineering and Computer Sciences Spring 2010 Instructor: Dr. Dan Garcia CS61C Midterm

University of California, Berkeley College of Engineering

University of California, Berkeley College of Engineering

University of California, Berkeley College of Engineering

Department of Electrical Engineering and Computer Sciences Spring 2007 Instructor: Dr. Dan Garcia

Department of Electrical Engineering and Computer Science Spring 2004 Instructor: Dan Garcia CS61C Midterm

University of California, Berkeley College of Engineering

Department of Electrical Engineering and Computer Sciences Spring 2013 Instructor: Dr. Dan Garcia CS61C Midterm

University of California, Berkeley College of Engineering

Computer Architecture I Mid-Term I

Problem maximum score 1 35pts 2 22pts 3 23pts 4 15pts Total 95pts

Wawrzynek & Weaver CS 61C. Sp 2018 Great Ideas in Computer Architecture MT 1. Print your name:,

Midterm. CS64 Spring Midterm Exam

University of California, Berkeley College of Engineering

Department of Electrical Engineering and Computer Sciences Fall 2017 Instructors: Randy Katz, Krste Asanovic CS61C MIDTERM 2

Wawrzynek & Weaver CS 61C. Sp 2018 Great Ideas in Computer Architecture MT 1. Print your name:,

CS 61c: Great Ideas in Computer Architecture

Review (1/2) IEEE 754 Floating Point Standard: Kahan pack as much in as could get away with. CS61C - Machine Structures

CS 351 Exam 2 Mon. 11/2/2015

Computer Science and Engineering 331. Midterm Examination #1. Fall Name: Solutions S.S.#:

Lecture 5: Procedure Calls

Department of Electrical Engineering and Computer Sciences Fall 2016 Instructors: Randy Katz, Bernhard Boser

CS61c MIDTERM EXAM: 3/17/99

CS61C Machine Structures. Lecture 12 - MIPS Procedures II & Logical Ops. 2/13/2006 John Wawrzynek. www-inst.eecs.berkeley.

Lecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook)

Introduction to the MIPS. Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University

COMPUTER ORGANIZATION AND DESIGN

CS 110 Computer Architecture MIPS Instruction Formats

I-Format Instructions (3/4) Define fields of the following number of bits each: = 32 bits

CS 61C: Great Ideas in Computer Architecture MIPS Instruction Formats

Department of Electrical Engineering and Computer Sciences Fall 2016 Instructors: Randy Katz, Bernhard Boser

MIPS Functions and Instruction Formats

ECE232: Hardware Organization and Design. Computer Organization - Previously covered

Chapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes

CS61C : Machine Structures

CS 61C: Great Ideas in Computer Architecture. MIPS Instruction Formats

Review. Lecture #9 MIPS Logical & Shift Ops, and Instruction Representation I Logical Operators (1/3) Bitwise Operations

Nick Weaver Sp 2019 Great Ideas in Computer Architecture MT 1. Print your name:,

Faux Midterm 1: Review Session

UCB CS61C : Machine Structures

ENCM 369 Winter 2013: Reference Material for Midterm #2 page 1 of 5

Instructions: MIPS ISA. Chapter 2 Instructions: Language of the Computer 1

CS61c Summer 2014 Midterm Exam

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA MIPS ISA. In a CPU. (vonneumann) Processor Organization

MIPS R-format Instructions. Representing Instructions. Hexadecimal. R-format Example. MIPS I-format Example. MIPS I-format Instructions

Chapter 2A Instructions: Language of the Computer

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA

ECE 2035 A Programming Hw/Sw Systems Spring problems, 8 pages Final Exam 29 April 2015

CS61C Midterm After the exam, indicate on the line above where you fall in the emotion spectrum between sad & smiley...

ECE 2035 Programming HW/SW Systems Fall problems, 7 pages Exam Two 23 October 2013

Unsigned Binary Integers

Unsigned Binary Integers

MIPS%Assembly% E155%

Computer Organization and Structure. Bing-Yu Chen National Taiwan University

2) Using the same instruction set for the TinyProc2, convert the following hex values to assembly language: x0f

Grading: 3 pts each part. If answer is correct but uses more instructions, 1 pt off. Wrong answer 3pts off.

8*4 + 4 = 36 each int is 4 bytes

ECE 331 Hardware Organization and Design. Professor Jay Taneja UMass ECE - Discussion 3 2/8/2018

CS61C Machine Structures. Lecture 13 - MIPS Instruction Representation I. 9/26/2007 John Wawrzynek. www-inst.eecs.berkeley.

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine

University of California at Santa Barbara. ECE 154A Introduction to Computer Architecture. Quiz #1. October 30 th, Name (Last, First)

MIPS Functions and the Runtime Stack

CS61c Summer 2014 Midterm Exam

Computer Organization and Structure. Bing-Yu Chen National Taiwan University

Assembler. #13 Running a Program II

CS 61C: Great Ideas in Computer Architecture MIPS Instruction Formats

Chapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont )

Review of Last Lecture. CS 61C: Great Ideas in Computer Architecture. MIPS Instruction Representation II. Agenda. Dealing With Large Immediates

Levels of Programming. Registers

CS 61C: Great Ideas in Computer Architecture MIPS Instruction Formats

CS152 Computer Architecture and Engineering

CS 61C, Fall, 2005, Midterm 1, Garcia Question 1: For those about to test, we salute you (11 pts, 20 min.)

comp 180 Lecture 10 Outline of Lecture Procedure calls Saving and restoring registers Summary of MIPS instructions

Assembly Language Programming. CPSC 252 Computer Organization Ellen Walker, Hiram College

ECE 2035 Programming HW/SW Systems Spring problems, 6 pages Exam Three 10 April 2013

We will study the MIPS assembly language as an exemplar of the concept.

CS 61c: Great Ideas in Computer Architecture

CDA3100 Midterm Exam, Summer 2013

ECE 2035 Programming HW/SW Systems Spring problems, 6 pages Exam Two 11 March Your Name (please print) total

University of California, Berkeley College of Engineering

MIPS Assembly Programming

University of California, Berkeley College of Engineering

Review C program: foo.c Compiler Assembly program: foo.s Assembler Object(mach lang module): foo.o

ECE 2035 A Programming Hw/Sw Systems Fall problems, 8 pages Final Exam 8 December 2014

Chapter 1. Computer Abstractions and Technology. Lesson 3: Understanding Performance

ECE 2035 Programming HW/SW Systems Fall problems, 6 pages Exam Two 23 October Your Name (please print clearly) Signed.

Reduced Instruction Set Computer (RISC)

Lecture 4: MIPS Instruction Set

EEM 486: Computer Architecture. Lecture 2. MIPS Instruction Set Architecture

COMPSCI 313 S Computer Organization. 7 MIPS Instruction Set

ECE 15B Computer Organization Spring 2010

CS3350B Computer Architecture MIPS Introduction

SPIM Instruction Set

Transcription:

University of California, Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences Fall 2015 Instructors: Vladimir Stojanovic, John Wawrzynek 2015-09-06 L J After the exam, indicate on the line above where you fall in the emotion spectrum between sad & smiley... Last Name First Name PERFECT PETER Student ID Number CS61C Login cs61c- The name of your SECTION TA (please circle) Alex Austin Chris David Derek Eric Fred Jason Manu Rebecca Shreyas Stephan William Xinghua Name of the person to your LEFT Name of the person to your RIGHT All the work is my own. I had no prior knowledge of the exam contents nor will I share the contents with others in CS61C who have not taken it yet. (please sign) Instructions (Read Me!) This booklet contains 7 numbered pages including the cover page. The back of each page is blank and can be used for scratch-work, but will not be looked at for grading. (i.e. the sides of pages without the printed SID: header will not even be scanned into gradescope). Please turn off all cell phones, smartwatches, and other mobile devices. Remove all hats & headphones. Place your backpacks, laptops and jackets under your seat. You have 80 minutes to complete this exam. The exam is closed book; no computers, phones, or calculators are allowed. You may use one handwritten 8.5 x11 page (front and back) of notes in addition to the provided green sheet. There may be partial credit for incomplete answers; write as much of the solution as you can. We will deduct points if your solution is far more complicated than necessary. When we provide a blank, please fit your answer within the space provided. Points Possible Points Earned Q1 Q2 Q3 Q4 Q5 Q6 Q7 Total 10 10 15 15 15 15 9 90

Q1: A dozen ways to ask about bits (10 points) 1) For a 12-bit integer represented with two s complement, what is the: a) Most positive value (in decimal): 2047 b) Binary representation of that number: _0b011111111111 c) Most negative value (in decimal): -2048 d) Hex representation of that number: 0x800 e) In general, for an n-bit, two s complement integer: i) What is the largest value you can represent, in decimal? 2^(n-1) - 1 ii) What is the smallest value you can represent, in decimal? -2^(n-1) 2) Fill in the blank below so that the function mod16 will return the remainder of x when divided by 16. The first blank should be a bitwise operator, and the second blank should be a single decimal number: unsigned int mod16(unsigned int x) { return x & 15 ;

Q2: Wow! If only you could C the main memory (10 points) Consider the following C program: int a = 5; void foo(){ int temp; int main() { int b = 0; char* s1 = cs61c ; char s2[] = cs61c ; char* c = malloc(sizeof(char) * 100); foo(); return 0; ; 1) Sort the following values from least to greatest: &b, c, b, &temp, &a. b < &a < c < &temp < &b 2) For each of the following values, state the location in the memory layout where they are stored. Answer with code, static, heap, or stack. s1 s2 s1[0] s2[0] c[0] stack stack static stack heap

Q3: Links, Links, and Lists (15 points) Here, we have a two-sided linked list, where each node has a reference to both the previous and next node in the list. The HEAD of the list is defined as the node with a NULL prev pointer, and the TAIL of the list is defined as the node with a NULL next pointer. struct ll_node { unsigned short id; struct ll_node *prev; struct ll_node *next; ; For the remainder of the questions, assume that the struct ll_node is tightly-packed (i.e, all its elements are contiguous in memory). 1) We are given a struct ll_node current_node. Assuming that the type unsigned short is 2 bytes wide and that we are working with a 32-bit memory address space, what can we expect the function call sizeof(current_node) to return? 10 2) Assume that we have access to id_addr, the address of the id of current_node in memory. Using only id_addr, fill in the blank line so that next_node is equivalent to current_node.next. unsigned short *id_addr = &(current_node.id); struct ll_node *next_node = *(_(struct ll_node **) (id_addr + 3)_); 3) Now, fill in the blanks to complete this function that, given a random node in the list, frees all reachable nodes from that given node. Keep in mind that the node may be the HEAD of the list, the TAIL of the list, or a node in between the HEAD and TAIL. You may not need every blank. void free_twosided_ll(struct ll_node *node) { if (node!= NULL) { if (node->prev!= NULL) { (node->prev)->next = NULL; free_twosided_ll(node->prev); if (node->next!= NULL) { (node->next)->prev = NULL; free_twosided_ll(node->next); free(node);

Q4: beargit redux (15 points) From project 1, you may remember the function is_commit_msg_ok() that you needed to implement in C. Here is a simpler rendition where commit messages are deemed okay if and only if those nullterminated commit messages exactly match go_bears. Using the fewest number of empty lines possible, finish writing the code below. You are only allowed to use the registers already provided and registers $t0-3, and $s0-s2 (but you will not need all of them). Assume these registers are initialized to 0 before the call to ISCOMMITOK. const char* go_bears = "THIS IS BEAR TERRITORY!"; int is_commit_msg_ok(const char* msg, const char* go_bears) { for (int i = 0; msg[i] && go_bears[i]; i++) { if (go_bears[i]!= msg[i]) return 0; if (!msg[i] &&!go_bears[i]) return 1; return 0; ISCOMMITOK: _lb_ $t0 0_($a0) _lb_ $t1 0_($a1) COND: and $t2 $t0 $t1 beq $t2 $0 EXIT bne $t0 $t1 FAILED addiu $a0 $a0 1 addiu $a1 $a1 1 j ISCOMMITOK EXIT: _or_ $t2 $t0 $t1 bne $t2 $0 FAILED li $v0 1 j END FAILED: li $v0 0 END: jr $ra

Q5: MIPS Sleuth (15 points) mystery, a mysterious MIPS function outlined below, is written without proper calling conventions. mystery calls a correctly written function, random, that takes an integer i as its only argument, and returns a random integer in the range [0, i - 1] inclusive. 1 mystery: addiu $sp $sp -16 2 sw $s0 0($sp) 3 sw $s1 4($sp) 4 sw $s2 8($sp) 5 sw $ra 12($sp) 6 7 addu $s0 $0 $0 8 move $s1 $a0 9 move $s2 $a1 10 loop: srl $t0 $s0 2 11 beq $t0 $s2 exit 12 subu $a0 $s2 $t0 13 jal random 14 sll $v0 $v0 2 15 addu $v0 $v0 $s0 16 addu $t0 $s1 $s0 17 addu $t1 $s1 $v0 18 lw $t2 0($t0) 19 lw $t3 0($t1) 20 sw $t2 0($t1) 21 sw $t3 0($t0) 22 addiu $s0 $s0 4 23 j loop 24 exit: lw $s0 0($sp) 25 lw $s1 4($sp) 26 lw $s2 8($sp) 27 lw $ra 12($sp) 28 addiu $sp $sp 16 29 jr $ra 30 1) Fill in the prologue and the epilogue of this MIPS function. Assume that random follows proper calling conventions, and that it may make its own function calls. You may not need all of the lines. 2) What operation does this function perform on an integer array? Assume that both the integer array and the length of the array are passed into the function. The function shuffles the integer array in place. 3) Would this function work as expected if a string was passed into the function instead? Write down the line numbers of all lines of MIPS code that must be changed (if any at all), so that the function works correctly on strings. Do not write down any extraneous line numbers. 10, 14, 18, 19, 20, 21, 22

Q6: Registers: bigger is not always better (16 points) You decide that instead of having 32, 32-bit registers, you would like to build a machine with 16, 64- bit registers. You also need to make a modified MIPS instruction set for this architecture. 1) In the box below, specify the size of the fields to best utilize the 32-bit instructions on this new architecture. Do not modify the size of the opcode. opcode rs rt rd shamt funct 6 4 4 4 6 8 opcode rs rt imm 6 4 4 18 2) How many different R-type instructions can we now have? 2^8 3) If PC = 0x061C, what is the largest address that we can branch to? 0x8061C 0x61c + 4 + (2^17 1)*4 = 0x61C + 2^19 = 0x61C + 2^(4*4)*8 4) Translate the following machine code into MIPS using your new field sizes. Use register numbers instead of register names, since we d have to think of a new convention for the names 0xAE9FFFF8 101011 1010 0111 111 1000 Q7: After this, you re CALL done! (9 points) Connect the definition with the name of the process that describes it. a) Compiler b) Assembler c) Linker d) Loader _sw $7-8($10)_ 1) Outputs code that may still contain pseudoinstructions. a 2) Takes binaries stored on disk and places them in memory to run. d 3) Makes two passes over the code to solve the "forward reference" problem. b 4) Creates a symbol table. b 5) Combines multiple text and data segments. c 6) Generates assembly language code. a 7) Generates machine language code. b 8) Only allows generation of TAL. b 9) Only allows generation of binary machine code. c