HEADER FILE A header (.h,.hpp,...) file contains Class definitions ( class X {... }; ) Inline function definitions ( inline int get_x() {... } ) Function declarations ( void help(); ) Object declarations ( extern int debug_enabled; ) CS 251 INTERMEDIATE SOFTWARE DESIGN SPRING 2011 Makefile, compiler,.h and.cpp files These files allow programmers to separate certain elements of a program's source into reusable files. Header files commonly contain forward declarations of classes, variables, and other identifiers. A header file might be included by more than one CPP file. This is to keep the interface in the header separate from the implementation. 2 SOURCE FILE A source file (.c,.cpp,.cxx) contains Function definitions ( void help() { }, void X::f() { } ) Object definitions ( int debug_enabled = 1; ) ACCESS SPECIFIER: PUBLIC, PRIVATE, PROTECTED Any data declared private inside a class is not accessible from outside the class. By default, all data are private. Source files will contain definitions that must be present only once in the whole program. A CPP file includes the definitions from any header which it includes (because CPP and header file together become a single 'translation unit') 3 Specifying that a data member or member function is public means that it can be accessed from anywhere in your. Making a data member or member function protected means that it can only be accessed from within the class or a subclass. 4 1
FRIEND AND INLINE FUNCTIONS If we want to allow an external function to have access to the private and protected, we declare a prototype of this external function within the class and precede it with the keyword friend. An inline function is a function that the compiler has been requested to perform inline expansion upon. Inline expansion is used to eliminate the time overhead when a function is called. It is typically used for functions that execute frequently. 5 EXAMPLE : COMPLEX CLASS Complex.h Complex.cpp Driver.cpp Makefile.txt 6 Line Splicing Lines continued with escaped newline are spliced to form logical lines. g++ Tokenization The preprocessor breaks the result into preprocessing tokens and whitespace. It replaces comments with whitespace. Expand the macros Manage the #ifndef Manage the #define Replace all the #include 7 #= # 8 2
Translate to assembly language, a symbolic representation of the binary machine s Translate assembly language to binary machine s, leaving the addresses of external functions undefined MOV XOR JMP 9 MOV XOR JMP? 10 Create the final executable from all the object files by replacing the unknown addresses by their actual? 1110.c.i.s.o Source Preprocessor Compiler Assembler Linker Preprocessed Language Machine (Object File).out.exe Final 1110 11 12 3
You can use g++ both to compile programs into object modules and to link these object modules together into a single program. 2 steps 1/ compilation g++ -c compile-options file.cpp 2/ linking g++ -o progname link-options file1.o file2.o... You can bunch these two steps - compilation and linking - into one with the following command. g++ -o progname compile-and-link-options file1.cpp file2.cpp... 13 Options -c ( option) Compile only. Produces.o files from source files without doing any linking. -o file-name (Link option) Use file-name as the name of the file produced by g++ (usually, this is an executable file). -g ( and link option) Put debugging information for gdb into the object or executable file. Should be specified for both compilation and linking. -Wall ( option) Produce warning messages about a number of things that are legal but dubious. I strongly suggest that you always specify this and that you treat every warning as an error to be fixed. 14 MAKEFILE The basic makefile is composed of: target: dependencies [tab] system command In our Complex example, it would look like all: g++ -g Wall Driver.cpp Complex.cpp -o 15 MAKEFILE The make utility will execute the first target if no other one is specified. Sometimes is useful to use different targets (if you modify a single file in your project, you don't have to recompile everything, only what you modified) all: hello hello: main.o factorial.o hello.o g++ main.o factorial.o hello.o -o hello main.o: main.cpp g++ -c main.cpp factorial.o: factorial.cpp g++ -c factorial.cpp hello.o: hello.cpp g++ -c hello.cpp clean: rm -rf *o hello 16 4
MAKEFILE You can also use variables when writing Makefiles. It comes in handy in situations where you want to change the compiler, or the compiler options. CC=g++ CFLAGS=-c -Wall all: hello hello: main.o factorial.o hello.o $(CC) main.o factorial.o hello.o -o hello MAKEFILE : EXAMPLE Makefile.txt main.o: main.cpp $(CC) $(CFLAGS) main.cpp factorial.o: factorial.cpp $(CC) $(CFLAGS) factorial.cpp hello.o: hello.cpp $(CC) $(CFLAGS) hello.cpp clean: rm -rf *o hello 17 18 5