ISC 2007 COMPUTER SCIENCE PAPER 1 THEORY PART I Answer all questions in this part

Similar documents
ISC SPECIMEN PAPER Computer Science Paper 1 (Theory) Part I Question 1. [ 2 x 5 = 10] Question 2. [ 2 x 5 = 10] Question 3.


ISC 2009 COMPUTER SCIENCE PAPER 1 THEORY PART I Answer all questions in this part

ISC 2010 COMPUTER SCIENCE PAPER 1 THEORY

PART I. Answer all questions in this Part. While answering questions in this Part, indicate briefly your working and reasoning, wherever required.

ISC 2011 COMPUTER SCIENCE PAPER 1 THEORY

COMPUTER SCIENCE. Paper 1

ISC 2006 COMPUTER SCIENCE PAPER 1 THEORY PART I Answer all questions in this part

Computer Science Paper 1 (Theory) Part I While working questions in this part, indicate briefly your working and reasoning wherever required.

Experiment 3: Logic Simplification

COMPUTER SCIENCE Paper 1

COMPUTER SCIENCE PAPER 1

Chapter 2. Boolean Expressions:

2.6 BOOLEAN FUNCTIONS

BOOLEAN ALGEBRA. 1. State & Verify Laws by using :

1. Mark the correct statement(s)

UNIT-4 BOOLEAN LOGIC. NOT Operator Operates on single variable. It gives the complement value of variable.

Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions

COMPUTER SCIENCE. Paper-1 (THEORY) Three /tollrs

QUESTION BANK FOR TEST

To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using Karnaugh Map.

Chapter 2: Combinational Systems

Lecture 5. Chapter 2: Sections 4-7

Student Number: UTORid: Question 0. [1 mark] Read and follow all instructions on this page, and fill in all fields.

Code No: 07A3EC03 Set No. 1

Spring 2010 CPE231 Digital Logic Section 1 Quiz 1-A. Convert the following numbers from the given base to the other three bases listed in the table:

Date Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 04. Boolean Expression Simplification and Implementation

Digital logic fundamentals. Question Bank. Unit I

Standard Forms of Expression. Minterms and Maxterms

Combinational Logic Circuits

Gate-Level Minimization. BME208 Logic Circuits Yalçın İŞLER

R10. II B. Tech I Semester, Supplementary Examinations, May

DKT 122/3 DIGITAL SYSTEM 1

Code No: R Set No. 1

Chapter 2 Boolean algebra and Logic Gates

B.Tech II Year I Semester (R13) Regular Examinations December 2014 DIGITAL LOGIC DESIGN

Philadelphia University Faculty of Information Technology Department of Computer Science. Computer Logic Design. By Dareen Hamoudeh.

Bawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University

LSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology

Department of Electrical Engineering McGill University ECSE 221 Introduction to Computer Engineering Assignment 2 Combinational Logic

Digital Logic Lecture 7 Gate Level Minimization

Solved PAPER Computer Science-XII. Part -I. Answer all questions

Binary logic. Dr.Abu-Arqoub

ECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010

Menu. Algebraic Simplification - Boolean Algebra EEL3701 EEL3701. MSOP, MPOS, Simplification

Gate Level Minimization Map Method


Code No: R Set No. 1

EEE130 Digital Electronics I Lecture #4_1


Experiment 4 Boolean Functions Implementation

Chapter 3. Gate-Level Minimization. Outlines

Objectives: 1. Design procedure. 2. Fundamental circuits. 1. Design procedure

SAMPLE PAPER. Class: XII SUBJECT COMPUTER SCIENCE. Time: 3 Hours MM: 70

Midterm Exam Review. CS 2420 :: Fall 2016 Molly O'Neil

COMPUTER SCIENCE 1998 (Delhi Board)

R.M.D. ENGINEERING COLLEGE R.S.M. Nagar, Kavaraipettai

Combinational Circuits Digital Logic (Materials taken primarily from:

D o w n l o a d f r o m w w w. k i s h o r e p a n d i t. c o m

2008 The McGraw-Hill Companies, Inc. All rights reserved.

Incompletely Specified Functions with Don t Cares 2-Level Transformation Review Boolean Cube Karnaugh-Map Representation and Methods Examples

Code No: R Set No. 1

Announcements. Chapter 2 - Part 1 1

Question Total Possible Test Score Total 100

Simplification of Boolean Functions

Unit-IV Boolean Algebra

CS470: Computer Architecture. AMD Quad Core

Propositional Calculus. Math Foundations of Computer Science

Gate-Level Minimization

Dr. S. Shirani COE2DI4 Midterm Test #1 Oct. 14, 2010

Bawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University

X Y Z F=X+Y+Z

DIGITAL ELECTRONICS. P41l 3 HOURS

60-265: Winter ANSWERS Exercise 4 Combinational Circuit Design

Lecture 4: Implementation AND, OR, NOT Gates and Complement

10EC33: DIGITAL ELECTRONICS QUESTION BANK

Philadelphia University Student Name: Student Number:

CS8803: Advanced Digital Design for Embedded Hardware

DHANALAKSHMI SRINIVASAN COLLEGE OF ENGINEERING AND TECHNOLOGY


ENGIN 112. Intro to Electrical and Computer Engineering

Karnaugh Maps. Kiril Solovey. Tel-Aviv University, Israel. April 8, Kiril Solovey (TAU) Karnaugh Maps April 8, / 22

ENGINEERS ACADEMY. 7. Given Boolean theorem. (a) A B A C B C A B A C. (b) AB AC BC AB BC. (c) AB AC BC A B A C B C.

Chapter 3 Simplification of Boolean functions

5. (a) What is secondary storage? How does it differ from a primary storage? (b) Explain the functions of (i) cache memory (ii) Register

Final Examination (Open Katz, asynchronous & test notes only, Calculators OK, 3 hours)

Chapter 3. Boolean Algebra and Digital Logic

SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road QUESTION BANK (DESCRIPTIVE)

數位系統 Digital Systems 朝陽科技大學資工系. Speaker: Fuw-Yi Yang 楊伏夷. 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象, 視之不可見者曰夷

Computer Organization

COMPUTER SCIENCE PAPER 1 THEORY YEAR 2008

ECE 2030D Computer Engineering Spring problems, 5 pages Exam Two 8 March 2012

VALLIAMMAI ENGINEERING COLLEGE

IT 201 Digital System Design Module II Notes

SUBJECT CODE: IT T35 DIGITAL SYSTEM DESIGN YEAR / SEM : 2 / 3

CMPE223/CMSE222 Digital Logic

END-TERM EXAMINATION

UNIT- V COMBINATIONAL LOGIC DESIGN

ECE 2020B Fundamentals of Digital Design Spring problems, 6 pages Exam Two 26 February 2014

Combinational Logic & Circuits

Transcription:

ISC 2007 COMPUTER SCIENCE PAPER 1 THEORY PART I Answer all questions in this part Question 1. a) Simplify the following Boolean expression using laws of Boolean Algebra. At each step state clearly the law used for simplification. XY.(X.Y + Y.Z) b) State the DeMorgan s Laws. Verify any one of them using truth table. c) Convert the following Sum of Product expression into its corresponding Product of Sums form: F(O,V,W)= O V W + O V W+O VW+OV W d) Find the complement of F(A,B,C,D)= [A + ( B+C). (B + D )] e) Draw the logic gate diagram and truth table for XOR gate. [ 2 x 5 = 10] Question 2. a) Name the Universal gates. b) Convert the following infix expressions to its postfix form. (A+ ( B*C)) / (C-(D*B)) c) Each element of an array X[-15 10,15 40] requires one byte od storage. If the array is stored in column major order with the beginning location 1500, determine the location of X[5,20]. d) Explain any two standard ways of traversing a binary tree. e) What is meant by visibility mode in the definition of derived classes of Inheritance? Explain any two visibility modes available. [ 2 x 5 = 10] Question 3. a) In the following function strange is a part of some class. Assume that arguments x and y are greater than 0 when the function is invoked. Show the dry run/working. publicint strange(int x, int y) if(x>=y) x=x-y; return strange(x,y); else return x; i) What will the function strange(20,5) return? [ 2 ] ii) What will the function strange(15,6) return? [ 2 ] 1

iii) In one line state what the function strange( ) is doing? [ 1 ] b) State the final value of q at the end of the following program segment: [ 5 ] intm,n,p,q=0; for(m=2;m<=3;++m) for(n=1;n<=m;++n) p=m+n-1; if(p%3==0) q+=p; else q+=p+4; PartII Answer any seven questions in this part, choosing three questions from Section A and four questions from Section B. Section A Answer any three questions. Question 4. a) Given the Boolean function F(A,B,C,D)= (0,2,3,4,6,7,9,13) Use Karnaugh s map to reduce the given function F, using the SOP form. Draw a logic gate diagram for the reduced SOP form. You may use gates with more than two inputs. Assume that the variables and their complements are available as inputs. b) X(A,B,C,D)= π(2,3,4,5,12,14) Use Karnaugh s map to reduce the given function X using the POS form. Draw a logic gate diagram for the reduced POS form. You may use gates with more than two inputs. Assume that the variables and their complements are available as inputs. [ 5 x 2 = 10] Question 5. The inaugural function of the newly constructed flyover has been organized by the Public Works Department. Apart from a few special invitees, entry is permitted only if:- The person is an employee of the PWD of Class I category with more than 10 years of working experience. OR The person is an employee of any other government or authorized private organization either at the managerial level or with more than 10 years of working experience. The inputs are: A : The person is a Class I employee of PWD. 2

B : The person is an employee of any other government or authorized private organization. C : The person has more than 10 years of working experience. D : The person is holding a managerial post. Output:- X : Denotes eligibility for entry. [ 1 indicates Yes and 0 indicates No in all cases] a) Draw the truth table for the inputs and outputs given above and write the SOP expression for X(A,B,C,D). [ 5 ] b) Reduce X(A,B,C,D) using Karnaugh s map. Draw the logic gate diagram for the reduced SOP expression for X(A,B,C,D) using AND & OR gates. You may use gates with two or more inputs. Assume that the variables and their complements are available as inputs. [ 5 ] Question 6. A combinational circuit with 3 inputs A,B,C detects an error during transmission of code and gives the output D as 1 if any two of the inputs are low(0). i) Write the truth table with Inputs A,B,C and Outputs D. [ 2 ] ii) Write the SOP expression for D(A,B,C) using minterms. Implement D using NAND gates only. [ 4 ] iii) Write the POS expression for D(A,B,C) using maxterms. Implement D using NOR gates only. [ 4 ] Question 7. a) Draw the truth table and logic circuit diagram for a Hexadecimal to Binary encoder. [ 6 ] b) Verify if X YZ+XY Z+XYZ +XYZ= XY+YZ+XZ [ 4 ] Question 8. a) Using the truth table verify PQ+ PQ = P [ 2 ] b) What is full adder? Write the SOP expressions for Sum and Carry. Simplify the expressions algebraically using Boolean Algebra. [ 6 ] c) What is meant by a logic gate? State any one application of a logic gate circuit. [ 2 ] 3

Section B Answer any 4 questions. Each program should be written in such a way that it clearly depicts the logic of the problem. This can be achieved by using mnemonic names and comments in the program. (Flowcharts and algorithms are not required) The programs must be written in C++/Java Question 9. A class called EvenSeries has been defined to find the smallest value of integer, n, such that, 2 + 4/2!+ 8/3!+16/4!+.2 n /n! >= S, where 2.0 < S < 7.0. Some of the members of the class EvenSeries are given below: Class name : EvenSeries : n : long integer type to store number of terms. S : float variable where 2.0 < S < 7.0. k : float variable to store the value of series evaluated. : EvenSeries() : constructor to initialize data members to 0. void accept() : to accept value of data member S. long fact(long x) : to compute and return factorial of x. voiddisp() : calculates and displays the least value of n. Specify the class EvenSeries giving details of the constructor and functions void accept(), long fact(long) and void disp(). The main function need not be written. Question 9. Design a class change to convert a decimal number to its equivalent in base 16 and to convert it back to its decimal form. Eg.(i) The decimal number 35 is 23 in base 16. ii) The decimal number 107 is 6B in base 16. Some of the members of the class are given below: Class name : change a[] : integer type array. n : integer to be converted to base 16. change() : constructor to assign 0 to instance variables. void input() : accepts integer to be converted to base 16. voidhexadeci(int) : to convert decimal integer to hexadecimal form. voiddecihexa() : to convert hexadecimal number back to decimal form. Specify the class change giving the details of the constructor and the functions void input(), void hexadeci(int) and void decihexa(). The main function need not be written. 4

Question 11. A class Rearrange has been defined to insert an element and to delete an element from an array. Some of the members of the class are given below: Class name : Rearrange a[] : integer type array n : size of array (integer) pos1 : position of insertion (integer) pos2 : position of deletion item : item to be inserted (integer) void enter() : to enter size, array elements and to display the entered elements. void insert() : to accept element (item) to be inserted, position of insertion and insert the element (item) at the position of insertion. void disp1() : to display the array after item is inserted. void disp2() : to display the array after item is deleted. void remov() : to accept the position of deletion and delete element(item) at the position of deletion. Specify the class Rearrange giving details of the functions void enter(), void insert(), void disp1(), void disp2() and void remov(). The main function need not be written. Question 12. Class Convert has been defined to express digits of an integer in words. The details of the class are given below: Class name : Convert n : integer whose digits are to be expressed in words. Convert() : constructor to assign 0 to n. void inpnum() : to accept the value of n. void extdigit(int) : to extract the digits of n using recursive technique. void num_to_words(int) : to display the digits of an integer in words. Specify the class Convert giving details of the constructor and function void inpnum(), void extdigit(int) and void num_to_words(int). The main function need not be written. 5

Question 13. A class Student defines the personal data of a student while another class Marks defines the register number, name of subject and marks obtained by the student. The details of both the classes are given below: Class name : Student name : string to store name. sex : string to store sex age : integer to store age void inpdetails() : to accept values for data members. void show() : to display personal data of student. Class name : Marks regnum : int to store registration number. marks : int to store marks. subject : String to store subject name. void inpdetails() : to accept values for data members. void show() : to display exam and student details. a) Specify the class Student giving details of the functions void inpdetails() and void show(). b) Specify the class Marks using the concept of inheritance giving details of the functions void inpdetails() and void show(). The main function need not be written. Question 14. A class Mystring has been defined for the following methods: Class name : Mystring str : to store a string len : length of the given string. Mystring() : constructor void readstring() : reads the given string from input. int code(int index) : returns Unicode for character at position index. void word() : displays the longest word in the string. Specify the class Mystring giving details of the constructor and void readstring(), int code(int index), void word() only. The main function need not be written. 6