SmartFusion 2 SoC FPGAs ARM Cortex -M3 HS USB OTG 10/100/1000 PCI Express Gen2 Up to 150K LEs CO LO A B C D CIN _BYP EN NC_SR CLK RST LUT4 OVFL UB ADD_S ] A[17:0 D EN RO D +/- X EN ] C[43:0 SL ] B[17:0 0 17 SHIFT >> 17 ASC SEL_C :0] SN-1[43 More Resources in Low-Density Devices Lowest Power Proven Security Exceptional Reliability SN[43:
SmartFusion2 SoC FPGAs Microsemi SmartFusion2 SoC FPGAs Offer More Resources in Low-Density Devices with the Lowest Power, Proven Security, and Exceptional Reliability These devices are ideal for general purpose functions such as Gigabit or dual PCI Express control planes, bridging functions, input/output (I/O) expansion and conversion, video/image processing, system management, and secure connectivity. Microsemi FPGAs are used by customers in the communications, industrial, medical, defense, and aviation markets. Communications Industrial Defense Automotive SmartFusion2 Advantages More Resources in Low-Density Devices ARM Cortex-M3 with embedded flash PCIe Gen2 support in 10K LE Comprehensive microcontroller subsystem With Clear Advantages Lowest power Reduces total power by up to 50% 70 mw per 5G SERDES (PCIe Gen2) Proven security Protection from overbuilding and cloning Secure boot for FPGA and processors Exceptional reliability SEU immune zero FIT flash FPGA configuration Reliable safety-critical and mission-critical systems 2
SmartFusion2 FPGA Architecture SmartFusion2 SoC FPGAs offer 5K 150K LEs with a 166 MHz ARM Cortex-M3 processor, including ETM and instruction cache with on-chip esram and envm, and a complete microcontroller subsystem with extensive peripherals, including CAN, TSE, and USB. Up to 16 transceiver lanes PCIe Gen2, XAUI/XGXS+, generic (EPCS) mode at 3.2G Up to 150K LEs, 5 Mb SRAM, 4 Mb envm Hard 667 Mbps DDR2/3 controllers Integrated DSP processing blocks Power as low as 7 mw standby, typical DPA-hardened, AES256, SHA256, on-demand NVM data integrity check SEU-protected-tolerant memories: esrams, DDR bridges JTAG I/O SPI I/O Multi-standard User I/O (MSIO) DDR User I/O SmartFusion 2 SoC FPGA AES256 System Controller SHA256 SRAM-PUF SPI x 2 MMUART x 2 I2C x 2 Timer x 2 Microcontroller Subsystem (MSS) ARM Cortex -M3 MPU ETM D I S Instruction Cache CAN Multi-standard User I/O (MSIO) ECC Flash*Freeze NRBG In-Application Programming WDT RTC FIIC APB COMM_BLK PDMA FIC_0 HS USB OTG ULPI SYSREG AHB Bus Matrix (ABM) FIC_1 TSE MAC envm DDR Bridge Interrupts APB AHB AHB SMC_FIC Config AXI/AHB FPGA Fabric (Up to 150K Logic Elements) esram HPDMA MSS DDR Controller + PHY Multi-standard User I/O (MSIO) Micro SRAM (64x18) Large SRAM (1024x18) Math Block MACC (18x18) Micro SRAM (64x18) Large SRAM (1024x18) Math Block MACC (18x18) Config AXI/AHB/XGXS Config AXI/AHB/XGXS Config AXI/AHB Serial Controller 0 (PCIe, XAUI/XGXS) + Native SERDES OSCs Serial Controller 1 (PCIe, XAUI/XGXS) + Native SERDES PLLs Fabric DDR Controller + PHY Standard Cell/ SEU Immune Flash-based/ SEU Immune Serial 0 I/O Serial 1 I/O DDR User I/O AES Advanced encryption standard MDDR DDR2/3 controller in MSS AHB Advanced high-performance bus MMUART Multi-mode UART APB Advanced peripheral bus MPU Memory protection unit AXI Advanced extensible interface MSS Microcontroller subsystem COMM_BLK Communication block SECDED Single error correct double error detect DDR Double data rate SEU Single event upset DPA Differential power analysis SHA Secure hashing algorithm ECC Elliptical-curve cryptography SMC_FIC Soft memory controller EDAC Error detection and correction TSE Triple speed ethernet (10/100/1000 Mbps) ETM Embedded trace macrocell ULPI UTMI + low pin interface FDDR DDR2/3 controller in FPGA fabric UTMI USB 2.0 transceiver macrocell interface FIC Fabric interface controller WDT Watchdog timer FIIC Fabric interface interrupt controller XAUI 10 Gbps attachment unit interface HS USB OTG High-Speed USB (2.0) on-the-go XGMII 10 Gigabit media independent interface IAP In-applicationpProgramming XGXS XGMII extended sublayer MACC Multiply-accumulate 3
General Purpose Applications PCIe 1G Control Plane PCIe Gen2 in 10K LE devices with I/O expansion Gigabit PHY 10/100 PHY SmartFusion2 Soc FPGA SERDES PCIe MCU SPI USB Security SPI Peripherals DDR3 DRAM DDR3 DRAM SPI FLASH ARM Cortex -M3 Flash, SRAM LCD I2C GPIO FPGA Fabric CPU Multi-axis Motor Control Deterministic and secure multi-axis/ high-rpm solutions Motor control IP and development kit Timing SmartFusion2 SoC FPGA Automation Controller/ Host CPU System Control PWM Timing Inverter Bridge, IGBTs, SiC MOSFETS Host envm, esram PID Control Loop Power Supply/ Conversion Power Management Transforms Sensors: Speed, Torque, Position A/D Conversion IEEE 1588 Slave/Client IEEE 1588 IP and small form factor, Cortex-M3, low power SmartFusion2 Soc FPGA SPI Flash 1588 PTP OC IP Algorithm Time and Synch IP DDR3 Transport Layer Protocols ARM Cortex -M3 Oscillator ZL30722 VSC8572 PHY Time Stamp Unit SPI SPI IEEE 1588 PLL Clock and PPS Time Stamp Unit SyncE PLL 4
General Purpose Applications Board Initialization PMBus, instant-on, and MSS peripherals RJ45/SFP PHY PoE PD69208 Host I2C PoE Managers espi RJ45/SFP O O O PHY PoE PD69208 Switch SmartFusion2 SoC FPGA I2C Controller System Control espi Controller PMBus PMBus 5 V PoL Supply 3.3 V PoL Supply 2.5 V PoL Supply 1.5 V PoL Supply RJ45/SFP PHY PoE PD69208 Clock Management Status LEDs Secure Connectivity Gaming Security, anti-tamper, and MAC low power SmartFusion2 SoC FPGA Battery Battery Monitor PCIe PCIe Host Anti-tampering Sensors Anti-tamper Monitor Memory Controller I/O Expander DDR Memory Status LEDs Serial IO, Diagnostics Port System Monitoring System Diagnostics PHY MAC HMI Speaker, Keypad, Joystick Audio Processing, Storage, and Retrieval I2S to SPI bridge allows multiple audio recordings and playbacks 2 Digital MEMS Microphones SmartFusion2 SoC FPGA Timberwolf ZL38051 Audio I2S Conversion, Buffering and Formatter SPI SPI Flash Host Audio Jack 5
Clear Advantages Lowest Power SmartFusion2 Reduces Total Power Flash FPGAs deliver lowest power without sacrificing performance 70 mw per 5G SERDES (PCIe Gen2) Flash*Freeze ultra-low-power mode 12 mw Proven Security Protect Systems from Overbuilding and Cloning HSMs protection from overbuilding DPA countermeasures protect bitstream from cloning Only FPGA vendor with validated DPA countermeasures Secure boot for FPGAs and processors The following logo is a trademark of Cryptography Research, Inc. used under license. Exceptional Reliability Error-free SEU immune fabric configuration No scrubbing required All SoC memory SEU-protected Built-in error detection and correction SEU-tolerant implementation Devices deployed in safety-critical and mission-critical systems SRAM Configuration Failures Alpha/ Neutron particles strike routing matrix Flash FPGA No Error SRAM FPGA Functional Failure 6
SmartFusion2 Design Resources The Libero SoC Design Suite enables high productivity with its comprehensive, easy-to-learn, easy-to-adopt development tools for designing with Microsemi s power-efficient flash SmartFusion 2, IGLOO 2, and RTG4 FPGAs. The suite integrates industry -standard Synopsys Synplify Pro synthesis and Mentor Graphics ModelSim simulation tools with best-in-class constraints management, debug capabilities, and secure production programming support. Libero SoC Design suite provides a comprehensive design flow including traditional FPGA Design flow, Embedded design flow and graphical configurators. FPGA design flow is the standard VLSI design flow starting from design entry till programing and debug. The embedded design flow enables development of embedded processing solutions for high performance and high reliability applications using low-power SoC FPGAs and FPGAs. It provides comprehensive development environment to build embedded solutions using hard core and soft core processors. Graphical configurators provide a user friendly design entry approach for various peripherals, applications, and solutions. System Builder Wizard For more information, please see the following website: http://www.microsemi.com/products/fpga-soc/design-resources/design-software/libero-soc#downloads Software IDE SoftConsole Keil MDK IAR Embedded Workbench Free Versions from Microsemi Free with Libero SoC 32K Code Limited 32K Code Limited Available from Vendor N/A Full version Full Version Compiler GNU GCC RealView C/C++ IAR ARM Compiler Debugger GDB Debug µvision Debugger C-SPY Debugger Instruction Set Simulator No µvision Simulator Yes Debug Hardware FlashPro4 ULINK 2 or ULINK-ME J-LINK or J-LINK Lite Trace Capability No ULINKpro JTAGjet-Trace Intellectual Property Microsemi enhances your design productivity by providing an extensive suite of proven and optimized IP cores for use with Microsemi FPGAs. Our extensive suite of IP cores covers all key markets and applications. Our cores are organized into Microsemi-developed DirectCores and third-party-developed CompanionCores. Most DirectCores are available for free within our Libero tool suite and include common communications interfaces, peripherals, and processing elements. http://www.microsemi.com/products/fpga-soc/design-resources/ip-cores DirectCore CompanionCore Functionality DirectCore Examples Functionality CompanionCores Examples` Connectivity UART,16550, 429, PCI, JESD204B Connectivity CAN, CANFD, PCIE, VME DSP CIC, FFT, FIR, CORDIC, RS DSP FFT, JPEG, RS, DVBMOD Memory Controller FIFO, DDR, QDR, SDR, MemCtrl, MMC Memory Controller SDRAMDDR, Flash, SD 8051, 8051s, ARM7TDMI 80188, 80186, LEON3, 6809 Security MII, RGMII, GMII, DES, 3DES, AES, SHA Security MD5, ARC4, RNG, ZUC, AES, SHA, 802.1ae (MACSec) 7
SmartFusion2 Product Family SmartFusion2 Features M2S005 M2S010 M2S025 M2S050 M2S060 M2S090 M2S150 Maximum Logic Elements (4LUT + DFF) 6,060 12,084 27,696 56,340 56,520 86,184 146,124 Math Blocks (18 18) 11 22 34 72 72 84 240 Logic/DSP Fabric Controllers (FICs) 1 2 1 2 PLLs and CCCs 2 6 8 Security AES256, SHA256, RNG AES256, SHA256, RNG, ECC, PUF Cortex-M3 + instruction Cache Yes envm (K Bytes) 128 256 512 MSS esram (K Bytes) 64 esram (K Bytes) Non-SECDED 80 CAN, 10/100/1000, HS USB 1 Each Multi-Mode UART, SPI, I2C,Timer 2 Each LSRAM 18K Blocks 10 21 31 69 109 236 Fabric Memory usram 1K Blocks 11 22 34 72 112 240 Total RAM (K bits) 191 400 592 1,314 2,074 4,488 DDR Controllers (count width) 1 18 2 36 1 18 2 36 High Speed SERDES Lanes 0 4 8 4 16 PCIe End Points 0 1 2 4 MSIO (3.3 V) 115 123 157 139 271 309 292 MSIOD (2.5 V) 28 40 62 40 106 User I/O DDRIO (2.5 V) 66 70 176 76 176 Total User I/Os 209 233 267 377 387 425 574 I/Os Per Package Package Options Package Type FCS(G)325 VF(G)256 FCS(G)536 VF(G)400 FCV(G)484 TQ(G)144 FG(G)484 FG(G)676 FG(G)896 FC(G)1152 Pitch (mm) 0.5 0.8 0.5 0.8 0.5 1.0 1.0 1.0 1.0 Length Width (mm) 11 11 14 14 16 16 17 17 19 19 20 20 23 23 27 27 31 31 35 35 Device I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes M2S005 (S) 161 171 84 209 M2S010 (S/T/TS) 138 2 195 4 84 233 4 M2S025 (T/TS) 180 2 138 2 207 4 267 4 M2S050 (T/TS) 200 2 207 4 267 4 377 8 M2S060 (T/TS) 200 2 207 4 267 4 387 4 M2S090 (T/TS) 180 4 267 4 425 4 M2S150 (T/TS) 293 4 248 4 574 16 Note: 090 FCSG325 is 11x13.5 package dimension Highlighted devices can migrate vertically in the same package. Microsemi Corporate Headquarters One Enterprise, Aliso Viejo, CA 92656 USA Within the USA: +1 (800) 713-4113 Outside the USA: +1 (949) 380-6100 Fax: +1 (949) 215-4996 Email: sales.support@microsemi.com www.microsemi.com 2017 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are registered trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners. Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for aerospace & defense, communications, data center and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world s standard for time; voice processing devices; RF solutions; discrete components; enterprise storage and communication solutions, security technologies and scalable anti-tamper products; solutions; Power-over- ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, California and has approximately 4,800 employees globally. Learn more at www.microsemi.com. Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction with mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer s responsibility to independently determine suitability of any products and to test and verify the same. The information provided by Microsemi hereunder is provided as is, where is and with all faults, and the entire risk associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice. SF2-07/17