I N T E R C O N N E C T A P P L I C A T I O N N O T E. Z-PACK TinMan Connector Routing. Report # 27GC001-1 May 9 th, 2007 v1.0

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I N T E R C O N N E C T A P P L I C A T I O N N O T E Z-PACK TinMan Connector Routing Report # 27GC001-1 May 9 th, 2007 v1.0 Z-PACK TinMan Connectors Copyright 2007 Tyco Electronics Corporation, Harrisburg, PA All Rights Reserved

Table of Contents Item Page # I. INTRODUCTION...2 II. CONNECTOR OVERVIEW: Z-PACK TINMAN...3 A. Background...3 B. Typical Implementations...4 1. Right-Angle Differential...4 2. Mid-Plane applications...4 3. Orthogonal, Coplanar, & Mezzanine applications...5 III. CONNECTOR DEFINITION...6 A. Drilled Hole Dimensions...6 B. Fabrication Technology...6 1. Pad Size...7 2. Non-functional Pads...7 3. Thermal Reliefs...7 4. Antipad Size...8 C. High-Speed Via Design...10 1. Counterboring...10 2. Blind Vias...10 IV. ROUTING...11 A. Routing Channels...11 B. Trace Widths...12 C. Skew & Propagation Delay...12 V. PART PLACEMENT...12 VI. ADDITIONAL INFORMATION...13 A. Gigabit Research and General Application Notes...13 B. Electrical Models...13 VII. CONTACT INFORMATION...13 The information contained herein and the models used in this analysis are applicable solely to the specified Tyco Electronics connector as dated by the document. All information should be verified that it is representative of the current implementation of the connector. Alternative connectors may be footprint-compatible, but their electrical performance may vary significantly, due to construction or material characteristics. Usage of the information, models, or analysis for any other connector or previous implementation is improper, and Tyco disclaims any and all liability or potential liability with respect to such usage.

Z-PACK TinMan Connector Routing I. INTRODUCTION As engineers design systems that attempt to push serial speeds across backplane environments in the gigabit per second range, the selection of the system s electrical connector becomes more significant. Electrical, mechanical, and manufacturing aspects of the connector must be considered simultaneously. At the board level these aspects combine with common board design practices to influence the design of the connector-toboard interface and how the board itself will be routed. The manner in which the connector is designed into the system can significantly impact the system s intended performance. Tyco Electronics has been actively researching these areas in an effort to help customers use the Z-PACK TinMan connector in gigabit serial systems. The combination of interconnect research and intimate knowledge of the connector is presented to provide insight into the capability of a Z-PACK TinMan-based system design. Furthermore, this document provides specific design recommendations that will address layout, electrical performance, and manufacturability tradeoffs of the connector at the board level. PAGE 2 May 9, 2007

II. CONNECTOR OVERVIEW: Z-PACK TINMAN A. BACKGROUND Figure 1: Z-PACK TinMan Backplane Connectors Available for both 0.8 inch and 1.0 inch card spacing, the Z-PACK TinMan series is a product combining both low cost, high density, and high performance while allowing freedom to match power modules, and guidance, keying, and electrostatic discharge (ESD) options from numerous product lines, to address the needs of the most unique and demanding applications. At 53 differential pairs per inch in the 0.8 slot pitch version, and 66 differential pairs per inch in the 1.0 slot pitch version, Z-PACK TinMan has a density to match the most complex of applications. Outstanding features of the product family include rugged overmolded receptacle design, protective end wall configurations, per-module signal guidance, reversible no-fault header assembly, tool-less receptacle assembly, field replaceable pins, and more. Both the backplane and daughtercard connectors use industry standard compliant pin technology to attach to PCBs. A unique compliant pin design for all high-speed contacts increases the performance of the connector. Customers have the freedom to customize the sequencing pattern of the contacts to support a variety of electrical requirements. The Z-PACK TinMan series is ideally suited to applications such as high-speed telecommunications equipment, all classes of servers, and data storage and transport applications. PAGE 3 May 9, 2007

B. TYPICAL IMPLEMENTATIONS Z-PACK TinMan is a high-speed connector that is typically implemented in high-speed differential applications. Although it can be implemented in single-ended applications as well, some grounding may be required depending upon the application. The variety of application spaces that Z-PACK TinMan can be used in are numerous, so the most common implementation spaces are described below. 1. RIGHT-ANGLE DIFFERENTIAL In the differential implementation, the identical backplane and daughtercard pinouts are shown in Figure 2. The illustrations in this section are specific to the 25.4 mm (1.0 ) slot pitch part, but are extensible to other slot pitches. Please refer to the latest customer drawings for the specific part that you are using for overall dimensions and to determine the proper module to module spacing, as it may likely differ from the column pitch. Row A Row B Row C Row D Row E Row F Row G Row H Row I Row J Row K Row L Row M Row N Row O 1.4 mm 1.4 mm Differential pair Ground 1.9 mm Figure 2: Differential Backplane and Daughtercard Pinouts Each differential column contains five pairs in the 1.0 module. Two different columns are used in an assembly to achieve the optimal differential wiring pattern. The connector has a 2:1 signal-to-ground ratio, with pairs arranged in a staggered-grounding pattern. Regardless of the pin staggering, pins and associated holes are maintained on a 1.4 mm x 1.9 mm square grid. 2. MID-PLANE APPLICATIONS Z-PACK TinMan backplane connector can also be incorporated in a mid-plane application where front cards and rear card share the same plated through-holes in the midplane. When transferring differential signals (in-column) from a front plug-in card to a rear plug-in card through the mid-plane, the skew within each pair of the column comes into PAGE 4 May 9, 2007

consideration. The resultant coplanar orientation of the plug-in cards results in a doubling of the skew within each pair, as compared to typical backplane style applications. If the same header and receptacle parts are used for both front and rear cards, then it is essential to include a shift of one column between the front and rear connectors. Alternately, reverse loaded connectors which have the order of the two columns reversed within each module, could be used without the one column shift. One of the two alignment methods is required to ensure proper signal connections. A mid-plane PCB minimum thickness of 5.5 mm is required to achieve safe assembly of modules on both sides of the PCB. 3. ORTHOGONAL, COPLANAR, & MEZZANINE APPLICATIONS The Z-PACK TinMan backplane connector family can also be incorporated in an orthogonal, coplanar, and mezzanine (stacking) applications. The layout considerations for these parts differ from the recommendations in this document. Please contact Tyco Electronics for product information. Figure 3: Z-PACK TinMan Orthogonal Connector PAGE 5 May 9, 2007

III. CONNECTOR DEFINITION A. DRILLED HOLE DIMENSIONS Full mechanical dimensioning and tolerances are available for all versions of the Z- PACK TinMan connector. These drawings can be located at www.tycoelectronics.com. The dimensions critical to routing of the Z-PACK TinMan connector are related to the hole pattern, or footprint, of the connector. Table 1 is provided to quickly identify critical hole dimensions for the circuit board. Hole Dimension Drill Hole Size Finished Hole Size Hole Copper Thickness B. FABRICATION TECHNOLOGY Daughtercard Diameter mm (in.) 0.55 ± 0.02 (0.0217 ± 0.0008) 0.46 ± 0.05 (0.018 ± 0.002) 0.0375 ± 0.0125 (0.0015 ± 0.0005) Table 1: Connector Hole Dimensions Backplane Diameter mm (in.) 0.55 ± 0.02 (0.0217 ± 0.0008) 0.46 ± 0.05 (0.018 ± 0.002) 0.0375 ± 0.0125 (0.0015 ± 0.0005) Other important dimensions for board layout are determined by the capabilities of the circuit board fabricator. Current high-tech PCB industry fabrication technology (i.e. capability) requires minimum pad sizes ranging from D+10 mils through D+18 mils, where D is the diameter of the drilled hole size (1 mil, or 0.001, is 0.0254 mm). These resultant pad size for a given technology is typically defined as the minimum pad size required to maintain 0.05 mm (0.002") of annular ring for a given PCB manufacturer s capability. Annular ring is an industry standard measure of the clearance between the pad edge and worst-case drill edge after manufacturing. For the Z-PACK TinMan connector this results in minimum pad sizes ranging from 0.81 mm (0.0317") to 1.01 mm (0.0397"). Because the Z-PACK TinMan is typically used in high speed or dense applications where routing issues are most significant, all pad dimensions in this document will assume a D+12 mil pad size, unless otherwise specified. The pad diameter may be optimized for specific project needs, and should be evaluated on a project and vendor basis. Designing with a D+10 mil technology PCB or smaller could mean reduced yields or breakout, potentially adding cost to the PCB or violating industry specification compliance. Note: A minimum pad to trace clearance of 0.13 mm (0.005") will also be assumed for calculating routing dimensions. PAGE 6 May 9, 2007

1. PAD SIZE Based upon the D+12 mil fabrication technology assumption, a 0.86 mm (0.034") diameter pad should be used with all Z-PACK TinMan connector pins. For higher-tech PCBs (D+10 mil) the pad would be 0.81 mm (0.032 ). Table 2 summarizes different pad sizes for different manufacturing capabilities. Connector Pins Signal & GND Pad size High-tech Low tech D+10 D+12 D+14 D+16 D+18 0.81 mm 0.86 mm 0.91 mm 0.97 mm 1.02 mm (0.032 ) (0.034 ) (0.036 ) (0.038 ) (0.040 ) Table 2: Pad sizes for Z-PACK TINMAN In some cases the reduced manufacturability of a D+10 mil technology PCB or smaller is required to reduce pad sizes. A reduced pad may potentially reduced yields by causing breakout our open connections, which results in added cost of the PCB. Where possible the largest appropriate pad size should be used to provide the PCB manufacturer with the greatest flexibility, thereby reducing overall system costs. Although an increased pad size also reduces electrical performance by increasing the capacitance of the plated through-hole, this effect has only a minor impact when unused pads are removed from the signal via. 2. NON-FUNCTIONAL PADS The removal of non-functional internal pads will improve signal integrity and manufacturability of the PCB. However, some assembly facilities prefer that unused pads are retained in order to maintain hole integrity through various soldering processes. For electrical reasons it is recommended that unused pads be removed on internal layers. 3. THERMAL RELIEFS Thermal reliefs are not required on ground or power pins, because the Z-PACK TinMan connector uses a press-fit technology. A direct connection to reference and power planes will offer the lowest inductance connection to the circuit board. PAGE 7 May 9, 2007

4. ANTIPAD SIZE Via Antipads, or plane clearances (Figure 4), are required to separate signal holes from reference voltages to avoid shorting. Pad Choosing the proper size of these Trace clearances is critical in determining several other design parameters: signal integrity, EMI, voltage breakdown, and manufacturability. Determining the proper antipad size for Plane Antipad Z-PACK TinMan depends upon system design goals. Several scenarios are Figure 4: Antipad Illustration exemplified below. Antipad sizes are minimized: To reduce noise by closely shielding adjacent pins with reference planes To reduce EMI by minimizing aperture sizes in reference planes To maintain a strong reference to ground for single-ended traces and ground referenced differential traces Antipad sizes are maximized: To maximize voltage breakdown spacing between the pin and the reference plane To increase manufacturability by reducing the chance of shorting. To reduce reflections in a high-speed gigabit serial system by reducing the capacitive effect of the plated through-hole. In cases where antipads are minimized, the recommended antipad size is the pad diameter plus 0.25 mm (0.010 ). This size maximizes trace coverage, while not risking shorting the plane to the barrel in the case of drill breakout. Using a minimal antipad will increase the capacitance of the via and could degrade system performance at high speeds. When antipads are maximized, the antipad geometry is dependent on the type of signals passing through the vias. PAGE 8 May 9, 2007

The suggested antipad structure for differential signals encompasses two adjacent signal vias. This structure minimizes the via capacitance for both vias, while maintaining coupling between the two signals within the differential pair. The recommended antipad is designed to maximize routable trace widths and associated ground coverage. The antipad width can likely be increased to better balance trace ground coverage and minimization of via capacitance, once a trace geometry is determined. Figure 5 shows the recommended differential antipad in both an oval and octagon geometry. Figure 5: Differential Antipad Geometry These antipad recommendations are related to the D+12 pad technology used. The D+12 pad size, labeled as Pad in Figure 5 is 0.86 mm (0.034 ) in diameter. The antipad width labeled as W (top-bottom in the above figures) is 0.25 mm (0.010 ) bigger than the pad size. The resulting antipad width W should be 1.11 mm (0.044 ). The antipad length L is also dictated by the pad size, as well as the 1.4 mm pin-to-pin spacing. Taking both pad size and pin spacing into account, the antipad length L should be 3.34 mm (0.131 ). These resulting antipad dimensions of 3.34 mm (.0131 ) x 1.11 mm (.044 ) represent a geometry which maximizes routable trace widths and associated ground coverage assuming a D+12 technology. A board design that uses a non-d+12 pad sizing, will result in a difference in the antipad length L. A board design that does not require the entire width of the routing channel (routable space between columns) should use a larger antipad width W, to help with minimization of via capacitance. Routing geometries are discussed further in section IV. Note that this antipad size assumes that vertical routing will not be used. In cases where vertical routing is needed, a smaller antipad should be used to allow for trace coverage. PAGE 9 May 9, 2007

C. HIGH-SPEED VIA DESIGN At gigabit speeds, one of the limiting factors in system design is the effect caused by the via stub in the board. A via stub is the portion of the via that is not in series with the transmission path of the signal, as shown in Figure 12. At high frequencies, this parallel path creates a significant capacitive discontinuity, which degrades the throughput of the link. Although it has a small impact at lower frequencies, this stub typically becomes critical at speeds greater than 3.125 Gbps. Figure 6 Via Stub Z-PACK TinMan was designed to allow for various techniques to be applied to treat the via and remove the stub, without impacting the press-fit contact in the hole. When fully seated, the bottom tip of the eye of needle extends 1.4 mm (0.055 ) into the hole. Beyond this depth, various techniques can be employed to modify the via to eliminate the stub. Consult your board fabrication facility regarding their capabilities for these advanced technologies. 1. COUNTERBORING Counterboring is a technique that has been used for years by the microwave industry to treat vias in microwave designs. With digital signaling approaching microwave frequencies, similar techniques can be employed to enhance the signal integrity of a link. Counterboring is performed as one of the final steps in the board manufacturing process. After the multilayer board is laminated, drilled, and plated, designated holes are control-depth drilled to remove any via stub that is present. This controlled-depth drill should allow a minimum length of barrel to remain in the hole to allow the eyeof-needle to engage the via. These minimum lengths Figure 7 Counterbored Via are given above. Figure 7 illustrates a counterbored via. 2. BLIND VIAS An alternative approach that is equally as effective as counterboring is the use of blind vias. Like counterboring, care must be taken to ensure that the depth of the blind via is sufficient to fully engage the eye-of-needle. These minimum depths are given. Figure 8 illustrates a blind via. Figure 8 Blind Via PAGE 10 May 9, 2007

IV. ROUTING Because the Z-PACK TinMan connector can be used for both single-ended and differential signals, the routing of both signal types will be examined. Whether routing into or through the Z-PACK TinMan pinfield, the general guidelines are the same. A. ROUTING CHANNELS A routing channel is defined by the space between adjacent vias in the connector pinfield. In Z-PACK TinMan, both vertical (between rows of vias) and horizontal (between columns of vias) routing can be achieved. Typical backplane routing is implemented horizontally, because this type of routing allows for maximal antipad sizes without introducing ground plane voids under signal routing. Vertical routing is also possible through Z-PACK TinMan, but this type of routing should be performed with care to avoid routing over openings in the ground plane. When vertical routing is required, antipads should be reduced to provide appropriate coverage for signals. Note that this practice will increase the capacitance of associated vias and will typically decrease the throughput of those vias. Figure 9 illustrates horizontal and vertical routing techniques. Slot continues Slot continues Slot continues RECOMMENDED HORIZONTAL ROUTING NOT RECOMMENDED VERTICAL ROUTING RECOMMENDED VERTICAL ROUTING Figure 9: Routing Configurations PAGE 11 May 9, 2007

B. TRACE WIDTHS The maximal trace width that can be utilized in a routing channel is a function of the via pitch, the pad size, and the trace-pad clearance. If a D+12 pad size is utilized, the remaining space allows for 10 mil differential lines with an 11 mil intra-pair space. Table 3 illustrates the calculation of the available routing channel. Metric English Via pitch 1.90 mm 0.075 Pad diameter (D+12) -0.86 mm -0.034 Trace-pad clearance (x 2) -0.13 mm -0.005-0.13 mm -0.005 Available routing channel 0.78 mm 0.031 Table 3: Backplane Routing Channel Calculation For trace width determination, it is also important to ensure that traces have adequate ground coverage underneath them at all times. When routing through the connector pinfield, this coverage can be improved by reducing the antipad size on connector vias. However, antipad reduction can result in reduced performance of the via at high speeds. Conversely, with a narrower differential geometry, the antipad size may be increased to improve performance of the via at high speeds. Please refer to section III.B.4 for antipad size recommendations. C. SKEW & PROPAGATION DELAY Typical right-angle connectors have differing lengths for the two component signals in a differential pair. In the standard right-angle differential Z-PACK TinMan connector, the component signals within a differential pair have been length matched to each other, such that the differential skew within a pair is minimal. In order to have a zero-skew system, length compensating within a pair should be implemented in the differential routing. For current skew values for the specific Z-PACK TinMan connector configuration of interest, refer to documentation and models at www.tycoelectronics.com/products/simulation. V. PART PLACEMENT Part placement and spacing guidelines as well as associated up-to-date mechanical dimensions should be obtained in addition to this document. Placement related information is contained within the application specification, document #114-13144. The full mechanical dimensioning and tolerances are available for all versions of the Z-PACK TinMan connector within the customer drawing for the specific part number of interest. All of this information can be found at www.tycoelectronics.com, and also by contacting either your local Tyco Electronics sales support or the appropriate contact listed below. PAGE 12 May 9, 2007

VI. ADDITIONAL INFORMATION A. GIGABIT RESEARCH AND GENERAL APPLICATION NOTES More information regarding Tyco Electronics research into the transmission of electrical signals at gigabit speeds or general application notes are available for download from the Internet at www.tycoelectronics.com/products/simulation. B. ELECTRICAL MODELS Electrical SPICE and S-parameter models for the Z-PACK TinMan may be requested at modeling@tycoelectronics.com. VII. CONTACT INFORMATION The following key contacts can be used to obtain additional information on the Z-PACK TinMan product family. Technical Support Center 1-800-522-6752 www.tycoelectronics.com/help Bob Patterson, (717) 985-2810 rapatter@tycoelectronics.com Product Engineer Bob Hnatuck, Product Manager (717) 592-4168 rhnatuck@tycoelectronics.com PAGE 13 May 9, 2007