SpaceFibre IP Core, Alpha Test Programme, and Planned SpaceFibre Contracts Steve Parkes 1, Martin Suess 2 1 Space Technology Centre, University of Dundee, UK 2 ESA, ESTEC 1
Contents SpaceFibre IP Core SpaceFibre Alpha Programme SpaceFibre Development Contracts 2
SpaceFibre IP Core Management Interface VC Interface Broadcast Interface Management Layer Virtual Channel Layer Framing Layer Retry Layer Broadcast Layer Frame Interface Retry Interface 3 Multi-Lane Layer Lane Layer Encoding Layer Serialisation Layer Physical Layer Multi-Lane Interface Lane Interface Encoding/Decoding Interface SerDes Interface Serial Interface
SpaceFibre IP Core VHDL IP Core Compliant to current version of standard Interfaces Virtual channel interface Broadcast channel interface Management interface Virtual channels Generics for number of VCs 1k byte buffers (TBC) Broadcast Link level broadcast mechanism 4
SpaceFibre IP Core VHDL IP Core QoS Integrated priority and bandwidth reservation Scheduling with 64 time-slots (TBC) Retry Rapid retry Single lane Multi-lane support will be provided 2Q2013 Xilinx GBT interface TLK2711 interface coming soon 5
SpaceFibre Alpha Programme Support to three ESA projects SpaceFibre IP Core Licence Specified ESA project Specified site Support for the use of the IP core Specified ESA project Specified site One StarFire unit SpaceFibre diagnostic interface and analyser Includes upgrades for two years To support revisions of SpaceFibre standard 6
StarFire 7 SpaceFibre Diagnostic Interface and Analyser Interface Functions Two SpaceFibre ports Two SpaceWire ports One USB port Input and output triggers Logic analyser outputs Internal logic analyser Configured over USB interface
StarFire SpaceFibre 2.5 Gbits/s signalling rate 8 VCs on each SpaceFibre interface 2 VCs connected to internal SpW router 6 VC connected to high speed pattern generators/checkers Diagnostics Full analysis capabilities Monitoring signals from UUT Lane initialisation Frame transfer Packets over up to 8 VCs Broadcast operation 8
StarFire Analysis In-line analysis Between two UUTs Once connection established can capture and analyse Control words Data frames Broadcast frames Idle frames Packet transfer over up to 8 VCs 9
StarFire Word viewer 10
StarFire Frame viewer 11
StarFire Architecture USB SpW 3 1 5 6 VC/BC IF SpaceFibre Port 1 (8 Virtual Channels) SpF SpW 2 Router Reg Analyser Mictor 4 7 8 VC/BC IF SpaceFibre Port 2 (8 Virtual Channels) SpF Reg Analyser Mictor 12 RMAP Config (RMAP Target) Configuration Bus
StarFire Virtual Channel Interfaces SpW Router SpW to SpF VC 0 SpF to SpW SpW to SpF VC 1 SpF to SpW SpaceFibre CODEC VC 0 Data Generator VC 0 Data Checker VC 2 QOS Framing Registers VC VC 3-6 3-6 Data Data Generator Generator VC VC 3-6 3-6 Data Data Checker Checker VC 7 Data Generator VC 7 Data Checker VC VC 3-6 3-6 VC 7 13
Alpha Projects 2 x High Performance COTS Based Computer, Step 2 (Prototyping and Validation), Astrium (Fr), 4000105087 1 x Leon with Fast Fourier Transform Coprocessor, SSBV (NL), 4000104321 1 x FPGA Based Generic Module and Dynamic Reconfigurator, TWT (D), 22424 09 NL LvH 14
Extended Alpha Programme 15 SpaceFibre Alpha Programme extended to other users Provided with SpaceFibre IP core licence Support for use of IP core One StarFire unit Licence Per project Per site Special price for ESA projects For projects starting before end March 2013 For further details contact enquiries@star-dundee.com
SpaceFibre Demonstration Contracts 16
SpaceFibre Demonstration Contracts Prime contractor: University of Dundee Three sub-contracts to be let: Demonstrator Board SpaceFibre Cables SpaceFibre OpNet Modelling 17
SpaceFibre Demonstrator Board WP1 Architectural Design and Test Plan WP2 Design WP3 Manufacture WP4 Test WP5 EMC Testing 18
SpaceFibre Demonstrator Board 19 Outline specification SpaceFibre demonstrator board (4 off) Engineering model following flight rules Using commercial grade components With flight equivalents FPGA to hold SpaceFibre CODEC TLK2711 for SerDes Copper and fibre optic versions Connectors and cable assemblies to be free issued Fibre optic transceivers, connectors and cables to be free issued In-built test functionality to support testing Appropriate housing for EMC testing
Example SpFi Demo Board Architecture Copper Cable TLK2711A Copper Connector Termination Pads Configuration Jumpers SpaceFibre CODEC FPGA Logic Analyser Logic Analyser Header / Connector Fibre Optic Cable Fibre Optic Transceiver TLK2711A Bulkhead Connector Termination Pads Configuration Jumpers Programmable Oscillator S M A Configuration Jumpers Logic Analyser Power Planes Pi Filters Power Supply Connector 20
SpaceFibre Demonstrator Board EMC Testing EMC characterisation of a SpaceFibre system Copper and Fibre Optic Tests to include: Radiated emissions Radiated susceptibility Conducted emissions Conducted susceptibility Electro-static discharge Demonstration board and housing To be designed taking EMC testing into account. 21
SpaceFibre Demonstrator Board Any comments, hints or suggestions Before the SoW is finalised? 22
SpaceFibre Connectors and Cables Electrical connectors and cable assemblies to support SpaceFibre testing SpaceFibre electrical connector PCB mounting (20 off) SpaceFibre electrical cable assembly Two of each 0.5, 1, 2, 3, 4 and 5 m lengths SpaceFibre electrical cable 10 m length 23
SpaceFibre OpNet Modelling Complete model of SpaceFibre CODEC Covering all layers Virtual Channel, Broadcast Channel and Management interfaces To Physical interface Multi-lane layer model to be included Network layer model to be included Aim to validate the protocols used in SpaceFibre Complementary to System C modelling Being done by SUAI within SpW-RT project 24
SpaceFibre Demonstration Extensive support being provided For potential users of SpaceFibre Allowing: Experimentation Assessment for specific applications Feedback on the standard At low cost/risk Including support Including test equipment Path to flight Via IP core licence SpaceFibre training courses 25
Any questions or comments? 26