VXS-621 FPGA & PowerPC VXS Multiprocessor Xilinx Virtex -5 FPGA for high performance processing On-board PowerPC CPU for standalone operation, communications management and user applications Two PMC/XMC sites for maximum I/O density and flexibility Development Kits for Linux and VxWorks, including comprehensive FPGA IP core library FPGA and Power VXS Multiprocessor Overview The VXS-621 PowerPC and FPGA multiprocessor is designed to meet the signal processing needs of modern signal intelligence, software defined radio and radar applications. A Xilinx Virtex-5 FPGA enables high performance DSP applications to be implemented with low levels of power consumption. The FPGA processing is supplemented by an onboard PowerPC for standalone operation, communications management and user applications. The VXS-621 maximizes sensor I/O density with two PMC/XMC sites. These enable multi-channel signal digitization schemes to be implemented on-card, or pre-digitized signals to be brought on-board using digital I/O. Network I/O such as Ethernet or 1553 can also be implemented using mezzanine cards. As part of the scalable REVX series of products from Nallatech, the VXS-621 is complemented by further PMC/XMC mezzanines, VXS processing engines, and application development tools. Features Single Slot VXS Multiprocessor PowerPC node with Freescale MPC8548E processor 512MB DDR2-SDRAM for PowerPC FPGA node with Xilinx Virtex -5 LX155T FPGA 2 banks 4.5 MB QDR-II SRAM for FPGA 1 bank 32 MB QDR-II SRAM for FPGA Cross-point serial switch to handle serial communications 2x PMC/XMC sites Built-in Test capability Development Kits available for Linux and VxWorks FPGA Development Kit provides IP cores for all FPGA peripherals Air-cooled and conduction-cooled versions 10011100110011010101000010011000000110111011010110011001010110110010101010110001001100111001100110101010000100110000001101110110101100110010101101100101010101 11100110011010101000010011000000110111011010110011001010110110010101010110001001100111001100110101010000100110000001101110110101100110010101101100101010101100 00110011010101000010011000000110111011010110011001010110110010101010110001001100111001100110101010000100110000001101110110101100110010101101100101010101100010 1010101101100101010101100010011001110011001101010100001001100000011011101101011001100101011011001010101011000100110011100110011010101000010011000000110111011010110011001010 1101100101010101100010011001110011001101010100001001100000011011101101011001100101011011001010101011000100110011100110011010101000010011000000110111011010110011001010110110 0101010101100010011001110011001101010100001001100000011011101101011001100101011011001010101011000100110011100110011010101000010011000000110111011010110011001010110110010101 The Leader in FPGA 0101100010011001110011001101010100001001100000011011101101011001100101011011001010101011000100110011100110011010101000010011000000110111011010110011001010110110010101010110 Accelerated Computing 0010011001110011001101010100001001100000011011101101011001100101011011001010101011000100110011100110011010101000010011000000110111011010110011001010110110010101010110001001 1001110011001101010100001001100000011011101101011001100101011011001010101011000100110011100110011010101000010011000000110111011010110011001010110110010101010110001001100111 0011001101010100001001100000011011101101011001100101011011001010101011000100110011100110011010101000010011000000110111011010110011001010110110010101010110001001100111001100 1101010100001001100000011011101101011001100101011011001010101011000100110011100110011010101000010011000000110111011010110011001011011001010101011000100110011100110011010101
Functional Diagram Figure 1: VXS-621 Functional Diagram
PowerPC Node Device» Freescale MPC8548E (single e500 core)» Operating Frequency: 1 GHz Memory» 512MB DDR2 SDRAM» 64MB Flash Connectivity» PCI-X/PCI-64/PCI-32 Interface» x4 SRIO interface to FPGA» Local bus interface to FPGA» 2x backplane Ethernet ports» 2x backplane RS232 ports Host Controller» PowerPC local bus bridge» SelectMAP FPGA configuration» Temperature sensor interfacing» Clock control and reset sequencing» Boot flash controller» Power supply monitoring» BIOS control» Interrupt handling» Built-in host controller firmware updater FPGA Node FPGA» 1 FPGA Node per card» Xilinx Virtex-5 LX155T-2» Contact a Nallatech sales representative for Virtex-5 SXT/FXT FPGA availability» FPGA boot via host controller FPGA SRAM Banks (Low capacity)» 2x 4.5MB capacity QDR-II SRAM banks» 36 bit data bus (each bank)» 250MHz max operating frequency» 500Mb/s max data rate» Burst of 2 mode operation» Latency <65ns FPGA Node (continued) FPGA SRAM Banks (High capacity)» 1x 32MB capacity QDR-II SRAM bank» 36 bit data bus» 250MHz max operating frequency» 500Mb/s max data rate» Burst of 2 mode operation» Latency <65ns Connectivity Serial RapidIO» x4 Serial RapidIO link» Interconnects FPGA and PowerPC» Integrated into MPC8548E and FPGAs (via SRIO endpoint IP core)» Speed: 1.25/2.5/3.125 Gb/s High Speed Serial» Interconnects FPGAs, PMC/XMC sites, VXS backplane P0 ports» Speed: 1.25/2.5/3.125 Gb/s» Aurora protocol by default, other protocols supportable through use of additional IP cores VMEbus» Interconnects PowerPC to backplane VME bus via Tundra TSi148 VME bridge» VME64, 2eSST, master/slave mode PCI/PCI-X bus» Interconnects PowerPC to PMC/XMC sites and TSi148 VME bridge» 64-bit PCI 2.2 bus controller (up to 66 MHz, 3.3V I/O)» 64-bit PCI-X bus controller (up to 133 MHz, 3.3V I/O)» 32-bit PCI support Power PC Local Bus» Interconnects PowerPC to Host Controller and Flash» Bridged to FPGA node via Host Controller Ethernet» 2 Ethernet ports Interconnects PowerPC to backplane» Integrated into MPC8548E» Backplane P2 (copper): 1 channel 10BASE-T, 100BASE-TX, 1000BASE-T (with on-board PHY and magnetics) RS232» 2 RS232 independent ports» Interconnect PowerPC to backplane» Integrated into MPC8548E
Connectivity (continued) Backplane GPIO» 64 bit / 32 pairs backplane GPIO bus between FPGA and VXS backplane P2 connector (single ended or differential) Expansion PMC/XMC Sites» 2x PMC/XMC sites supporting Pn1, Pn2, Pn3, Pn4 and Pn5 connectors» PCI-X 133 PCI bus to PowerPC» 4x GTP links between XMC sites» 4x GTP links from each XMC site to cross-point switch» GTP links PCIe, SRIO capable (additional IP cores required)» XMC links use Aurora by default Development Kit» The VXS-621 Development Kit includes Software Development Kit, FPGA Development Kit, Hardware Documentation and Application Notes required to build applications for the VXS-621.» VXS-621 Development Kits are available for Linux or VxWorks 6.6. Software Development Kits (continued) VXS-621 VxWorks 6.6 SDK» Supports VxWorks 6.6» Includes VxWorks drivers and API to interface to and control card» Examples and documentation provided» Each Software Development Kit is included with the appropriate version of the VXS-621 Development Kit FPGA Development Kit» The VXS-621 FPGA Development Kit (FDK) provides an optimized Library of FPGA IP cores for the VXS-621» Cores Provided:» QDR-II SRAM (Low Capacity bank)» QDR-II SRAM (High Capacity bank)» Host controller local bus interface core» Clocking core» GTP link Aurora Cores» SRIO interface core» Cores are provided in pre-synthesized netlist format, and as VHDL source code» Examples and full documentation provided» The FPGA Development Kit is included with the appropriate version of the VXS-621 Development Kit Figure 2: VXS-621 Development Kit Software Development Kits VXS-621 Linux SDK» Compiled for Linux kernel 2.6.20» Includes Linux OS, device drivers and API to interface to and control card» Driver source code, examples and documentation provided» Examples and documentation provided Figure 3: VXS-621 FDK
Cable Pack A cable pack is available for VXS-621. This provides connectivity to the card from other systems for development and debug proposes. REVX Cable Pack A VXS» VXS JTAG & RS232 adaptor module breaks out JTAG and RS232 links to standard connectors from custom connectors on VXS card» VXS JTAG & RS232 adaptor module cables» RJ45 Ethernet cable» RJ11 RS232 cable and RJ11/DE9 adaptor Ruggedization Levels Level L1 L2 L3 L4 Description Operating Temp C Commercial Extended Temp Rugged Conduction Cooled Rugged 0 to +55-20 to +65-40 to +70-40 to +70 Compatibility of REVX Cable Pack A VXS with VXS-621:» The VXS JTAG & RS232 adaptor module and cable in this pack are used with the VXS-621 directly with only JTAG breakout being supported.» The Ethernet and RS232 cables are used in conjunction with the VXS-621 Rear Transition Module. A minimum of one cable pack is required to develop applications using the VXS-621. Rear Transition Module A Rear Transition Module (RTM) is available for VXS-621. This provides Ethernet and RS232 connectivity to the card. VXS-621-RTM» Standard form-factor VME rear transition module» 2x RJ45 connectors routed to VXS-621 backplane Ethernet port» 2x RJ11 connectors routed to VXS-621 backplane RS232 port The Ethernet and RS232 cables supplied in REVX Cable Pack A VXS can be used in conjunction with the VXS-621 Rear Transition Module. A minimum of one RTM is required to develop applications using the VXS-621. Storage Temp C Vibration Class Operating Shock Humidity Conformal Coat -40 to +85-40 to +85-50 to +100-50 to +100 5-100Hz 5-100Hz 100-1000Hz 0.1g²/Hz, 100-1000Hz 20g, 11mS 20g, 11mS 20g, 11mS 40g, 11mS No Optional Optional Optional Electrical» VXS-621 requires 5V to be supplied from the VME/VXS backplane» Hosted PMC cards may require 3.3V, +/-12V supplies in addition» Power consumption is application dependant. Power estimation tools from Xilinx can be used to estimate the power consumption of FPGA applications.» Contact a Nallatech sales representative for further information on power consumption