ic-nq, ic-nqc EVAL NQ6D EVALUATION BOARD DESCRIPTION

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ic-nq, ic-nqc EVL NQD EVLUTION ORD DESCRIPTION Rev, Page /0 ORDERING INFORMTION Type Order Designation Description Options Evaluation oard ic-nq EVL NQD ic-nq Evaluation oard ic-nqc EVL NQD ic-nqc Evaluation oard ready to operate, accessible through GUI via PC adapter Evaluation Software ic-nq GUI GUI software for Windows PC ic-nqc GUI GUI software for Windows PC stores setup to file, communication to the IC To be ordered separately see chapter EVLUTION SOFTWRE on page for more information PC dapter ic-m icsy MU PC-US dapter ic-m icsy MU PC-US dapter (supported by ic-nqc GUI only) ORD NQD (size 00 mm x 0 mm) Connections J J (J) (J) iss Interface Output (D-Sub, RS) (to another board) iss Interface Input (D-Sub, RS) (to iss-pc adapter or previous board) iss Interface Output (RJ) (to another board) iss Interface Input (RJ) (to iss-pc adapter or previous board) J oard Supply V (+ V...+ V) (jumpers J and J removed) J iss Line Signals of ic-nq(c) Test/Error/I C signals of ic-nq(c) Figure : Evaluation board NQD JP JP JP JP U D D Signal Return Jumper (SLO- to SL-) Signal Return Jumper (SLO+ to SL+) Jumper (adapter + V to ) V Jumper (adapter + V to V) ic-nq(c) Interpolation IC Power-On LED (green) Error LED (red) Copyright 00 ic-haus http://www.ichaus.com

ic-nq, ic-nqc EVL NQD EVLUTION ORD DESCRIPTION Rev, Page /0 Figure : Component side TERMINL DESCRIPTION J+* + V... + V oard Supply V J-* Ground V* + V... + V oard Supply V V* + V oard Supply Ground VREF Reference Voltage Output (+. V) nalog Supply Voltage IC (+ V) nalog Supply Ground IC (0 V) Figure : Component side (conducting paths) TERMINL DESCRIPTION PZERO Input Zero Signal + NZERO Input Zero Signal - PSIN Input Sine + NSIN Input Sine - PCOS Input Cosine + NCOS Input Cosine - D D Power-On LED (green) Error LED (red) Z (J) M (J) SLO (J) SLI Incremental Output Incremental Output Index Output Z Clock Input ic-nq(c) Serial Data Output ic-nq(c) Serial Data Input ic-nq(c) () SD () SCL () NER () () I C Data / Test Signal SIN+ of ic-nq(c) I C Clock / Test Signal SIN- of ic-nq(c) Error Input/Output of ic-nq(c) IC Supply (digital) IC Ground (digital) Notes: *) When connecting an external supply voltage jumpers JP and JP must be removed. RELTED DOCUMENTS ic-nq Data Sheet -Specification- ic-nq GUI -Evaluation Software for Windows PCs- http://www.ichaus.de/ic-nq ic-m icsy MU - PC-US DPTER - http://www.ichaus.de/mu ic-nqc Data Sheet -Specification- ic-nqc GUI -Evaluation Software for Windows PCs- http://www.ichaus.de/ic-nqc ic-m icsy MU - PC-US DPTER - http://www.ichaus.de/mu

ic-nq, ic-nqc EVL NQD EVLUTION ORD DESCRIPTION Rev, Page /0 CIRCUIT DESCRIPTION The NQD evaluation board is equipped with the ic-nq/ic-nqc Interpolator IC. The board features two sub-d pole iss plugs to support the cascading of multiple boards. ic-nq/ic-nqc GUI software can be used to access the board from a Windows PC what needs the MU respectively MU adapter. C opt NSIN IFZ-R J-NSL R YS0- J J-MO V IFZ-R J-M 00nF U- WP C0 U-S VOUT NCOS M J-V V PSIN k U SLO- M J-SLI J-S NERR R MO- S VCC J-SL U-S R IFZ-R J- J-NMO R J-SL R Z M0 opt C IFZ-R J-SLO NERR SHIELD_IN R SLO- J-M J-NSLI U-S SL+ S R J-S OUT SL- SL+ U- SLI+ RJ J-NM PCOS IFV-R J-S SCL 00nF J-NSL C C IF-R SLO+ 00nF Z 00nF VCC J-NMO C SLI SLO+ IFV-C J-SL J-V M- SLI+ IF-C IF-R IF-R 0 k J-NSL PCOS VREF SHIELD_OUT S R IFZ-R IF-R IN J-SLO J- SD C0 IF-R SLO- k IF-C V IF-R SLI MO+ NSIN 0 J NER 0 PZERO VREF NSIN IF-R IFZ-R D IFZ-R JP 0 JP.k R YS0- IF-R U- k IF-C 0 SCL J J GN D J-NSL J- JP 00nF JP 0 IF-C J- k SCL 0 J-V IF-R S SL- VREF J-SL NZERO k IF-C J-V D J-NSL IF-R IF-R 0 IF-R SL+ PSIN M+ M- SLO SLI- IF-R SLI- U-S IF-R IF-C JP J-V IFZ-C J-MO V PSIN J-SLI PZERO V OUT SL+ J- JP J- M+ J-NSLO U- SLI- U- IFV-C 0 0 0 VIN PCOS IF-R V SD J SLI M IFZ-R J- IFZ-C 0 J-NSLI R NCOS 0 J-SL V V_IN J-NM NSIN J- IF-R SLI+ J-NMO SD J-V 0.k 0 nf V_IN ic-nqc IN IF-R YS0- C J-S D SLO 0nF IF-R V D-SU J-SLO C0 IFZ-C NCOS MO+ _IN RJ D-SU MO- MO- V_IN M- M+ R _IN SL- J SLO+ VREF NZERO NZERO MO+ RD μf J SD NER C 0 SL- 0 PZERO J-SL SCL IF-R V_IN IFZ-R J- 0 J-M SLO 0 J-NSLO J-V U Z J-S J- D U- C 00nF U- J-SLI VREF J-SL J-NM R.k U- IF-C J-NSLI IFZ-R IFZ-R k J-SLI J- PZERO J-S J- M0 U C 00nF U-S J-NMO C0 U- J- U-S J-NSLI IF-R IF-R J- J-NSLO J-M.k R JP C IF-R μf 00nF PSIN C Z IFV-C R 0 nf U- J-V IFZ-R IFZ-R k k IF-R J-NSL J- IF-C JP J-SLO IF-R k IFZ-R IFZ-R IFZ-C J-MO IFZ-R IFZ-R IFZ-C J-NM 00nF C J-V 00nF C J JP JP IF-R J JP JP J-V IF-R NZERO IF-R IF-R J- IF-R IF-R k IF-R IF-R IFZ-R k IF-R J-NSL J-SL IF-R IF-C IF-C D YS0- J-S IFZ-C IF-R NCOS U ic-nqc IF-C GN J-V D J-NSL J-V R 0 IF-C J IFV-C 0 IFV-R IF-R J-MO J-NSLO PCOS R 0 J-S RD 0nF C D Figure : Circuit diagram equipped with ic-nqc (resp. ic-nq) including optional components.

ic-nq, ic-nqc EVL NQD EVLUTION ORD DESCRIPTION Rev, Page /0 SSEMLY PRT LIST Device Value (typical) Comment oard NQD R 0 Ω R, R Ω R, R 0 Ω C 0 nf C-C, C, C 00 nf C µf D, D YS0- D SMD LED green D SMD LED red U ic-nqc or ic-nq U, U LC U 0 U C0 S-S MK0G S, S MK0G J D-Sub -pole, male J D-Sub -pole, female J KL0-0 Pin bar -pole, single-in-line JP-JP Pin bar -pole, single-in-line IF-R, IF-R IF-R, IF-R kω serial resistors for input protection (assembled when shipped) IFZ-R, IFZ-R IFV-C nf assembled IFV-R 0 Ω assembled

ic-nq, ic-nqc EVL NQD EVLUTION ORD DESCRIPTION Rev, Page /0 JUMPER ND PLUG DESCRIPTION J: iss Interface Output -pin Sub D Connector - male PIN Name Function V + V supply voltage MO + Clock output MO - Clock output (inverted) + V supply voltage SLO - Data output (inverted) 0 V ground SL + Data line SL - Data line (inverted) SLO + Data output J: iss Interface Input -pin Sub D Connector - female PIN Name Function V + V supply voltage M + Clock input M - Clock input (inverted) + V supply voltage SLI - Data input (inverted) 0 V ground SL + Data line SL - Data line (inverted) SLI + Data input Voltage Supply - dapter MU Voltage Supply Component Supply Jumper Configuration via board terminals via J plug ic-nq(c) JP () + V via J JP (V) + V via J - X via J () bridged open - X via J (V) open bridged X X via board terminals open open X X shortens V terminal to J bridged don t care X X shortens V terminal to J don t care bridged Voltage Supply - dapter M Voltage Supply Component Supply Jumper Configuration via board terminals via J plug ic-nq(c) M JP () JP (V) - none no voltage supply don t care don t care X none via board terminals bridged don t care Communication Chain oard oard Information Jumper configuration Jumper configuration Comments JP JP JP JP Single-oard connection bridged bridged N/ N/ shipment setup oard-to-oard connection. open open bridged bridged dapter oard (J) oard (J) oard (J) Notes ) Supply of + V to + V required to board terminals V and ) Supply voltage sourced from J plug out of PC adapter ) M needs to be externally supplied via the NQD evaluation board

ic-nq, ic-nqc EVL NQD EVLUTION ORD DESCRIPTION Rev, Page /0 EVLUTION SOFTWRE ic-nq(c) software for PCs running on Windows operating systems as well as the required US and/or LPT driver are available as a ZIP file. ic-haus software built with LabVIEW requires the installation of the LabVIEW Run- Time Engine (RTE). The RTE must be installed only once, hence there are two download links available. Software overview online: http://www.ichaus.de/software Download package without RTE (small size) including RTE (big size) ic-nq: http://www.ichaus.de/nq_gui http://www.ichaus.de/nq_gui_rte ic-nqc: http://www.ichaus.de/nqc_gui http://www.ichaus.de/nqc_gui_rte Features Reducing evaluation and design-in time and cost Manually setting up parameters of ic-nq(c) Saving parameter configuration into EEPROM Saving parameter configuration to HEX files Loading predefined configurations from HEX files Reading and displaying of sensor data Installation fter unzipping the ic-nq(c) software package NQ(C)SO_gui_xx resp. NQ(C)SO_gui_xxrte, the following files are located in the selected working directory. xx is a placeholder for revisions Subfolder NQ(C)SO_gui_xx including the executable setup.exe which starts the installation routine. Driver packages for US, LPT and/or other adapter devices. Evaluation board description. Note: dministrator rights are required to run installations.. To access the ic-nq(c) evaluation board, interface adapter drivers for US, LPT and/or other adapter devices need to be installed. efore connecting the adapter to your PC the driver installation must be completed successfully. Execute the US_xx.exe and/or LPT_xx.exe installation package and follow the on-screen instructions. This can take a few minutes.. When using an ic-haus US adapter, it must be connected to the PC after the driver installation, to complete the whole driver installation procedure.. Install the evaluation software NQ(C)SO by executing the setup.exe located in the subfolder NQ(C)SO_gui_xx. Follow the on-screen instructions to finish the installation.. fter installation the executable NQ(C)SO_gui_xx.exe will be available in the selected working directory. Figures and show a screenshot of the evaluation software. LabView is a trademark of National Instruments.

ic-nq, ic-nqc EVL NQD EVLUTION ORD DESCRIPTION Rev, Page /0 Figure : Evaluation software start-up window ic-nq Figure : Evaluation software start-up window ic-nqc

ic-nq, ic-nqc EVL NQD EVLUTION ORD DESCRIPTION Rev, Page /0 Function Description The ic-nq(c) evaluation software starts in No Hardware mode (Interface disconnected). For a detailed description of the parameter settings please refer to ic-nq(c) s data sheet. When moving the mouse cursor to a parameter input box, a tooltip is displayed identifying the corresponding parameter name as described in the specification. The software is divided into five sections. Menu Header Sensor Parameter Status Menu Section utton Description <File> Save File Saves the configuration to a file, Intel HEX file format (*.hex). Load File Loads the configuration to the IC, Intel HEX file format (*.hex). Save iss Master Config Saves a *.cfg file with the current iss master configuration (for ic- M only) Exit Quits the software. <Interface> iss Setup Opens a window for iss master clock configuration. Connect & Read Checked: connects the PC adapter and reads the IC registers. Unchecked: connects the PC adapter without reading the IC registers. No Hardware Switches to No Hardware mode to reset the communication between the PC and the adapter. ic-interface LPT (M) for use with PC-LPT adapter M... ic-interface US (MU) for use with PC-US adapter MU resp. MU-IC... ic-interface US (MU) for use with PC-US adapter MU (supported by ic-nqc GUI only)......enables communication between the PC and the ic-nq(c) and reads all parameters from the ic to the evaluation software. <Extras> bout dditional software information. Header Section Project title, software version and connection state.

ic-nq, ic-nqc EVL NQD EVLUTION ORD DESCRIPTION Rev, Page /0 Sensor Section Reading and displaying of sensor data. utton Description <Sensor> Read Sensor Reads one data frame from ic-nq(c). Output Displays sensor data in decimal, HEX or binary format. Stop on Error Stops reading sensor data if an error occurs. Continuous Read Continuously reads data frames. Data Display Enables a window to visualize sensor data. Save to File This function works in different ways, depending on the adapter used. MU: Saves to file while reading sensor data. MU: Reads the amount of cycles defined by Cycle Count and writes the array of data to the file afterwards. While reading the amount of cycles the software is not responding to user interaction. Cycle Count Only available when using adapter MU. Defines the amount of iss Frames (cycles) to read. Parameter Section Reading and writing Parameter configuration. utton Description <Tabs> Signal Conditioning see ic-nq(c) datasheet Interpolator Setup see ic-nq(c) datasheet Interface Setup see ic-nq(c) datasheet HEX Editor This tab is a different view of the IC s register content in HEX format. Changes made are not automatically updated to the other tabs. Push <Read RM> to update the parameter tabs. ic-nqc only <Parameter> Read RM Write RM Write Immediately Write EEPROM The HEX Editor is divided into several tabs displaying the banks of the ic-nqc. y choosing a larger EEPROM type this HEX Editor will expand and more banks will be available. Reads all parameters from the ic-nq(c) to the evaluation software. Writes all parameters from the software to the ic-nq(c) RM. Writes changes to parameters immediately. Disable this to use the software without hardware. Writes all parameters and the iss ID to the EEPROM (For parameter settings, please refer to ic-nq(c) data sheet for a detailed description.) Status Section Displaying feedback of user interaction. REVISION HISTORY Rev Notes Pages affected Initial version Chapter Evaluation Software revised - Chapter Evaluation Software revised; dapter MU added, -

ic-nq, ic-nqc EVL NQD EVLUTION ORD DESCRIPTION Rev, Page 0/0 ic-haus expressly reserves the right to change its products and/or specifications. n info letter gives details as to any amendments and additions made to the relevant current specifications on our internet website www.ichaus.de/infoletter; this letter is generated automatically and shall be sent to registered users by email. Copying even as an excerpt is only permitted with ic-haus approval in writing and precise reference to source. ic-haus does not warrant the accuracy, completeness or timeliness of the specification and does not assume liability for any errors or omissions in these materials. The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of the product. ic-haus conveys no patent, copyright, mask work right or other trade mark right to this product. ic-haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. s a general rule our developments, IPs, principle circuitry and range of Integrated Circuits are suitable and specifically designed for appropriate use in technical applications, such as in devices, systems and any kind of technical equipment, in so far as they do not infringe existing patent rights. In principle the range of use is limitless in a technical sense and refers to the products listed in the inventory of goods compiled for the 00 and following export trade statistics issued annually by the ureau of Statistics in Wiesbaden, for example, or to any product in the product catalogue published for the 00 and following exhibitions in Hanover (Hannover-Messe). We understand suitable application of our published designs to be state-of-the-art technology which can no longer be classed as inventive under the stipulations of patent law. Our explicit application notes are to be treated only as mere examples of the many possible and extremely advantageous uses our products can be put to.