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SPECIFICATIONS FOR LCD MODULE CUSTOMER CUSTOMER PART NO. ACMMI PART NO. OD-AMC164A SERIES DESCRIPTION APPROVED BY DATE PAGE 1 OF 23

DOCUMENT REVISION HISTORY: DATE PAGE DESCRIPTION 1999.8. 25.3. 25.12 - - 4 First release Modify the full specification Update the part number system PAGE 2 OF 23

Contents 1. Module Classification Information 2. Precautions in use of LCD Modules 3. General Specification 4. Absolute Maximum Ratings 5. Electrical Characteristics 6. Optical Characteristics 7. Interface Pin Function 8. Power Supply 9. Contour Drawing & Block Diagram 1. Function Description 11. Character Generator ROM Pattern 12. Instruction Table 13. Timing Characteristics 14. Initializing of LCM 15. Quality Assurance 16. Reliability PAGE 3 OF 23

1. Module Classification Information A M C 1 2 1 Brand:ACMMI 1 6 2 A R - B - B 6 W T D W - S P 3 4 2 Display Type:C Character Type, G Graphic Type, NONE Custom-made 3 Display Font:Characters X Lines / Rows X Columns /Others 4 Model serials no. 5 RoHS compliant: R YES NONE NO 6 IC Package Type: M SMT Type B COB Type T TAB Type G COG Type F COF Type S Special 7 LCD Mode: P TN Positive N TN Negative Y STN Positive, Yellow Green B STN Negative, Blue G STN Positive, Gray W FSTN Positive T FSTN Negative F FFSTN Negative S Special 8 Viewing direction 6 6:,12 12:, S Special 9 Temperature range N Normal Temperature W Wide Temperature S Special 1 LCD Polarizer Type R Reflective T Transmissive F Transflective S Special 11 Backlight Type N None D LED E EL F CCFL S Special 12 Backlight Color Y Yellow-green B Blue A Amber W White G Green R Red S Special 13 Internal Code 5 6 7 8 9 1 11 12 13 PAGE 4 OF 23

2. Precautions in use of LCD Modules (1)Avoid applying excessive shocks to the module or making any alterations or modifications to it. (2)Don t make extra holes on the printed circuit board, modify its shape or change the components of LCD module. (3)Don t disassemble the LCM. (4)Don t operate it above the absolute maximum rating. (5)Don t drop, bend or twist LCM. (6)Soldering: only to the I/O terminals. (7)Storage: please storage in anti-static electricity container and clean environment. 3. General Specification Item Dimension Unit Number of Characters 16 characters x 4 Lines - Module dimension(no Backlight ) 87. x 6. x 9.(MAX) mm Module dimension(with LED Backlight ) 87. x 6. x 14.(MAX) mm View area 61.8 x 25.2 mm Active area 56.2 x 2.8 mm Dot size.55x.55 mm Dot pitch.6 x.6 mm Character size 2.95 x 4.75 mm Character pitch 3.55 x 5.35 mm LCD type STN Duty 1/16 View direction Backlight Type 6 o clock or 12 o clock None, YELLOW-GREEN,WHITE PAGE 5 OF 23

4. Absolute Maximum Ratings Item Symbol Min Max Unit Input Voltage V I -.3 VDD+.3 V Supply Voltage For Logic VDD-V SS -.3 7. V Supply Voltage For LCD V DD -V Vdd-13.5 V Standard Operating Temp. Top 5 Temperature LCM Storage Temp. Tstr -1 6 Wide Temperature Operating Temp. Top -2 7 LCM Storage Temp. Tstr -3 8 5. Electrical Characteristics Supply Voltage For Logic Item Symbol Condition Min Typ Max Unit V DD -V SS - 4.5 5. 5.5 V Supply Voltage For LCD V DD -V Ta=25 4.3 5. 5.5 V Input High Volt. V IH -.7 V DD - V DD V Input Low Volt. V IL - V SS -.3 V DD V Supply Current I DD V DD =5V.5 1. 1.5 ma Supply Voltage of Yellow-green backlight Supply Voltage of White backlight V LED V LED Forward current =2 ma Number of LED die 2x2= 4 Forward current =3 ma Number of LED die 1x2= 2 3.8 4.1 4.3 V 2.9 3.1 3.3 V PAGE 6 OF 23

6. Optical Characteristics Item Symbol Condition Min Typ Max Unit View Angle (V)è CR2-2 - 35 deg (H)ö CR2-3 - 3 deg Contrast Ratio CR - - 3 - - Response Time T rise - - - 25 ms T fall - - - 25 ms Definition of Operation Voltage (Vop) Definition of Response Time ( Tr, Tf ) Intensity Selected Wave Non-selected Conition Selected Conition Non-selected Conition 1% Non-selected Wave Intensity 1% Cr Max Cr = Lon / Loff 1% 9% Vop Driving Voltage(V) Tr Tf [positive type] [positive type] Conditions : Operating Voltage : Vop Viewing Angle(è,ö) :, Frame Frequency : 64 HZ Driving Waveform : 1/N duty, 1/a bias Definition of viewing angle(cr2) PAGE 7 OF 23

θ f θ l θ b θ r φ = 18 φ = 27 φ = 9 φ = 7. Interface Pin Function Pin No. Symbol Level Description 1 V SS V Ground 2 V DD 5.V Supply Voltage for logic 3 V (Variable) Operating voltage for LCD 4 RS H/L H: DATA, L: Instruction code 5 R/W H/L H: Read(MPU Module) L: Write(MPU Module) 6 E H,H L Chip enable signal 7 DB H/L Data bit 8 DB1 H/L Data bit 1 9 DB2 H/L Data bit 2 1 DB3 H/L Data bit 3 11 DB4 H/L Data bit 4 12 DB5 H/L Data bit 5 13 DB6 H/L Data bit 6 14 DB7 H/L Data bit 7 15 LED(+) Anode of LED Backlight 16 LED(-) Cathode of LED Backlight PAGE 8 OF 23

8. POWER SUPPLY SINGLE SUPPLY VOLTAGE TYPE DUAL SUPPLY VOLTAGE TYPE PAGE 9 OF 23

9. Contour Drawing &Block Diagram 87. À.5 82. 1. P2.54x(16-1)=38.1 1.8 16-1. 3. NO B/L 9. MAX. 14. MAX. 4.6 À.5 9.7 À.5 LED B/L 1 16 4. 25.2[V.A.] 2.8[A.A.] 55. 6. À.5 56.2[A.A.] 61.8[V.A.] 81.5 4-2.5 1.6 À.1 1.6 À VDD V VSS E R/W RS DB DB7 8 CONTROLLER 16 16 4 4 4 DRIVER 4 LCD PANEL 16X4 CHARACTERS 4 4.55.5 3.55 2.95 4 DRIVER DRIVER 5.35 4.75.55.5 A K LED BACKLIGHT S6A69 OR EQUIVALENT PAGE 1 OF 23

1. Function Description The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an instruction register (IR) and a data register (DR). The IR stores instruction codes, such as display clear and cursor shift, and address information for display data RAM (DDRAM) and character generator (CGRAM). The IR can only be written from the MPU. The DR temporarily stores data to be written or read from DDRAM or CGRAM. When address information is written into the IR, then data is stored into the DR from DDRAM or CGRAM. By the register selector (RS) signal, these two registers can be selected. RS R/W Operation IR write as an internal operation (display clear, etc.) 1 Read busy flag (DB7) and address counter (DB to DB7) 1 Write data to DDRAM or CGRAM (DR to DDRAM or CGRAM) 1 1 Read data from DDRAM or CGRAM (DDRAM or CGRAM to DR) Busy Flag (BF) When the busy flag is 1, the controller LSI is in the internal operation mode, and the next instruction will not be accepted. When RS= and R/W=1, the busy flag is output to DB7. The next instruction must be written after ensuring that the busy flag is. Address Counter (AC) The address counter (AC) assigns addresses to both DDRAM and CGRAM Display Data RAM (DDRAM) This DDRAM is used to store the display data represented in 8-bit character codes. Its extended capacity is 8 8 bits or 8 characters. Below figure is the relationships between DDRAM addresses and positions on the liquid crystal display. High bits Low bits Example: DDRAM addresses 4E AC (hexadecimal) AC6 AC5 AC4 AC3 AC2 AC1 AC 1 1 1 1 PAGE 11 OF 23

Display position DDRAM address 1 2 3 4 5 6 7 8 9 1 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 A B C D E F 4 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 1 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 5 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 4-Line by 16-Character Display Character Generator ROM (CGROM) The CGROM generate 5 8 dot or 5 1 dot character patterns from 8-bit character codes. See Table 2. Character Generator RAM (CGRAM) In CGRAM, the user can rewrite character by program. For 5 8 dots, eight character patterns can be written, and for 5 1 dots, four character patterns can be written. Write into DDRAM the character code at the addresses shown as the left column of table 1. To show the character patterns stored in CGRAM. PAGE 12 OF 23

Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character patterns Table 1. For 5 8 dot character patterns Character Codes ( DDRAM data ) CGRAM Address Character Patterns ( CGRAM data ) 7 6 5 4 3 2 1 5 4 3 2 1 7 6 5 4 3 2 1 H igh L ow H igh L ow H igh L ow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Character pattern( 1 ) Cursor pattern Character pattern( 2 ) Cursor pattern 1 1 1 For 5 1 dot character patterns Character Codes ( DDRAM data ) 1 1 1 1 1 1 1 1 1 1 1 CGRAM Address Character Patterns ( CGRAM data ) 7 6 5 4 3 2 1 H igh L ow H igh 5 4 3 2 1 L ow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 7 6 5 4 3 2 1 H igh L ow Character pattern Cursor pattern : " H igh " 1 1 1 1 PAGE 13 OF 23

11. Character Generator ROM Pattern Table.2 PAGE 14 OF 23

PAGE 15 OF 23

12. Instruction Table Instruction Instruction Code RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB Description Execution time (fosc=27khz) Clear Display 1 Write H to DDRAM and set DDRAM address to H from AC 1.53ms Set DDRAM address to H from Return Home 1 - AC and return cursor to its original position if shifted. The contents of 1.53ms DDRAM are not changed. Entry Mode Set 1 I/D SH Assign cursor moving direction and enable the shift of entire display. 39ìs Display ON/OFF Control 1 D C B Set display (D), cursor (C), and blinking of cursor (B) on/off control bit. 39ìs Cursor or Display Shift 1 S/C R/L - - Set cursor moving and display shift control bit, and the direction, without changing of DDRAM data. 39ìs Set interface data length Function Set 1 DL N F - - (DL:8-bit/4-bit), numbers of display line (N:2-line/1-line)and, display font 39ìs type (F:5 11 dots/5 8 dots) Set CGRAM Address 1 AC5 AC4 AC3 AC2 AC1 AC Set CGRAM address in address counter. 39ìs Set DDRAM Address 1 AC6 AC5 AC4 AC3 AC2 AC1 AC Set DDRAM address in address counter. 39ìs Read Busy Flag and Address 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC Whether during internal operation or not can be known by reading BF. The contents of address counter can also be read. ìs Write Data to RAM 1 D7 D6 D5 D4 D3 D2 D1 D Write data into internal RAM (DDRAM/CGRAM). 43ìs Read Data from RAM 1 1 D7 D6 D5 D4 D3 D2 D1 D Read data from internal RAM (DDRAM/CGRAM). 43ìs - :don t care PAGE 16 OF 23

13. Timing Characteristics 13.1 Write Operation RS t AS t AH R/W E t Er PW EH t DSW t AH t Ef t H DB to DB7 Valid data t cyce Ta=25, VDD=5.±.5V Item Symbol Min Typ Max Unit Enable cycle time t cyce 12 - - ns Enable pulse width (high level) PW EH 14 - - ns Enable rise/fall time t Er,t Ef - - 25 ns Address set-up time (RS, R/W to E) t AS - - ns Address hold time t AH 1 - - ns Data set-up time t DSW 4 - - ns Data hold time t H 1 - - ns PAGE 17 OF 23

13.2 Read Operation RS t AS t AH R/W E PW EH t Er t DDR t AH t Ef t DHR DB to DB7 VOH1 VOL1 Valid data t cyce VOH1 VOL1 NOTE: VOL1 is assumed to be.8v at 2 MHZ operation. Ta=25, VDD=5.±.5V Item Symbol Min Typ Max Unit Enable cycle time t cyce 12 - - ns Enable pulse width (high level) PW EH 14 - - ns Enable rise/fall time t Er,t Ef - - 25 ns Address set-up time (RS, R/W to E) t AS - - ns Address hold time t AH 1 - - ns Data delay time t DDR - - 1 ns Data hold time t DHR 1 - - ns PAGE 18 OF 23

13.3 Timing Diagram of VDD Against V. Power on sequence shall meet the requirement of Figure 4, the timing diagram of VDD against V. VDD 95% LOGIC SUPPLY VOLTAGE V V 5ms(typical) V LCD SUPPLY VOLTAGE PAGE 19 OF 23

14.Initializing of LCM Power on Wait for more than 4 ms after VDD rises to 4.5 V RS R/W DB7 DB6 DB5 DB4 DB3 1 1 DB2 DB1 DB BF can not be checked before this instruction. Function set RS Wait for more than 39us R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 N F BF can not be checked before this instruction. Function set Wait for more than 39 μs RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB BF can not be checked before this instruction. 1 N F Function set Wait for more than 37us RS R/W DB7 1 DB6 D DB5 C DB4 B DB3 DB2 DB1 DB Display ON/OFF control Wait for more than 37 μs RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 Display Clear Wait for more than 1.53ms RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 I/D SH Entry Mode Set Initialization ends 4-Bit Ineterface PAGE 2 OF 23

Power on Wait for more than 4 ms after VDD rises to 4.5 V RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 1 N F BF can not be checked before this instruction. Function set Wait for more than 39us RS R/WDB7 DB6 DB5 1 DB4 1 DB3 DB2 DB1 DB N F BF can not be checked before this instruction. Function set Wait for more than 37us RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 B C D Display ON/OFF control Wait for more than 37 μs RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 Display Clear Wait for more than 1.53ms RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 I/D S Entry Mode Set Initialization ends 8-Bit Ineterface PAGE 21 OF 23

15.Quality Assurance Screen Cosmetic Criteria Item Defect Judgment Criterion Partition A)Clear Size: d mm Acceptable Qty in active area d.1 Disregard.1<d.2 6.2<d.3 2.3<d 1 Spots Note: Including pin holes and defective dots which must be within one pixel size. B)Unclear Minor Size: d mm Acceptable Qty in active area d.2 Disregard.2<d.5 6.5<d.7 2.7<d Size: d mm Acceptable Qty in active area d.3 Disregard 2 Bubbles in Polarizer.3<d1. 3 Minor 1.<d1.5 1 1.5<d 3 Scratch In accordance with spots cosmetic criteria. When the light reflects on the panel surface, the scratches are Minor not to be remarkable. 4 Allowable Density Above defects should be separated more than 3mm each other. Minor 5 Coloration Not to be noticeable coloration in the viewing area of the LCD panels. Back-light type should be judged with back-light on state only. Minor PAGE 22 OF 23

16.Reliability Content of Reliability Test Environmental Test Test Item Content of Test Test Condition High Temperature storage Low Temperature storage High Temperature Operation Low Temperature Operation High Temperature/ Humidity Storage High Temperature/ Humidity Operation Temperature Cycle Mechanical Test Vibration test Shock test Endurance test applying the high storage temperature for a long time. Endurance test applying the high storage temperature for a long time. Endurance test applying the electric stress (Voltage & Current) and the thermal stress to the element for a long time. Endurance test applying the electric stress under low temperature for a long time. Endurance test applying the high temperature and high humidity storage for a long time. Endurance test applying the electric stress (Voltage & Current) and temperature / humidity stress to the element for a long time. Endurance test applying the low and high temperature cycle. -1 25 6 3min 5min 3min 1 cycle Endurance test applying the vibration during transportation and using. Constructional and mechanical endurance test applying the shock during transportation. 6 96hrs -1 96hrs 5 96hrs 96hrs 6,9%RH 96hrs 5,9%RH 96hrs -1/6 1 cycles 1~22Hz 1.5mmp-p 22~5Hz 1.5G Total.5hrs 5G Half sign wave 11 msedc 3 times of each direction Applicable Standard Supply voltage for logic system=5v. Supply voltage for LCD system =Operating voltage at 25 PAGE 23 OF 23