97 APPENDIX I OVERVIEW OF TCAD SIMULATION TOOL INTRODUCTION TCAD (Technology Computer Aided Design) is a technology that solves the equations representing the manufacturing process of Large Scale Integration (LSI) or transistors, or equations representing the physical / chemical phenomena relevant to electrical conduction. TCAD simulates and predicts characteristics of a transistor or semiconductor circuit and thereby increases the efficiency in designing and development of LSI. In other words, TCAD means a CAD technology that covers the physical/chemical phenomena on the semiconductors. Technology Computer Aided Design (TCAD) can be a powerful tool for reducing the design costs, improving the device design productivity and obtaining better device and technology designs. While the cost of building a state-of-the-art fabrication plant continues to go up, computing the device has become a relatively cheap product, due to M going through an expensive and time-consuming fabrication process, the computer simulations can be used to predict the electrical characteristics of a device design, quickly and cheaply. Process modelling and simulation of the fabrication process, can be predicted so that physical characteristics such as the oxide thickness and the doping distribution can be produced with high precision. Device modelling and simulation can then be used to predict the electrical characteristics of the given device structure in the tool. An important benefit of using TCAD is that it can help in understanding how semiconductor devices work. Assessment of detailed device operation, such as how the energy levels and the carrier (electrons and holes) distribution inside the device varies with the biasing conditions, can provide valuable insights into the relationship between a change in process conditions or device design and the resulting impact on the device performance. These quantities are often difficult to
98 obtain experimentally. In contrast, they are readily available through computer simulations, which directly provide the feedback and the guidance for device design. TCAD is a branch of electronic design automation that models the semiconductor fabrication and the semiconductor device operation. The modelling of the fabrication is termed as the Process TCAD, while the modelling of the device operation is termed as the Device TCAD. Included are the modelling of process steps (such as diffusion and ion implantation), and modelling of the behaviour of the electrical devices based on fundamental physics, such as the doping profiles of the devices. TCAD may also include the creation of compact models (such as the well known SPICE transistor models), which try to capture the electrical behaviour of such devices but do not generally derive them from the underlying physics. TCAD refers to the use of computer simulations to develop and optimize semiconductor processing technologies and devices. The physical models involved in the TCAD is drift diffusion model, velocity saturation model, density gradient model, carrier generation and recombination models, direct tunnelling and hot carrier injection models are used to analyses the physical parameters. Figure A1.1 Hierarchy of technology CAD tools building from the process level to circuits
99 In this work, all the devices are simulated by TCAD tool provided by Synopsys. Synopsys TCAD offers a comprehensive suite of products that includes industry leading process and device simulation tools, as well as a powerful GUIdriven simulation environment for managing simulation tasks and analyzing simulation results. The TCAD process and device simulation tools support a broad range of applications such as CMOS, power, memory, image sensors, solar cells, and analog/rf devices. In addition, Synopsys TCAD provides tools for interconnect modeling and extraction, providing critical parasitic information for optimizing chip performance. Technology computer aided design has become a central part of semiconductor modeling and design. It is important to note that the accurate TCAD simulations and modeling of physical devices depend significantly on calibrated physical models and proper input data. A typical device tool flow the creation of a device structure by a process simulation (Sentaurus Process) followed by remeshing. Sentaurus Device is used to simulate the electrical characteristics of the device. Sentaurus Device simulates numerically the electrical behavior of a single semiconductor device in isolation or several physical devices combined in a circuit. Terminal currents, voltages, and charges are computed based on a set of physical device equations that describes the carrier distribution and the conduction mechanisms. Finally, Tecplot SV is used to visualize the output from the simulation in 2D and 3D, and Inspect is used to plot the electrical characteristics. SENTAURUS PROCESS Sentaurus Process is a complete and highly flexible, multidimensional, process modeling environment. With its modern software architecture, it constitutes a new tool generation and a solid base for process simulation. It is calibrated to a wide range of latest experimental data using proven calibration methodology, Sentaurus process offers unique predictive capabilities for modern silicon and nonsilicon technologies.
100 The main file types used in sentaurus process are: Sentaurus Process command file ( *. cmd) This file is the main input file for Sentaurus process. It contains all the process steps and can be edited. This file is referred to as the command file or input file. Log file ( *. log) This file is generated by sentaurus process during a run. It contains information about each processing step and the models and values of physical parameters used in it. The amount of information written to the log file can be controlled by certain parameters specified in the process command file. Structure file (has no extension) This is the Sentaurus process internal format for saving the simulation. It contains the complete information about the geometry of the device and all datasets. Users can save the simulation in this format at points of interest or at the end of the simulation. TDR boundary file ( *_bnd. tdr) This Synopsys specific format stores the geometry of the device and is usually saved by the user at the end of the simulation. This file is used as input to the meshing engines and can be loaded into tecplot for viewing. TDR grid and doping file ( *_fps. tdr) This single file stores two kind of information. One is the information about the geometry of the device and the grid. The other is information about the distribution of doping and other datasets in the device. A TDR file can be reloaded into Sentaurus process to continue the simulation and can be loaded into tecplot for visualization. SENTAURUS STRUCTURE EDITOR Sentaurus Structure Editor is a structure editor for 2D and 3D device structures. It has three distinct operational nodes: 2D structure editing, 3D structure
101 editing and 3D process emulation. From the graphical user interface (GUI), 2D and 3D device models are created geometrically using 2D or 3D primitives such as rectangles, polygons, cuboids etc. The GUI features a command-line window in which Sentaurus Structure editor prints script commands corresponding to the GUI operations. In the process emulation mode (Procem), Sentaurus Structure Editor translates processing steps such as etching and deposition, patterning, fill and polish into geometric operations. Procem supports various options such as isotropic or anisotropic etching and deposition, rounding and blending. The input and output files of Sentaurus Structure Editor are Scheme script file (. scm) This is a user-defined script file that contains scheme script commands describing the steps to be executed by Sentaurus Structure Editor in creating a device structure. This file can be edited to change its contents. ACIS SAT file (. sat) This file contains the model geometry in native ACIS format and cannot be edited directly. DF-ISE boundary file (. bnd) This is a boundary representation file written in the DF-ISE format. It can be directly loaded into Sentaurus Structure Editor and then to mesh engines. DF-ISE doping and refinement file (. cmd) This is a DF-ISE format file containing doping and mesh refinement information that, in conjunction with the corresponding boundary file, uniquely defines the geometry of the model.
102 SENTAURUS DEVICE The typical tool flow of the device from process to plot is shown in Figure A1.2. Figure A1.2 Typical tool flow with device simulation using Sentaurus Device A real semiconductor device, such as a transistor, is represented in the simulator as l properties are discretized onto a non-uniform nodes. A virtual device is an approximation of a real device. Continuous properties such as doping profiles are represented on a sparse mesh and, therefore, are only defined at a finite number of discrete points in space. The doping at any point between nodes (or any physical quantity calculated by Sentaurus Device) can be obtained by interpolation. Each virtual device structure is described in the Synopsys TCAD tool suite by two files: # The grid (or geometry) file contains a description of the various regions of the device, that is, boundaries, material types, and the locations of any electrical contacts. This file also contains the grid (the locations of all the discrete nodes and their connectivity). # The data (or doping) file contains the properties of the device,such as the doping profiles, in the form of data associated with the discrete nodes. The features of Sentaurus Device are many and varied. They can be summarized as: An extensive set of models for device physics and effects in semiconductor devices (drift-diffusion, thermodynamic, and hydrodynamic models).
103 General support for different device geometries (1D, 2D, 3D,and 2D cylindrical). Mixed-mode support of electro thermal net lists with mesh based device models. INSPECT Inspect is a versatile tool for efficient viewing of XY plots such as doping profiles and I-V curves. Inspect extracts parameters such as junction depth, threshold voltage and saturation currents from the respective XY plot. Users can manipulate curves interactively by using scripts. Inspect features a large set of mathematical functions for curve manipulation such as differentiation, integration and to find min/max. The inspect script language is open to Tcl and therefore inherits all the power and flexibility of Tcl. To start inspect, at the command line type: inspect Parameter extractions are an integral part of device simulation. In this section, scripts for extracting standard electrical parameters based on the result of CMOS and BJT simulations are presented. These scripts can be directly loaded into Inspect and, with appropriate input data, Inspect calculates and reports the results about the required parameters. All the scripts presented here can be downloaded by following the appropriate link at the end of each subsection. To run the script from the command line, use: > inspect -f inspect Script. cmd Where, inspect Script. cmd is the name of the script file. This command opens the Inspect GUI while executing the script.the results from the extraction are sent to the standard output terminal, usually the command window in which the inspect command was invoked. To suppress the display of the Inspect GUI, run the script in batch mode as: > inspect -batch -f inspect Script. cmd The script can also be loaded into and run from an existing Inspect GUI: Script > Run Script. For easier reading of the script, lines are color coded:
104 Gray: Comment. Blue: Standard Inspect code related to loading and plotting the curve. Red: Inspect code specific to the extraction. Green: Lines that may need to be changed before using this script in conjunction with a different data file (for example, to update the data file name). Maximum gm Threshold Voltage: Vtgm # Definition: Threshold voltage defined as the intersection of # the tangent at the maximum conductance (gm) point with the # gate voltage (Vg) axis. # Required input: IdVg curve, simulated with Vd<0 and Vg=0-Vdd. # Output: Vtgm and the IdVg curve if the Inspect GUI is running. # Note: The input file for this script is IdVg_lin_des.plt. Change # it into your own file before running the script. # (The ft_scalar call is needed for the parameter extraction under # Sentaurus Workbench) # Start of the script set ProjectName "IdVg_Vtgm" set CurveName "IdVg" proj_load IdVg_lin_des.plt $ProjectName cv_createds $CurveName "$ProjectName gate OuterVoltage"\ "$ProjectName drain TotalCurrent" y cv_abs $CurveName y cv_setcurveattr $CurveName "IdVg" red solid 2 none 3 defcolor 1 defcolor gr_setaxisattr X {Gate Voltage (V)} 12 {} {} black 1 10 0 5 0 gr_setaxisattr Y {Drain Current (A/um)} 12 {} {} black 1 10 0 5 0 # Get location of maximum transconductance set gm_index [cv_compute\ "veczero(diff(<$curvename>)-vecmax(diff(<$curvename>)))" \ A A A A ]
105 # Create tangent on IdVg curve at max gtm point cv_createwithformula Tangent\ "tangent(<$curvename>,$gm_index )" A A A A # Extract Vt as zero crossing of tangent set Vtgm [cv_compute "vecvalx(<tangent>, 0)" A A A A ] # Write extracted values puts "Vtgm=[format %.3f $Vtgm] V" ft_scalar Vtgm [format %.3f $Vtgm] # End of the script Download the Inspect script and the corresponding data file by right-clicking the respective links and using Save Target As: Vtgm_ins.cmd IdVg_lin_des. TECPLOT Tecplot SV is software for scientific visualization that has been extended by Synopsys to accommodate the special requirements of the Synopsys simulation environment. Tecplot SV can be started at the command prompt without loading any data file: > tecplot_sv Alternatively, Tecplot SV can be launched from within Sentaurus Workbench. To launch Tecplot SV from Sentaurus Workbench: Extensions > Run Tecplot SV. Two types of file can be loaded into Tecplot SV: The first type is the.tdr file, for example, nmos_mdr.tdr.
106 This file is used to describe a device structure, its meshing, and the values of field quantities existing in the corresponding device. Many TCAD tools, including Sentaurus Structure Editor, Mesh, and Sentaurus Device, can read and export these types of file. NOTE: In the DF-ISE format, the files that can be loaded are.grd (for the device structure and its meshing) and.dat (for the value of field quantities). The other type of file is the DF-ISE XY plot file, often with a.plt extension, for example, n1_des.plt. Datasets included in this type of file can be used by Tecplot SV to generate XY plots. To follow this tutorial, right-click the following links and download the respective files using Save Target As: nmos_mdr.tdr n1_des.plt Loading can be performed initially when Tecplot SV is started from the command line or interactively after Tecplot SV has started. To start Tecplot SV and simultaneously load data files for a device, use the following command: > tecplot nmos_mdr.tdr To load data files from an open Tecplot SV interface: File > Load. Creating Plots In Tecplot SV, an XY plot can only be generated after both the x and y axes of the plot have been specified. To generate a plot other than the default: 1. Select a data file from the Datasets area. All the data groups included in the selected file are displayed in the pane under the Datasets area. 2. To show the actual datasets included in each group, click the group name, for example, gate, which expands the datasets included in the group in the pane below the group list. 3. To assign a specific dataset to an axis, select the dataset from the expanded dataset pane and then click one of the two axis buttons (X1, Y1), which are located below the dataset list. Note that under the tool window, the current xaxis variable is
107 displayed. The variable can be modified by clicking the button and selecting the new variable. When the x and y axes of a plot have been specified, Tecplot SV generates, in a frame, a plot corresponding to the selected datasets. In some cases, the generated plot may not display properly because the default range set by Tecplot SV for the axes is too large. An important benefit of using TCAD is that it can help in understanding how semiconductor devices work. Examination of detailed device operation, such as how the energy levels and the carrier (electrons and holes) distribution inside the device varies with the biasing conditions, can provide valuable insight into the relationship between a change in process conditions or device design and the resulting impact on device performance. These quantities are often difficult to obtain experimentally. In contrast, they are readily available through computer simulations, which directly provide feedback and guidance for device design. Moreover simulations provide a guide line to researchers in fabricating new novel devices and improve the yield management.