CS64 Computer Organization Lecture 1 Prof. Heather Zheng (1) Your computer never complains about the # of languages you use.. 1
(2) The same program runs on almost all the computers? 2
How Computer Operates http://www.staff.ncl.ac.uk/roger.broughton/museum/iomedia/pc.htm Levels of Representa5on temp = v[k];! v[k] = v[k+1];! v[k+1] = temp;! High Level Language Program (e.g., C)! Compiler! Assembly Language Program (e.g.,mips)! Assembler! Machine Language Program (MIPS)! lw lw sw sw 0000 1010 1100 0101 1001 1111 0110 1000 1100 0101 1010 0000 $t0, 0($2) $t1, 4($2) $t1, 0($2) $t0, 4($2) 0110 1000 1111 1001 1010 0000 0101 1100 1111 1001 1000 0110 0101 1100 0000 1010 1000 0110 1001 1111! Machine Interpretation! Hardware Architecture Description (Logic, Logisim, etc.)! Architecture Implementation! Logic Circuit Description (Logisim, etc.)! 3
Levels of Representa5on High Level Language Program (e.g., C)! Compiler! Assembly Language Program (e.g.,mips)! Assembler! Machine Language Program (MIPS)! Machine Interpretation! Hardware Architecture Description (Logic, Logisim, etc.)! Architecture Implementation! Logic Circuit Description (Logisim, etc.)! temp = v[k];! v[k] = v[k+1];! v[k+1] = temp;! lw $t0, 0($2) lw $t1, 4($2) sw $t1, 0($2) sw $t0, 4($2) 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111! Abstrac5ons Software! Hardware! Application (ex: browser)! Compiler! Assembler! Operating! System! (Mac OSX)! Processor! Memory! I/O system! Datapath & Control! Digital Design! Circuit Design! transistors! Instruction Set! Architecture (ISA)! * Coordina5on across many levels (layers) of abstrac0on * ISA can free hardware/so9ware from each other 4
Levels of Representa5on High Level Language Program (e.g., C)! Compiler! Assembly Language Program (e.g.,mips)! Assembler! Machine Language Program (MIPS)! Machine Interpretation! Hardware Architecture Description (Logic, Logisim, etc.)! temp = v[k];! v[k] = v[k+1];! v[k+1] = temp;! lw $t0, 0($2) lw $t1, 4($2) sw $t1, 0($2) sw $t0, 4($2) 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111! Assembly programming Architecture Implementation! Logic Circuit Description (Logisim, etc.)! Digital logic design Linking SoAware & Hardware software Assembly programming Digital logic design hardware 5
WHY DO I CARE? From a Programmer s Perspec5ve Most people learn to program in a high level language (e.g. Java, C++, etc.) Abstracts hardware to reduce programming complexity Difficult or impossible to do some programming tasks efficiently Lower- level languages needed for low- level programming Lower- level means more control and flexibility Improve Your SoIware s Efficiency and Speed 6
From a Hardware Designer s Perspec5ve Understand the interac5on between hardware and soaware Build a proper goal of hardware design Improve Your Hardware s Performance Avoid Unnecessary Complexity à Reduce Cost Lecture Schedule 7
General Class Info When, where and who Lecture: TTh 11-12:15pm, SH 1430 Discussion (required): Friday, 12-12:50 (SH1609), 1-1:50 (LSB 1101) Website: hpp://www.cs.ucsb.edu/~htzheng/teach/cs64s11 Professor: Heather Zheng, htzheng@cs.ucsb.edu TA: Gang Wang (gangw@cs.ucsb.edu), Wendy Chun (wendy_chun@umail.ucsb.edu) Office Hours: Prof. Zheng: TBD (HFH 1121) TA: TBD General Class Info (2) Prerequisites Engineering 3 or CS 5AA- ZZ or 16; and, Mathema5cs 3C Not open if you have received credit for ECE 15B or 15 Textbooks R - - Charles H. Roth, Jr. and Larry Kinney, Fundamentals of Logic Design, 6th Edi5on B - - Robert L. Brijon: MIPS Assembly Language Programming Class handouts 8
Grading Policy Grading Homework : 20% Lab : 25% Quiz: 10% (5-7) Randomly scheduled throughout the quarter Simple ques5ons, no ajendance = 0 Midterm: 20% Final: 25% Academic conduct Verbal discussion of homework assignments is fine No sharing of wrijen assignments or lab assignments Chea5ng will not be tolerated! And will be treated seriously and punished harshly Homework and Lab Homework 3-5 total No late HW submissions accepted Labs 3-4 Use PCSPIM to do assembly programming Mul5- level logic design Sugges5on: start early One- 5me 2- day extension coupon 9
Discussion group Google Group (CS64S11) as the discussion forum / mailing list hjp://groups.google.com/group/cs64s11 I will mass add everyone using your umail account Before April 1, email gangw@cs.ucsb.edu With your name and preferred email account so that we will add you to the group History and Basic Concepts INTRODUCTION TO COMPUTER SYSTEMS 10
History of Computer Abacus C. 3000 B.C. Transistors - 1947 IBM PC - 1981 Apple II -- 1977 11
Moore s Law 2X transistors/chip per 1.5-2 years http://www.guarddawg.net/guarddawg/mooreslaw.jpg The Rate of Technology Advance 2X every 2.0 years in memory size; every 1.5 years in processor speed; every 1.0 year in disk capacity; Moore s Law enables processor 2X transistors/chip per 1.5 years 12
COMPUTER BASICS 5 components of any Computer Computer! Processor!! Control! ( brain )! Datapath! ( brawn )! Memory!!! (where! programs,! data! live when! running)! Devices! Input! Output! Hello World! Keyboard, Mouse! Disk (where! programs,! data! live when! not running)! Display, Printer! 13
Opening up a computer box Can you find the 5 classic components? I/O Mouse, Keyboard, Monitor, Printer.. Memory ROM, RAM, DRAM, Cache Hard disk, FLASH Processor- Motherboard CPU Basic job of a CPU: execute lots of instruc5ons. HOW DO WE COMMAND A CPU? 14
Instruc5ons Language of the Machine Arithme5c such as add and subtract Logic instruc5ons such as and, or, and not Data instruc5ons such as move, load, and store Control flow instruc5ons such as goto, if... goto, More restricted - Different CPUs implement different sets of instruc5ons. The set of instruc5ons a par5cular CPU implements is an Instruc5on Set Architecture (ISA). Examples: Intel 80x86 (Pen5um 4), IBM/Motorola PowerPC (Macintosh), MIPS ( Nintendo, Silicon Graphics, Sony), Intel IA64,... Instruc5on Set Architectures(1/2) Describes the aspects of a computer architecture visible to a programmer The na5ve datatypes, instruc5ons, registers, addressing modes, memory architecture, interrupt and excep5on handling, and external I/O (if any). ISA is dis5nguished from the microarchitecture, which is the set of processor design techniques used to implement the instruc5on set. Computers with different microarchitecture can share a common instruc5on set. For example, the Intel Pen5um and the AMD Athlon implement nearly iden5cal versions of the x86 instruc5on set, but have radically different internal design 15
Instruc5on Set Architectures(2/2) Early trend was to add more instruc5ons to new CPUs to do elaborate opera5ons VAX architecture had an instruc5on to mul5ply polynomials! Complex Instruc5on Set Compu5ng (CISC) RISC philosophy (Cocke IBM, Pajerson, Hennessy, 1980s) Reduced Instruc5on Set Compu5ng (RISC) Keep the instruc5on set small and simple, makes it easier to build fast hardware. Let soaware do complicated opera5ons by composing simpler ones. Simpler is Faster! MIPS Architecture MIPS semiconductor company that built one of the first commercial RISC architectures Nintendo 64, playsta5on, PL2, PSP, HP printers, Cisco routers, use MIPS processors. Why MIPS instead of Intel 80x86? MIPS is simple, elegant. Don t want to get bogged down in grijy details. MIPS widely used in embedded apps, x86 lijle used in embedded, and more embedded computers than PCs By the late 1990s it was es5mated that one in three RISC chips produced were MIPS- based designs. 16
MIPS Programming and Emula5on MIPS assembly language = MIPS instruc5ons A freely available "MIPS R2000/R3000 Simulator" called SPIM UNIX or GNU/Linux; Mac OS X; MS Windows 95, 98, NT, 2000, XP; and DOS) Good for learning MIPS assembly language programming and the general concepts of RISC- assembly language programming Informa5on PLEASE READ! hjp://www.cs.wisc.edu/~larus/spim.html We will be using PCSPIM to do projects 17
TODO: Tutorial on PCSPIM Read hjp://www.cs.wisc.edu/~larus/spim.html Especially hjp://www.cs.wisc.edu/~larus/pcspim.pdf Highly recommended tutorial videos h5p://users.ece.gatech.edu/~sudha/2030/temp/ spim/spim- tutorial.html Install and Get to know PCSPIM PCSPIM 18