Computer Organization - Overview

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Transcription:

Computer Organization - Overview Hyunyoung Lee CSCE 312 1

Course Overview Topics: Theme Five great realities of computer systems Computer system overview Summary NOTE: Most slides are from the textbook and the coauthor Randal E Bryant of Carnegie Mellon University CSCE 312 2

Course Theme Abstraction is good, but don t forget reality! Courses to date emphasize abstraction Abstract data types Asymptotic analysis These abstractions have limits Especially in the presence of bugs Need to understand details of underlying implementations Useful outcomes Become more effective programmers Able to find and eliminate bugs efficiently Able to tune program performance Prepare for later systems classes in CSE & ECE Compilers, Operating Systems, Networks, Computer Architecture, Embedded Systems CSCE 312 3

Great Reality #1 Int s are not Integers, Float s are not Reals Examples Is x 2 0? Float s: Yes! Int s: 40000 * 40000 --> 1600000000 50000 * 50000 -->?? Is (x + y) + z = x + (y + z)? Unsigned & Signed Int s: Yes! Float s: (1e20 + -1e20) + 3.14 --> 3.14 1e20 + (-1e20 + 3.14) -->?? CSCE 312 4

A bit more on floating-point numbers Approximation in the representation yields rounding errors imprecision in calculation of an operation Floating point addition is not associative Example: (0.1+0.2)+0.3 0.1+(0.2+0.3) The multiplicative inverse may not exist Example: a = 3.00x10 0 ; then 1/a is 3.33x10-1 so, ax(1/a) is 9.99x10-1 CSCE 312 5

Computer Arithmetic Does not generate random values Arithmetic operations have important mathematical properties Cannot assume usual properties Due to finiteness of representations Integer operations satisfy ring properties Commutativity, associativity, distributivity Floating point operations satisfy ordering properties Monotonicity, values of signs Observation Need to understand which abstractions apply in which contexts Important issues for compiler writers and serious application programmers Entire courses offered on computer arithmetic (ECEN 653) CSCE 312 5

Great Reality #2 You ve got to know assembly Chances are, you ll never write a program in assembly Compilers are much better & more patient than humans Understanding assembly is key to understanding machine-level execution model Behavior of programs in presence of bugs High-level language models break down Tuning program performance Understanding sources of program inefficiency Implementing system software Compiler has machine code as target Operating systems must manage process state CSCE 312 6

Assembly Code Example Time Stamp Counter Special 64-bit register in Intel-compatible machines Incremented every clock cycle Read with rdtsc instruction Application Measure time (in clock cycles) required by a procedure P double t; start_counter(); P(); t = get_counter(); printf("p required %f clock cycles\n", t); CSCE 312 7

Code to Read Counter (1) Write small amount of assembly code using GCC s asm facility Inserts assembly code into machine code generated by compiler static unsigned cyc_hi = 0; static unsigned cyc_lo = 0; /* Set *hi and *lo to the high and low order bits of the cycle counter. */ void access_counter(unsigned *hi, unsigned *lo) { asm("rdtsc; movl %%edx,%0; movl %%eax,%1" : "=r" (*hi), "=r" (*lo) : : "%edx", "%eax"); } CSCE 312 8

Code to Read Counter (2) /* Record the current value of the cycle counter. */ void start_counter() { access_counter(&cyc_hi, &cyc_lo); } /* Number of cycles since the last call to start_counter. */ double get_counter() { unsigned ncyc_hi, ncyc_lo; unsigned hi, lo, borrow; /* Get cycle counter */ access_counter(&ncyc_hi, &ncyc_lo); /* Do double precision subtraction */ lo = ncyc_lo - cyc_lo; borrow = lo > ncyc_lo; hi = ncyc_hi - cyc_hi - borrow; return (double) hi * (1 << 30) * 4 + lo; } CSCE 312 9

Great Reality #3 Memory Matters Memory is not unbounded It must be allocated and managed Many applications are memory dominated Memory referencing bugs especially pernicious Effects are distant in both time and space Memory performance is not uniform Cache and virtual memory effects can greatly affect program performance Adapting program to characteristics of memory system can lead to major speed improvements CSCE 312 10

Memory Referencing Errors C and C++ do not provide any memory protection Out of bounds array references Invalid pointer values Abuses of malloc/free Can lead to nasty bugs Whether or not bug has any effect depends on system and compiler Action at a distance Corrupted object logically unrelated to one being accessed Effect of bug may be first observed long after it is generated How can I deal with this? Program in Java, Ruby, Lisp, or ML Understand what possible interactions may occur Use or develop tools to detect referencing errors Use debugged library routines CSCE 312 11

Memory Performance Example Implementations of Matrix Multiplication Multiple ways to nest loops /* ijk */ for (i=0; i<n; i++) { for (j=0; j<n; j++) { sum = 0.0; for (k=0; k<n; k++) sum += a[i][k] * b[k][j]; c[i][j] = sum; } } /* jik */ for (j=0; j<n; j++) { for (i=0; i<n; i++) { sum = 0.0; for (k=0; k<n; k++) sum += a[i][k] * b[k][j]; c[i][j] = sum } } CSCE 312 12

Matmult Performance (Alpha 21164) Too big for L1 Cache Too big for L2 Cache 160 140 120 100 80 60 ijk ikj jik jki kij kji 40 20 0 matrix size (n) CSCE 312 13

Blocked matmult Performance (Alpha 21164) 160 140 120 100 80 60 bijk bikj ijk ikj 40 20 0 50 75 100 125 150 175 200 225 250 275 300 325 350 375 400 425 450 475 500 matrix size (n) CSCE 312 14

Great Reality #4 There s more to performance than asymptotic complexity Constant factors matter too! Easily see 10:1 performance range depending on how code written Must optimize at multiple levels: algorithm, data representations, procedures, and loops Must understand system to optimize performance How programs compiled and executed How to measure program performance and identify bottlenecks How to improve performance without destroying code modularity and generality CSCE 312 15

Great Reality #5 Computers do more than execute programs They need to get data in and out I/O system critical to program reliability and performance They communicate with each other over networks Many system-level issues arise in presence of network Concurrent operations by autonomous processes Coping with unreliable media Cross platform compatibility Complex performance issues CSCE 312 16

Course Perspective Most Systems Courses are Builder-Centric Computer Architecture Design pipelined processor in Verilog Operating Systems Implement large portions of operating system Compilers Write compiler for simple language Networking Implement and simulate network protocols CSCE 312 17

Course Perspective (Cont.) Our Course is Programmer-Centric Purpose is to show how by knowing more about the underlying system, one can be more effective as a programmer Enable you to Write programs that are more reliable and efficient Incorporate features that require hooks into OS E.g., concurrency, signal handlers Not just a course for dedicated hackers We bring out the hidden hacker in everyone Cover material in this course that you won t see elsewhere CSCE 312 18

Hardware Component and Organization CPU Register file PC ALU System bus Memory bus Bus interface I/O bridge Main memory I/O bus USB controller Graphics adapter Disk controller Mouse Keyboard Display Disk Expansion slots for other devices such as network adapters hello executable stored on disk CSCE 312 19

Memory Hierarchy Smaller, faster, and costlier (per byte) storage devices Larger, slower, and cheaper (per byte) storage devices L5: L4: L3: L2: L1: L0: Registers On-chip L1 cache (SRAM) Off-chip L2 cache (SRAM) Main memory (DRAM) Local secondary storage (local disks) CPU registers hold words retrieved from cache memory. Remote secondary storage (distributed file systems, Web servers) L1 cache holds cache lines retrieved from the L2 cache. L2 cache holds cache lines retrieved from memory. Main memory holds disk blocks retrieved from local disks. Local disks hold files retrieved from disks on remote network servers. CSCE 312 20

Cache Memory CPU chip Register file L1 cache (SRAM) ALU Cache bus System bus Memory bus L2 cache (SRAM) Bus interface Memory bridge Main memory (DRAM) CSCE 312 21

OS abstracts HW Application programs Operating system Processor Main memory I/O devices Software Hardware Processes Virtual memory Files Processor Main memory I/O devices CSCE 312 22

Summary The computer system is more than just hardware! We need to understand both the hardware and system interfaces to properly use a computer. We shall focus on more details to such concepts through out this course. CSCE 312 23