CSC 203 1.5 Computer System Architecture Department of Statistics and Computer Science University of Sri Jayewardenepura
Instruction Set Architecture (ISA) Level 2
Introduction 3
Instruction Set Architecture Positioned between microarchitecture level and operating system level Important to system architects interface between software and hardware 4
Instruction Set Architecture 5
ISA contd.. General approach of system designers: Build programs in high-level languages Translate to ISA level Build hardware that executes ISA level programs directly Key challenge: Build better machines subject to backward compatibility constraint 6
Features off a good ISA Define a set of instructions that can be implemented efficiently in current and future technologies resulting in cost effective designs over several generations Provide a clean target for compiled code 7
Properties off ISA level ISA level code is what a compiler outputs To produce ISA code, compiler writer has to know What the memory model is What registers are there What data types and instructions are available 8
ISA level memory models Computers divide memory into cells (8 bits) that have consecutive addresses Bytes are grouped into words (4-, 8-byte) with instructions available for manipulating entire words Many architectures require words to be aligned on their natural boundaries Memories operate more efficiently that way 9
ISA level Memory Models On Pentium II (fetches 8 bytes at a time from memory), ISA programs can make memory references to words starting at any address Requires extra logic circuits on the chip Intel allows it cause of backward compatibility constraint (8088 programs made non-aligned memory references) 10
ISA level registers Main function of ISA level registers: provide rapid access to heavily used data Registers are divided into 2 categories special purpose registers (program counter, stack pointer) General purpose registers (hold key local variables, intermediate results of calculations). These are interchangeable 11
Instructions Main feature of ISA level is its set of machine instructions They control what the machine can do Ex: LOAD and STORE instructions move data between memory and registers MOVE instruction copies data among registers 12
Pentium II ISA level (Intel s IA-32) Maintains full support for execution of programs written for 8086, 8088 processors (16-bit) Pentium II has 3 operating modes (Real mode, Virtual 8086 mode, Protected mode) Address Add space: memory is divided into 16,384 segments, each going from address 0 to address 2 32-1 (Windows supports only one segment) Every byte has its own address, with words being 32 bits long Words are stored in Little endian format (low-order byte has lowest address) 13
Little endian and Big endian format 14
Pentium II s primary registers 15
Pentium II s primary registers EAX: Main arithmetic registers, 32-bit 16-bit register in low-order 16 bits 8-bit register in low-order 8 bits easy to manipulate 16-bit (in 80286) and 8-bit (in 8088) quantities EBX: holds pointers ECX: used in looping EDX: used for multiplication and division, where together with EAX, it holds 64-bit products and dividends 16
Pentium II s primary registers ESI,ESI EDI: holds pointers into memory Especially for hardware string manipulation instructions (ESI points to source string, EDI points to destination string) EBP: pointer register ESP: stack pointer CS through GS: segment registers EIP: program counter EFLAGS: flag register (holds various miscellaneous bits such as conditional codes) 17
Pentium II data Types 18
Instruction Formats An instruction consists of an opcode, plus additional information such as where operands come from, where results go to Opcode tells what instruction does On some machines, all instructions have same length Advantages: simple, easy to decode Disadvantages: waste space 19
Common Instruction Formats (a) Zero address instruction (b) One address instruction (c) Two address instruction (d) Three address instruction 20
Instruction and Word length Relationships 21
Example An Instruction with 4bit Opcode and Three 4bit address 22
Design of Instruction Formats Factors: Length of instruction short instructions are better than long instructions (modern processors can execute multiple instructions per clock cycle) Sufficient room in the instruction format to express all operations required No. of bits in an address field 23
Intel 64 and IA-32 Architectures Intel 64 and IA-32 instructions General purpose x87 FPU x87 FPU and SIMD state management Intel MMX technology SSE extensions SSE2 extensions SSE3 extensions SSSE3 extensions SSE4 extensions AESNI and PCLMULQDQ Intel AVX extensions F16C, RDRAND, FS/GS base access System instructions IA-32e mode: 64-bit mode instructions VMX instructions SMX instructions 24