Analog, Digital Signals; Computer Structure

Similar documents
Functional Units of a Modern Computer

CS 31: Intro to Systems Digital Logic. Kevin Webb Swarthmore College February 2, 2016

Sender Receiver Sender

1 Digital tools. 1.1 Introduction

CS 31: Intro to Systems Digital Logic. Kevin Webb Swarthmore College February 3, 2015

Picture of memory. Word FFFFFFFD FFFFFFFE FFFFFFFF

Hardware Design with VHDL PLDs IV ECE 443

Electricity: Voltage. Gate: A signal enters the gate at a certain voltage. The gate performs operations on it, and sends it out was a new signal.

The Memory Component

Logic, Words, and Integers

6.1 Combinational Circuits. George Boole ( ) Claude Shannon ( )

10/24/2016. Let s Name Some Groups of Bits. ECE 120: Introduction to Computing. We Just Need a Few More. You Want to Use What as Names?!

CS 101, Mock Computer Architecture

Machine Architecture. or what s in the box? Lectures 2 & 3. Prof Leslie Smith. ITNP23 - Autumn 2014 Lectures 2&3, Slide 1

EEM336 Microprocessors I. I/O Interface

Copyright 2012, Elsevier Inc. All rights reserved.

The Concept of Sample Rate. Digitized amplitude and time

Computer Architecture Review. ICS332 - Spring 2016 Operating Systems

Data Transmission Definition Data Transmission Analog Transmission Digital Transmission

Introduction to Computer Systems and Operating Systems

Boolean Algebra & Digital Logic

2/15/2008. Announcements. Programming. Instruction Execution Engines. Following Instructions. Instruction Execution Engines. Anatomy of a Computer

Id Question Microprocessor is the example of architecture. A Princeton B Von Neumann C Rockwell D Harvard Answer A Marks 1 Unit 1

Microprocessors and Microcontrollers (EE-231)

CPS311 Lecture: CPU Implementation: The Register Transfer Level, the Register Set, Data Paths, and the ALU

EECS Components and Design Techniques for Digital Systems. Lec 07 PLAs and FSMs 9/ Big Idea: boolean functions <> gates.

Computer Systems. Binary Representation. Binary Representation. Logical Computation: Boolean Algebra

1. Draw general diagram of computer showing different logical components (3)

6.1 Combinational Circuits. George Boole ( ) Claude Shannon ( )

Today: I/O Systems. Architecture of I/O Systems

Chapter 3 - Top Level View of Computer Function

Computer Architecture A Quantitative Approach, Fifth Edition. Chapter 2. Memory Hierarchy Design. Copyright 2012, Elsevier Inc. All rights reserved.

LECTURE 5: MEMORY HIERARCHY DESIGN

Adapted from David Patterson s slides on graduate computer architecture

CS311 Lecture: CPU Implementation: The Register Transfer Level, the Register Set, Data Paths, and the ALU

CMPSCI 145 MIDTERM #1 Solution Key. SPRING 2017 March 3, 2017 Professor William T. Verts

Dec Hex Bin ORG ; ZERO. Introduction To Computing

Serial Port Complete

Topic 18: Virtual Memory

Microcomputers. Outline. Number Systems and Digital Logic Review

output devices. connected to the controller. data communications link. relay systems. user program. MECH1500Quiz1ReviewVersion2 Name: Class: Date:

Chapter 9: A Closer Look at System Hardware

Chapter 9: A Closer Look at System Hardware 4

CS24: INTRODUCTION TO COMPUTING SYSTEMS. Spring 2017 Lecture 13

INTRODUCTION TO COMPUTERS

MULTIPLE OPERAND ADDITION. Multioperand Addition

Copyright 2012, Elsevier Inc. All rights reserved.

Computer Architecture. A Quantitative Approach, Fifth Edition. Chapter 2. Memory Hierarchy Design. Copyright 2012, Elsevier Inc. All rights reserved.

Lab 4: Digital Electronics BMEn 2151 Introductory Medical Device Prototyping Prof. Steven S. Saliterman

Level 2: The Hardware World Chapters 4 and 5 (topics of other cs courses)

Knowledge Organiser. Computing. Year 10 Term 1 Hardware

Overview. Memory Classification Read-Only Memory (ROM) Random Access Memory (RAM) Functional Behavior of RAM. Implementing Static RAM

WYSE Academic Challenge Computer Fundamentals Test (State Finals)

Segment 1A. Introduction to Microcomputer and Microprocessor

COMP3221: Microprocessors and. and Embedded Systems. Overview. Lecture 23: Memory Systems (I)

Data Acquisition Card or DMM: Which is Right for Your Application? By John Tucker and Joel Roop Keithley Instruments, Inc.

Digital Design Laboratory Lecture 6 I/O

CSC 121 Computers and Scientific Thinking

Module 1. Introduction. Version 2 EE IIT, Kharagpur 1

1. Define Peripherals. Explain I/O Bus and Interface Modules. Peripherals: Input-output device attached to the computer are also called peripherals.

PC Based Logic Analyzer. Project Proposal

LAB #1 BASIC DIGITAL CIRCUIT

(Refer Slide Time 00:01:09)

Lecture Objectives. Introduction to Computing Chapter 0. Topics. Numbering Systems 04/09/2017

ECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010

Vector and Parallel Processors. Amdahl's Law

Functional Programming in Hardware Design

Lab 16: Tri-State Busses and Memory U.C. Davis Physics 116B Note: We may use a more modern RAM chip. Pinouts, etc. will be provided.

5 Computer Organization

COMPUTER ORGANIZATION AND ARCHITECTURE

Principles of Operating Systems CS 446/646

Transistor: Digital Building Blocks

Performance evaluation. Performance evaluation. CS/COE0447: Computer Organization. It s an everyday process

CSCE 312 Lab manual. Instructor: Dr. Ki HwanYum. Prepared by. Dr. Rabi Mahapatra. Suneil Mohan & Amitava Biswas. Fall 2016

ECSE-2610 Computer Components & Operations (COCO)

Reduced Instruction Set Computer

UCB CS61C : Machine Structures

Chapter 5 12/2/2013. Objectives. Computer Systems Organization. Objectives. Objectives (continued) Introduction. INVITATION TO Computer Science 1

THE MICROCOMPUTER SYSTEM CHAPTER - 2

CPE300: Digital System Architecture and Design

Announcements. Announcements. Announcements. Announcements. Announcements. Copyright. Chapter 9 for today Guest speaker on Monday

OS - Introduction Ezio Bartocci Institute for Computer Engineering

Module 11: I/O Systems

What is This Course About? CS 356 Unit 0. Today's Digital Environment. Why is System Knowledge Important?

1.3 Data processing; data storage; data movement; and control.

Lecture-65 SERIAL DATA COMMMUNICATION The data bus of a microcomputer system is designed to transfer data to and from I/O device in parallel - all

EI338: Computer Systems and Engineering (Computer Architecture & Operating Systems)

Contents Slide Set 9. Final Notes on Textbook Chapter 7. Outline of Slide Set 9. More about skipped sections in Chapter 7. Outline of Slide Set 9

Logic and Computer Design Fundamentals. Chapter 2 Combinational Logic Circuits. Part 3 Additional Gates and Circuits

Parallel Data Transfer. Suppose you need to transfer data from one HCS12 to another. How can you do this?

CHETTINAD COLLEGE OF ENGINEERING AND TECHNOLOGY COMPUTER ARCHITECURE- III YEAR EEE-6 TH SEMESTER 16 MARKS QUESTION BANK UNIT-1

Chapter 3. Top Level View of Computer Function and Interconnection. Yonsei University

ENCM 369 Winter 2019 Lab 6 for the Week of February 25

MEHRAN UNIVERSITY OF ENGINEERING AND TECHNOLOGY, JAMSHORO. FIRST TERM FIRST YEAR (1 ST TERM) B.E.(ELECTRICAL) REGULAR EXAMINATION 2009 OF 09-BATCH.

Date Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 11. Introduction to Verilog II Sequential Circuits

COSC 6385 Computer Architecture - Memory Hierarchies (III)

Computer Science and Software Engineering University of Wisconsin - Platteville 9-Software Testing, Verification and Validation

Chapter 4 The Components of the System Unit

Outline. Operating Systems: Devices and I/O p. 1/18

INTELLIGENT LOAD SWITCHING HELPS IMPLEMENT RELIABLE HOT SWAP SYSTEMS

Transcription:

Analog, Digital Signals; Computer Structure David M. Auslander Mechanical Engineering University of California at Berkeley Copyright 2007, D.M.Auslander

Signal Impedance Relationship of current and voltage at a terminal (port) Recall, Power = current * voltage (properly defined) Copyright 2007, D.M.Auslander 2

Output, Input Impedance Output impedance (static) Change in voltage associate with a load that draws current Input impedance (static) Equivalent resistance looking into terminals of a device Maximize power by matching impedance Minimize power by mismatching impedance Copyright 2007, D.M.Auslander 3

Impedance in Measurement and Measurement Actuation Minimize insertion loss High output impedance to draw minimum power Amplifier with very high input impedance provides isolation Actuation Maximize power to load Power amplifier with very low output impedance Copyright 2007, D.M.Auslander 4

Signal Variables Voltage or current Voltage more common for labs because it is easier to measure and work with Current more common indistrially because it rejects noise better Can be raw or modulated Information associated with instantaneous value or with some property of the signal (eg, frequency) Copyright 2007, D.M.Auslander 5

Information Content How many decisions can be made from this signal? Information theory (Claude Shannon) Closely related to entropy, 2 nd law of thermodynamics Common measure: bits One bit one decision Number of decisions = 2^n; n is number of bits Copyright 2007, D.M.Auslander 6

Analog Signals Information is signal variable value Resolution depends only on system quality Mainly noise, but also type of recording equipment, etc. Information content is theoretically infinite Actual information content is probabilistic Copyright 2007, D.M.Auslander 7

Digital Signals One wire, one bit Signal decision MUCH wider than noise Nominal, eg, 0 volt and 5 volt Buffer zone to avoid ambiguity Device ( gate ) output s are guaranteed to be far away from ambiguous range for device inputs Example Copyright 2007, D.M.Auslander 8

TTL Signal Buffer Zones (Approximate) buffer zones so devices can never(!) confuse high and low (or 1 and 0) Output for high > 3.5 volts Input interprets high as > 2.5 volts => 1 volt buffer Output for low < 1.5 volts Input interprets low as < 0.7 volts => 0.8 volt buffer Between these values is undefined Copyright 2007, D.M.Auslander 9

(Nearly) Noise Free Operation These buffers are big enough so that signals can be propagated with no noise at all. Many wires are needed to get a signal with significant information content In addition to digital signal buffer, error detection and correction information can be added to a signal Example: parity bit Copyright 2007, D.M.Auslander 10

Synchronous Circuits Digital (binary) information gives noise-free values Large circuits have timing issues Based on how long it takes signals to propagate from one place in the circuit to another Using a clock eliminates that error source as well All subcircuits must settle before next tick of clock Copyright 2007, D.M.Auslander 11

Computers Based on digital logic and synchronous circuits Use error detection and correction internally Intrinsic error rate is so low we are willing to bet our lives on them! Software bugs way more common than operating errors Copyright 2007, D.M.Auslander 12

Computer Operating Principles The Nickel Tour! Data collections of binary signals Data items coded according to a variety of conventions Integers (signed or unsigned), floats, characters, etc. Instructions tell computer what to do Central Processing Unit (CPU) Registers hold data Processors operate on data in registers Copyright 2007, D.M.Auslander 13

Memory Technically, a separate memory is not needed A register (see CPU) is memory Register circuitry, however, is very expensive (and very fast) Memory is much slower, much bigger, and much cheaper Memory contains a mix of instructions and data Copyright 2007, D.M.Auslander 14

Address Space The memory uses addresses to identify specific data Addresses used in programs translate into electrical signals that operate the memory Logical addresses (in programs) can correspond directly to physical addresses (in memory) or can be mapped by access circuits Copyright 2007, D.M.Auslander 15

How It Works Instruction unit activity CPU gets instruction from memory (stores it in a register) and figures out what to do Gets data from memory if necessary Operates on data in registers Returns result(s) to registers Writes data to memory if necessary Copyright 2007, D.M.Auslander 16

Sequential Device Computing is thus entirely sequential One instruction at a time Instructions are quite primitive High level languages retain sequential nature (Java, etc.) line-at-a-time Copyright 2007, D.M.Auslander 17

Timing This activity is synchronized by the system clock A clock is a circuit that provides a constant frequency square-wave output Instruction takes one or more ticks (cycles) to complete Typical desktop (2007) has ~1-3 GHz clock, so instruction completes in a modest number of nanoseconds Copyright 2007, D.M.Auslander 18

Speed of Embedded Processors Embedded applications have a much wider range Economics drives computing power (and how much can be accomplished) Speeds can be as much as 1000 Xs slower! Copyright 2007, D.M.Auslander 19

Connecting the Computer to the Outside World Peripheral devices printers, disk drives, keyboard, display, control I/O, etc. These are MUCH slower than the computer Separate facilities (hardware) are used to connect them They use an address space sometimes common with memory, sometimes separate Copyright 2007, D.M.Auslander 20

Real Computers This is a simplified model (corresponds to early computers) Computers use many tricks to speed up operation Cache, pipelines, multiple data paths, etc. General principles remain the same (and have been for half a century!) Copyright 2007, D.M.Auslander 21

What Makes it Work? Almost error free, regardless of scale! This is accomplished by Discrete data representation (bits) Discrete time (clock synchronized) Minimize size to reduce power, increase speed Flexibility: intermix data of various codings and instructions in memory Copyright 2007, D.M.Auslander 22