GM8126 EVB. User Guide Rev.: 1.1 Issue Date: July 2011

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Transcription:

GM8126 EVB User Guide Rev.: 1.1 Issue Date: July 2011

REVISION HISTORY Date Rev. From To Feb. 2011 1.0 - Original Jul. 2011 1.1 - Modified Section 3.1 Copyright 2011 Grain Media, Inc. All Rights Reserved. Printed in Taiwan 2011 Grain Media and the Grain Media Logo are trademarks of Grain Media, Inc. in Taiwan and/or other countries. Other company, product and service names may be trademarks or service marks of others. All information contained in this document is subject to change without notice. The products described in this document are NOT intended for use in implantation or other life support application where malfunction may result in injury or death to persons. The information contained in this document does not affect or change Grain Media s product specification or warranties. Nothing in this document shall operate as an express or implied license or indemnity under the intellectual property rights of Grain Media or third parties. All information contained in this document was obtained in specific environments, and is presented as an illustration. The results obtained in other operating environments may vary. THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED ON AN AS IS BASIS. In no event will Grain Media be liable for damages arising directly or indirectly from any use of the information contained in this document. Grain Media, Inc. 5F, No. 5, Li-Hsin Road III, Hsinchu Science Park, Hsinchu City, Taiwan 300, R.O.C. Grain Media's home page can be found at: http://

TABLE OF CONTENTS Chapter 1 Introduction... 1 1.1 Overview... 2 1.2 Features... 6 Chapter 2 System Hardware... 7 2.1 Description of EVB Connectors... 8 2.1.1 Jumper Settings... 8 2.1.2 Power Management Setting... 9 2.1.3 FA626 CPU ICE Connector... 10 2.1.4 CMOS Sensor Interface Connector... 11 2.1.5 Extended I/O Connector... 13 2.1.6 UART/RS485 Connector... 14 2.2 Description of Power Switch... 15 2.3 Description of Push Buttons... 15 2.4 Description of LED Indicators... 15 Chapter 3 Demonstration Setup of IP Cam... 17 3.1 Setting GM8126 EVB... 18 3.2 Setting VLC Media Player in PC Site... 18 Chapter 4 EVB Firmware Update... 21 4.1 Setting of GM8126 EVB... 22 4.2 Setting of PC Tool... 22 i

LIST OF TABLES Table 2-1. Function List of Jumper Settings (JP0 ~ JP7)... 8 Table 2-2. RTC Power Connector (J27)... 9 Table 2-3. SYS_WAKEUP Connector (J28)... 9 Table 2-4. SYS_PWREN Connector (J29)... 9 Table 2-5. Pin Definition of CPU ICE Connector (FA626 ICE: J7)... 10 Table 2-6. Signal Description of CPU ICE Connector... 10 Table 2-7. Table 2-8. Pin Definition of Connector used for Bayer Pattern Signals (CMOS Sensor I/F Connector: J16)... 11 Pin Definitions of Connector used forbt656/bt601/bt1120 Signals (CMOS Sensor I/F Connector: J16)... 12 Table 2-9. Pin Definition of Extended I/O Connector (J10)... 13 Table 2-10. Pin Definition of UART0 Connector (UART0 Connector: J4)... 14 Table 2-11. Pin Definition of UART1/RS485 Connector (UART1/RS485 Connector: J5)... 14 Table 2-12. List of Power Switches on EVB... 15 Table 2-13. List of Push Buttons on EVB... 15 Table 2-14. List of LED Indicators on EVB... 15 ii

LIST OF FIGURES Figure 1-1. Block Diagram of GM8126... 2 Figure 1-2. EVB Layout Containing GM8126... 3 Figure 1-3. Top View of EVB Containing GM8126... 4 Figure 1-4. ICE Daughter Board...5 Figure 1-5. Daughter Board of RS232... 5 iii

Chapter 1 Introduction This chapter contains the following sections: 1.1 Overview 1.2 Features 1

1.1 Overview The GM8126 video chip with the FA626TE CPU core provides a high-performance solution to accelerate the image and video related applications, such as H.264, MPEG4, and JPEG. GM8126 supports the JPEG, MPEG4, and H.264 encoders. GM8126 provides a cost-effective and easy-development system for integration and verification of the video application at the early development stage. The GM8126 system platform includes a wide range of basic components, including the H.264 encoder, video capture, display controller, DES/3DES controller, USB 2.0 OTG controller, USB 2.0 PHY, DMA controller, Ethernet MAC controller, Ethernet PHY, Audio codec, and AMBA bus framework, which can reduce the overall system cost. RTC crystal 32.768 khz Main crystal 30 MHz RTC battery Lens CMOS sensor Grain Media GM8126 IR receiver Speaker out (Mono) MIC_IN (Mono) LINE_IN (Stereo) Alarm in/out (GPIO) SPI flash SD/MMC card CVBS out Wireless module Figure 1-1. Block Diagram of GM8126 2

32.768 K RTC 5 V LED 5 V Adaptor Figure 1-2. EVB Layout Containing GM8126 3

Figure 1-3. Top View of EVB Containing GM8126 4

Figure 1-4. ICE Daughter Board Figure 1-5. Daughter Board of RS232 5

1.2 Features This EVB contains the following features: DDR2 SDRAM of 1G bits (64 Mx16) 8M byte SPI Flash memory ICE connector RTC and backup battery CMOS sensor interface connector Extended I/O connector 10/100 Ethernet RJ45 connectors SD/MMC card socket for SD/MMC card access USB HOST connector (OTG) RCA (CVBS output) connector Audio codec (MIC in, line in, and speaker output) UART interfaces for asynchronous serial data transfer ADC keypads PWM GPIO I 2 S interface IR remote control receiver DMIC 6

Chapter 2 System Hardware This chapter contains the following sections: 2.1 Description of EVB Connector 2.2 Description of Power Switch 2.3 Description of Push Buttons 2.4 Description of LED Indicators 7

2.1 Description of EVB Connectors 2.1.1 Jumper Settings GM8126 contains several jumper settings (JP0 ~ JP7). When the reset signal changes from low to high, GM8126 will latch the logic value of the jumper settings will store specific internal registers. These latched values will affect the behavior of GM8126. For the IPCAM application, the value of JP1 must be logic low. The values of JP2, JP4, JP6, and JP7 must be logic high. As for JP0, it depends on the user application. The definitions of the jumper settings are listed and described in Table 2-1. Table 2-1. Function List of Jumper Settings (JP0 ~ JP7) Pin No. Signal Name Description JP0 (Internal pull-up) PLL1 setting 0:Set PLL1 frequency to 800 MHz 1:Set PLL1 frequency to 400 MHz JP1 (Internal pull-up) PLL32K disabled 0:Disable (Must) 1:Enable JP2 (Internal pull-up) Debug mode 0:Debug mode 1:Normal (Must) JP4 (Internal pull-up) OSC counter 0:Disable 1:Enable (Must) JP6 (Internal pull-up) CPU At-Speed test mode 0:At-Speed test mode 1:Normal (Must) JP7 (Internal pull-up) Firmware update mode 0:Firmware update mode 1:Normal (Must) 8

2.1.2 Power Management Setting J27 must be short in order to provide the RTC power. Please refer to Table 2-2 for the definition of the RTC power connector (J27). Table 2-2. RTC Power Connector (J27) Pin No. Signal Name Description 1 ALIVE_3V3 Destination 2 VBAT Source J28 is used to control the wakeup function of the system. If Pin 1 and Pin 2 are short, it indicates that GM8126 will always be at the wakeup status and never enter to the sleep mode. If Pin 2 and Pin 3 are short, it indicates that GM8126 will be wakening up from the sleep mode by pressing the button, PB10. For the IPCAM application, Pin 1 and Pin 2 of J28 must be short. Table 2-3 lists and describes the definition of the SYS_WAKEUP connector (J28). Table 2-3. SYS_WAKEUP Connector (J28) Pin No. Signal Name Description 1 Pull 3V3 Source 2 SYS_WAKEUP Destination 3 Push bottom Source J29 is used to control the system power. If Pin 1 and Pin 2 are short, it indicates that the EVB power will always be turned on. If Pin 2 and Pin 3 are short, it indicates that the EVB power will be controlled by the PWREN signal of GM8126. For the IPCAM application, Pin 1 and Pin 2 of J29 must be short. Table 2-4 lists and describes the definition of the SYS_PWREN connector (J29). Table 2-4. SYS_PWREN Connector (J29) Pin No. Signal Name Description 1 5 V Source 2 SYS_PWREN Destination 3 PWREN Source 9

2.1.3 FA626 CPU ICE Connector FA626 CPU ICE connector (J7) can be connected to Open-ICE or Multi-ICE. Table 2-5 and Table 2-6 list and describe the pin definition of the FA626 CPU ICE connector. Table 2-5. Pin Definition of CPU ICE Connector (FA626 ICE: J7) Pin No. Signal Name Pin No. Signal Name 1 3V3 2 3V3 3 ICE_TRSTn 4 GND 5 ICE_TDI 6 GND 7 ICE_TMS 8 GND 9 ICE_TCK 10 GND 11 ICE_RTCK 12 GND 13 ICE_TDIO 14 GND 15 ICE_SRSTn 16 GND 17 ICE_DBGRQ 18 GND 19 ICE_DBGACK 20 GND Table 2-6. Signal Name ICE_TCK ICE_TMS ICE_TDIO ICE_TDI ICE_DBGRQ ICE_RTCK ICE_TRSTn 3V3 GND Signal Description of CPU ICE Connector Description ICE clock input ICE mode select ICE data ICE data input External device enters ICE after de-activating the reset. Pull low with a 4.7-kΩ resistor Active-low reset signal for the boundary scan logic Pull low with a 4.7-kΩ resistor 3.3-V power Ground 10

2.1.4 CMOS Sensor Interface Connector The CMOS Sensor I/F connector (J16) provides a video input port for the CMOS/CCD sensor. Please refer to Table 2-7 for the details if J16 is used for the Bayer pattern signals. Please refer to Table 2-8 for details if connector is used for the BT656/BT601/BT1120 signals. Table 2-7. Pin Definition of Connector used for Bayer Pattern Signals (CMOS Sensor I/F Connector: J16) Pin No. Signal Name Pin No. Signal Name 1 3V3 2 3V3 3 DGND 4 DGND 5 I2S_SCLK 6 I2S_TXD/RXD 7 I2S_FS 8 I2C_SDA 9 I2C_SCL 10 NC 11 BAYER_CLKOUT 12 BAYER_STROBE 13 BAYER_LINE 14 BAYER_FRAME 15 DGND 16 BAYER_CLK 17 BAYER_D11 18 BAYER_D10 19 BAYER_D9 20 BAYER_D8 21 BAYER_D7 22 BAYER_D6 23 DGND 24 DGND 25 BAYER_D5 26 BAYER_D4 27 NC 28 GPIO1_13 29 BAYER_D3 30 BAYER_D2 31 DGND 32 DGND 33 BAYER_D1 34 BAYER_D0 35 GPIO1_17 36 GPIO1_16 37 GPIO1_15 38 GPIO1_14 39 5 V 40 5 V 11

Table 2-8. Pin Definitions of Connector used forbt656/bt601/bt1120 Signals (CMOS Sensor I/F Connector: J16) Pin No. Signal Name Pin No. Signal Name 1 3V3 2 3V3 3 DGND 4 DGND 5 I2S_SCLK 6 I2S_TXD/RXD 7 I2S_FS 8 I2C_SDA 9 I2C_SCL 10 NC 11 CAP_CLKOUT 12 CAP0_FIELD 13 CAP0_HS 14 CAP0_VS 15 DGND 16 CAP0_CLK 17 CAP0_D7 18 CAP0_D6 19 CAP0_D5 20 CAP0_D4 21 CAP0_D3 22 CAP0_D2 23 DGND 24 DGND 25 CAP0_D1 26 CAP0_D0 27 NC 28 CAP1_CLK 29 CAP1_D7 30 CAP1_D6 31 DGND 32 DGND 33 CAP1_D5 34 CAP1_D4 35 CAP1_D3 36 CAP1_D2 37 CAP1_D1 38 CAP1_D0 39 5 V 40 5 V 12

2.1.5 Extended I/O Connector The Extended I/O connector (J10) provides a video output port for BT656 and peripheral interface. Table 2-9 lists and describes the pin definition of the extended I/O connector. Table 2-9. Pin Definition of Extended I/O Connector (J10) Pin No. Signal Name Pin No. Signal Name 1 3V3 2 3V3 3 DGND 4 DGND 5 LCD_CLK 6 NC 7 LCD_D1 8 LCD_D0 9 LCD_D3 10 LCD_D2 11 LCD_D5 12 LCD_D4 13 LCD_D7 14 LCD_D6 15 DGND 16 DGND 17 PWM1 18 PWM0 19 PWM3 20 PWM2 21 DGND 22 DGND 23 I2C_SCL 24 I2C_SDA 25 SPI_RXD 26 SPI_FS1 27 SPI_SCLK 28 SPI_TXD 29 DGND 30 DGND 13

2.1.6 UART/RS485 Connector The GM8126 EVB offers two DIN connectors (J4, J5) for the applications of UART and RS485. Please refer to Table 2-10 and Table 2-11 for the details on the pin deifications of the UART0 connectors. Table 2-10. Pin Definition of UART0 Connector (UART0 Connector: J4) Pin No. Signal Name Description 1 3V3 Power 2 TXD UART0 transmit 3 RXD UART0 receive 4 DGND GND Table 2-11. Pin Definition of UART1/RS485 Connector (UART1/RS485 Connector: J5) Pin No. Signal Name Description 1 3V3 Power 2 TXD UART1 transmit 3 RXD UART1 receive 4 DGND GND 5 /RE, DE Control signal of RS485 14

2.2 Description of Power Switch Table 2-12. Legend J26 SW1 List of Power Switches on EVB Function This is 5-V DC inlet, which connects to an external power adaptor. Power source switch 2.3 Description of Push Buttons Table 2-13. Legend PB10 PB2 ~ PB9 List of Push Buttons on EVB Function Wake-up push bottom (Please refer to Table 2-4 for details.) ADC0 keypads (TBD) 2.4 Description of LED Indicators Table 2-14. Legend List of LED Indicators on EVB Function LED1 Ethernet speed-mode indicator LED2 Ethernet link-mode indicator LED3 Power source indicator LED4 System power indicator (3.3 V) 15

Chapter 3 Demonstration Setup of IP Cam This chapter contains the following sections: 3.1 Setting GM8126 EVB 3.2 Setting VLC Media Player in PC 17

3.1 Setting GM8126 EVB Setup procedure: Step 1: Use the Ethernet cable to connect the GM8126 EVB Ethernet port to PC Step 2: Use the RS-232 cable to connect the GM8126 EVB UART port to PC. The RS-232 baud rate is 38400. Step 3: Power on the GM8126 EVB Step 4: Prepare the Executing Environment, please refer to GM8126_DVR-IPC_Starter_Guide.pdf. 3.2 Setting VLC Media Player in PC Site Setup procedure: Step 1: Execute the VLC media player 18

Step 2: Select Media Open the network stream 19

Step 3: Fill in the network URL information and other related settings Hint: Edit options: rtsp-caching = 200; :rtsp-tcp means space. Step 4: Now, users can see the stream video of the IP cam. 20

Chapter 4 EVB Firmware Update This chapter contains the following sections: 4.1 Setting of GM8126 EVB 4.2 Setting of PC Tool 21

4.1 Setting of GM8126 EVB Setup procedure: Step 1: Set JP7 to logic low (Short JP7 jumper). GM8126 will enter the firmware update mode. If the content of the SPI Flash is empty, users can skip this step. Step 2: Use the USB cable for connecting the GM8126 EVB USB port to PC Step 3: Power-on the GM8126 EVB 4.2 Setting of PC Tool Setup procedure: Step 1: After the PCTOOL utility (fusblink8126.exe) is executed, PC will show the following window. If the SPI Flash is detected, the Flash ID will always be 0xFFFF00FF. 22

Step 2: Press the advance settings button and specify the following location paths of files 23

Step 3: Press the start upgrade ( 開始升級 ) button. If upgrade is finished, the device information bar will show 100%. Step 4: Remote the JP7 jumper Step 5: Reboot Step 6: Pleaser refer to Section 3.1 for detailed information of settings of the GM8126 EVB. 24