Final Examination (Open Katz, asynchronous & test notes only, Calculators OK, 3 hours)

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Your Name: UNIVERSITY OF CALIFORNIA AT BERKELEY BERKELEY DAVIS IRVINE LOS ANGELES RIVERSIDE SAN DIEGO SAN FRANCISCO Department of Electrical Engineering and Computer Sciences SANTA BARBARA SANTA CRUZ CS 150 - Spring 1995 Prof. A. R. Newton (1) /18 (2) /20 (3) /20 (4) /16 (5) /26 TOTAL /100 Final Examination (Open Katz, asynchronous & test notes only, Calculators OK, 3 hours) Include all final answers in locations indicated on these pages. Use space provided for all working. If necessary, attach additional sheets by staple at the end. BE SURE TO WRITE YOUR NAME ON EVERY SHEET. (1) (18pts) (a) Four chairs are placed in a row: A B C D Each chair may be occupied ( 1 ) or empty ( 0 ). Write a logic function F(A,B,C,D) which is 1 iff there are two (or more) adjacent chairs that are empty. Express F: (i) As a Karnaugh Map. (ii) In minimum Sum-of-Products form using algebraic notation. (iii) In Standard Sum-of-Products (minterm) form. (iv) In Standard Product of Sums (maxterm) form. 1(a) 9pts (i) F(A,B,C,D) as a Karnaugh Map: AB CD 00 01 11 10 00 01 11 10 (ii) In minimum SoP form, F(A,B,C,D) = (iii) In Standard SoP form, F(A,B,C,D) = (iv) In Standard PoS form, F(A,B,C,D) = Final Examination Page 1 of 12 CS 150 - Sp. 95

(b) How many different combinational logic functions of two variables (X and Y) are there? 1(b) 2pts Total number. of switching functions: (c) Given that: F(A,B,C,D) = Σm(1,4,5,6,7,9,13,15) Using a Karnaugh Map: (i) List all of the essential prime implicants. (ii) How many prime implicants are there? List them. (iii) How many implicants are there? Just give the number, don t list them. (iv) Implement the function using a single 8-to-1 MUX and two-input AND gates only. Assume variables and their complements are available. Be sure to label your MUX inputs. 1(c) 7pts AB CD 00 01 11 10 00 01 11 10 (i) Essential prime implicants: (ii) Prime implicants: (iii) Total number of implicants: (iv) Implementation: CS 150 - Sp. 95 Page 2 of 12 Final Examination

Your Name: (2) (20pts) Consider the clocked J-K flip-flip flop with asynchronous preset and clear as shown below: (a) Complete the following timing diagram for Q output of the flip-flop. Assume all internal delays are zero and that there are no setup or hold constraints. 2(a) (5pts) (b) Derive the characteristic equation for the flip-flop, including the preset (P) and clear (C) inputs as well as J and K. Assume P=C=0 will never occur and treat P and C as synchronous inputs for this part of the problem. 2(b) (3pts) Q n+1 = Final Examination Page 3 of 12 CS 150 - Sp. 95

(c) Complete the timing diagram for the circuit shown below. Note that the CK (clock) inputs on the two flip-flops are different. Assume all internal delays are zero and that there are no setup and hold constraints. 2(c) (12pts) Additional space for Problem 2 CS 150 - Sp. 95 Page 4 of 12 Final Examination

Your Name: (3) (20pts) (a) Construct a state graph for the circuit shown below (X is the input and Z is the output.) 3(a) (6pts) Additional space for Problem 3 Final Examination Page 5 of 12 CS 150 - Sp. 95

(b) A sequential network has only one input (X) and one output (Z). Draw a Mealy state graph for the case Z=1 iff the total number of 1 s received is divisible by 3. (Note: 0, 3, 6, 9, 12,... are divisible by 3.) 3(b) (6pts) (c) Draw the Mealy state graph for the network of (b) above if the total number of 1 s received is divisible by 3 and the total number of 0 s received is an even number which is greater than zero. (9 states are sufficient.) 3(c) (8pts) CS 150 - Sp. 95 Page 6 of 12 Final Examination

Your Name: (4) (16pts) (a) Draw the schematic diagram for a minimal hazard-free realization (gates + gate inputs) of the following function using only 3-input NOR gates. Assume variables and their complements are available. 4(a) (6pts) F(A,B,C,D) = Σm(0, 2, 6, 7, 8, 10, 13) Additional space for Problem 4 Final Examination Page 7 of 12 CS 150 - Sp. 95

(b) For the flow table shown below, find a state assignment that avoids all critical races. Additional states may be added as necessary, but use as few state variables as possible. Assign the all-0 s combination to state A. If any additional states are needed to prevent critical races, use your state assignment and adjacency map to explain why. 4(b) (10pts) XY Sn 00 01 11 10 A B C A B B E B C F C E D D F B E D E E F F F A Sn+1 State assignment: Adjacency map: CS 150 - Sp. 95 Page 8 of 12 Final Examination

Your Name: (5) (26pts)This problem concerns a base-(-2) (base-(minus-two)) adder. In CS150, we only considered number systems with positive bases (in particular, the binary, or base-2, system). For example, in a base- 3 system, the number ABCD 3 is equal to: ABCD 3 = A*3 3 + B*3 2 + C*3 1 + D*3 0. So for a base-(-2) system, EFGH -2 would be computed using: EFGH -2 = E*(-2) 3 + F*(-2) 2 + G*(-2) 1 + H*(-2) 0 (a) Convert the following decimal numbers to base-(-2). Use as many bits as you need. 5(a) (8pts) 5 10 = -2 6 10 = -2-7 10 = -2 11 10 = -2 (b) For the purpose of this problem, we define a number system as contiguous if, given any two integer values m and n which can be represented in the number system, there exists no integer value x, with m< x < n, that cannot be represented in the system. For example, a 1-bit decimal system is contiguous. It can represent the counting numbers 0-9, and there are no numbers in between 0 and 9 which cannot be represented using one decimal digit. The binary number system (base 2) is also contiguous. (i) Is a four-bit base-(-2) system contiguous? (ii) What are the maximum and minimum values (in decimal) that can be represented by a four-bit base- (-2) system? (iii) Is an n-bit base-(-2) system contiguous, where n is any positive integer? Justify your answer. 5(b) (6pts) (i) (ii) Maximum 10 = Minimum 10 = (iii) Final Examination Page 9 of 12 CS 150 - Sp. 95

(c) Add the following numbers in base-(-2). Pay close attention to the carry-in and carry-out aspects because they are important in Part (d) 5(c) (2pts) 001110-2 + 001111-2 = -2 (d) Draw a truth table for a one-bit bit slice of a base-(-2) adder. Assume one bit of carry-in. You must determine the specification for the carry-out. 5(d) (3pts) (e) Repeat part (d) above but with two carry-in bits. 5(e) (3pts) CS 150 - Sp. 95 Page 10 of 12 Final Examination

Your Name: (f) Draw the block-diagram for a 4-bit base-(-2) adder, using your one-bit bit slice from 5(e) above. 5(f) (4pts) Additional space for Problem 5 Final Examination Page 11 of 12 CS 150 - Sp. 95

Additional Space for Working Problems CS 150 - Sp. 95 Page 12 of 12 Final Examination