LM556/NE556. Dual Timer. Description. Features. Applications. Internal Block Diagram.

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Dual Timer www.fairchildsemi.com Features Replaces Two LM555/NE556 Timers Operates in Both Astable And Monostable Modes High Output Current TTL Compatible Timing From Microsecond To Hours Adjustable Duty Cycle Temperature Stability Of 0.005% Per C Applications Precision Timing Pulse Shaping Pulse Width Modulation Frequency Division Traffic Light Control Sequential Timing Pulse Generator Time Delay Generator Touch Tone Encoder Tone Burst Generator Description The LM556/NE556 series dual monolithic timing circuits are a highly stable controller capable of producing accurate time delays or oscillation. The LM556/NE556 is a dual LM555. Timing is provided an external resistor and capacitor for each timing function. The two timers operate independently of each other, sharing only VCC and ground. The circuits may be triggered and reset on falling waveforms. The output structures may sink or source 200mA. 14DIP 1 14SOP 1 Internal Block Diagram Rev. 1.0.0 2001 Fairchild Semiconductor Corporation

Absolute Maximum Ratings (TA = 25 C) Parameter Symbol Value Unit Supply Voltage VCC 16 V Lead Temperature (soldering 10sec) TLEAD 300 C Power Dissipation PD 600 mw Operating Temperature Range LM556/NE556 TOPR 0 ~ + 70 C Storage Temperature Range TSTG 65 ~ + 150 C 2

Electrical Characteristics (TA = 25 C, VCC = 5 ~ 15V, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Units Supply Voltage VCC 4.5 16 V Supply Current *1(two timers) (low state) Timing Error *2(monostable) Initial Accuracy Drift with Temperature Drift with Supply Voltage ICC ACCUR t/ T t/ VCC VCC = 5V, RL = VCC = 15V, RL = RA = 2KΩ to 100KΩ C = 0.1µF T = 1.1RC 5 16 0.75 50 0.1 12 30 ma ma % ppm/ C %/V Control Voltage VC VCC = 15V 9.0 10.0 11.0 V VCC = 5V 2.6 3.33 4.0 V Threshold Voltage VTH VCC = 15V 8.8 10.0 11.2 V VCC = 5V 2.4 3.33 4.2 V Threshold Current*3 ITH 30 250 na Trigger Voltage VTR VCC = 15V 4.5 5.0 5.6 V VCC = 5V 1.1 1.6 2.2 V Trigger Current ITR VTR = 0V 0.01 2.0 µa Reset Voltage*5 VRST 0.4 0.6 1.0 V Reset Current IRST 0.03 0.6 ma Low Output Voltage High Output Voltage VOL VOH VCC = 15V ISINK = 10mA ISINK = 50mA ISINK = 100mA ISINK = 200mA VCC = 5V ISINK = 8mA ISINK = 5mA VCC = 15V ISOURCE = 200mA ISOURCE = 100mA 12.75 0.1 0.4 2.0 2.5 0.25 0.15 12.5 13.3 0.25 0.75 3.2 0.35 0.25 V V V VCC = 5V ISOURCE = 100mA 2.75 3.3 V Rise Time of Output tr 100 300 ns Fall Time of Output tf 100 300 ns Discharge Leakage Current ILKG 10 100 na Matching Characteristics*4 Initial Accuracy Drift with Temperature Drfit with Supply Voltage ACCUR t/ T t/ VCC 1.0 10 0.2 2.0 0.5 % ppm/ C %/V Timing Error (astable)*2 Initial Accuracy Drift with Temperature Drift with Supply Voltage ACCUR t/ T t/ Vcc VCC = 15V RA,RB = 1KΩ to 100KΩ C = 0.1µF 2.25 150 0.3 % ppm/ C %/V Notes: *1. Supply current when output is high is typically 1.0mA less at VCC = 5V *2. Tested at VCC = 5V and VCC = 15V *3. This will determine the maximum value of RA + RB for 15V operation. The maximum total R = 20MΩ, and for 5V operation the maximum total R = 6.6MΩ. *4. Matching characteristics refer to the difference between performance characteristics of each timer section in the monostable mode. *5. As reset voltage lowers, timing is inhibited and then the output goes low. 3

Mechanical Dimensions Package 14DIP 6.40 ±0.20 0.252 ±0.008 2.08 ( ) 0.082 #1 #14 2.54 0.100 19.80 0.780 MAX 0.46 ±0.10 0.018 ±0.004 19.40 ±0.20 0.764 ±0.008 1.50 ±0.10 0.059 ±0.004 #7 #8 7.62 0.300 3.25 ±0.20 0.128 ±0.008 0.20 0.008 MIN 5.08 0.200 MAX 3.30 ±0.30 0.130 ±0.012 0~15 0.25 +0.10 0.05 0.010 +0.004 0.002 4

Mechanical Dimensions (Continued) Package 14SOP 1.55 ±0.10 0.061 ±0.004 MIN 0.05 0.002 0.47 ( ) 0.019 #1 #14 8.70 0.343 MAX 8.56 ±0.20 0.337 ±0.008 0.406 +0.10 0.05 +0.004 0.016 0.002 #7 #8 6.00 ±0.30 0.236 ±0.012 1.80 0.071 MAX 1.27 0.050 +0.10 0.05 0.20 +0.004 0.008 0.002 3.95 ±0.20 0.156 ±0.008 MAX0.10 MAX0.004 0.60 ±0.20 0.024 ±0.008 5.72 0.225 0~8 5

Ordering Information Product Number Package Operating Temperature LM556CN 14DIP LM556CM 14SOP NE556 14DIP 0 ~ + 70 C NE556D 14SOP 6

7

DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 5/22/01 0.0m 001 Stock#DSxxxxxxxx 2001 Fairchild Semiconductor Corporation