Computer Science and Engineering 331. Midterm Examination #1. Fall Name: Solutions S.S.#:

Similar documents
MIPS (SPIM) Assembler Syntax

comp 180 Lecture 10 Outline of Lecture Procedure calls Saving and restoring registers Summary of MIPS instructions

Rui Wang, Assistant professor Dept. of Information and Communication Tongji University.

Chapter 2A Instructions: Language of the Computer

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine

Course Administration

Lecture 5: Procedure Calls

CS3350B Computer Architecture MIPS Introduction

ELEC / Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2)

ECE 30 Introduction to Computer Engineering

MIPS%Assembly% E155%

Computer Organization MIPS ISA

CS3350B Computer Architecture

MIPS R-format Instructions. Representing Instructions. Hexadecimal. R-format Example. MIPS I-format Example. MIPS I-format Instructions

Branch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015

CENG3420 Lecture 03 Review

1 5. Addressing Modes COMP2611 Fall 2015 Instruction: Language of the Computer

Chapter 2. lw $s1,100($s2) $s1 = Memory[$s2+100] sw $s1,100($s2) Memory[$s2+100] = $s1

Lecture 6: Assembly Programs

CS 61c: Great Ideas in Computer Architecture

Instruction Set Architecture part 1 (Introduction) Mehran Rezaei

Stored Program Concept. Instructions: Characteristics of Instruction Set. Architecture Specification. Example of multiple operands

Character Is a byte quantity (00~FF or 0~255) ASCII (American Standard Code for Information Interchange) Page 91, Fig. 2.21

Chapter 2: Instructions:

Chapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes

COMPSCI 313 S Computer Organization. 7 MIPS Instruction Set

COMPUTER ORGANIZATION AND DESIGN

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA MIPS ISA. In a CPU. (vonneumann) Processor Organization

Announcements HW1 is due on this Friday (Sept 12th) Appendix A is very helpful to HW1. Check out system calls

Lectures 3-4: MIPS instructions

Today s topics. MIPS operations and operands. MIPS arithmetic. CS/COE1541: Introduction to Computer Architecture. A Review of MIPS ISA.

Computer Architecture

EE 361 University of Hawaii Fall

Instructions: Language of the Computer

Computer Organization and Structure. Bing-Yu Chen National Taiwan University

Lecture 4: MIPS Instruction Set

Course Administration

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA

ECE 15B Computer Organization Spring 2011

Chapter 3 MIPS Assembly Language. Ó1998 Morgan Kaufmann Publishers 1

Unsigned Binary Integers

Unsigned Binary Integers

Instructions: MIPS arithmetic. MIPS arithmetic. Chapter 3 : MIPS Downloaded from:

Chapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont )

Computer Organization and Structure. Bing-Yu Chen National Taiwan University

MIPS Instruction Set Architecture (2)

I-Format Instructions (3/4) Define fields of the following number of bits each: = 32 bits

CSSE 232 Computer Architecture I. I/O and Addressing

Thomas Polzer Institut für Technische Informatik

CS3350B Computer Architecture MIPS Instruction Representation


Chapter 2. Instruction Set Architecture (ISA)

Computer Architecture

Instruction Set Architecture

Computer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: MIPS Instruction Set Architecture

Stored Program Concept. Instructions: Characteristics of Instruction Set. Architecture Specification. Example of multiple operands

ECE 331 Hardware Organization and Design. Professor Jay Taneja UMass ECE - Discussion 3 2/8/2018

CS/COE1541: Introduction to Computer Architecture

Assembler. Lecture 8 CS301

Systems Architecture I

CENG3420 L03: Instruction Set Architecture

Instructions: MIPS ISA. Chapter 2 Instructions: Language of the Computer 1

Control Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary

Control Instructions

Instructions: Assembly Language

Architecture II. Computer Systems Laboratory Sungkyunkwan University

Computer Organization MIPS Architecture. Department of Computer Science Missouri University of Science & Technology

Instruction encoding. MIPS Instruction encoding

EEC 581 Computer Architecture Lecture 1 Review MIPS

Lecture 5: Procedure Calls

Introduction to the MIPS. Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University

MIPS Assembly Programming

Review of Last Lecture. CS 61C: Great Ideas in Computer Architecture. MIPS Instruction Representation II. Agenda. Dealing With Large Immediates

CS31001 COMPUTER ORGANIZATION AND ARCHITECTURE. Debdeep Mukhopadhyay, CSE, IIT Kharagpur. Instructions and Addressing

ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design

CS 61C: Great Ideas in Computer Architecture. MIPS Instruction Formats

Computer Hardware Engineering

CSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI.

Do-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero

Topic Notes: MIPS Instruction Set Architecture

MIPS Functions and Instruction Formats

CPSC 330 Computer Organization

Computer Architecture Instruction Set Architecture part 2. Mehran Rezaei

Math 230 Assembly Programming (AKA Computer Organization) Spring 2008

CS222: MIPS Instruction Set

Grading: 3 pts each part. If answer is correct but uses more instructions, 1 pt off. Wrong answer 3pts off.

Lecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook)

Machine Instructions - II. Hwansoo Han

Review. Lecture #9 MIPS Logical & Shift Ops, and Instruction Representation I Logical Operators (1/3) Bitwise Operations

101 Assembly. ENGR 3410 Computer Architecture Mark L. Chang Fall 2009

ECE232: Hardware Organization and Design. Computer Organization - Previously covered

All instructions have 3 operands Operand order is fixed (destination first)

2) Using the same instruction set for the TinyProc2, convert the following hex values to assembly language: x0f

CSE 141 Computer Architecture Spring Lecture 3 Instruction Set Architecute. Course Schedule. Announcements

5/17/2012. Recap from Last Time. CSE 2021: Computer Organization. The RISC Philosophy. Levels of Programming. Stored Program Computers

Recap from Last Time. CSE 2021: Computer Organization. Levels of Programming. The RISC Philosophy 5/19/2011

Midterm. Sticker winners: if you got >= 50 / 67

Instruction Set Architectures Part I: From C to MIPS. Readings:

Instruction Set Architecture. "Speaking with the computer"

MIPS Coding Continued

Transcription:

Computer Science and Engineering 331 Midterm Examination #1 Fall 2000 Name: Solutions S.S.#: 1 41 2 13 3 18 4 28 Total 100 Instructions: This exam contains 4 questions. It is closed book and notes. Calculators are allowed. Do all of your work on the attached sheets. You have 75 minutes to complete the exam. The exam totals 100 points; the points for each problem are indicated. The points have been assigned according to the formula 1 point = 1 1/3 exam minutes, so pace yourself accordingly. This exam counts for about 24% of your course grade.

(41 pts) 1. Short Answer A. Give three advantages of programming in a higher level language (like C) over programming in assembler (like MIPS). 1 Improves programmer productivity (fewer lines of code, easier to understand, ) 2 Programs are machine independent - portability 3 Programs are easier to debug and maintain Good compilers can produce very efficient code B. Label the remaining two states and show the transitions (by inserting arrows) for the finite state machine defining a machine instruction cycle: Fetch Execute Decode C. Give two reasons why registers are used as the source and destination operands for arithmetic instructions in the MIPS. 1 Faster than accessing operands from main memory 2 Improved code density takes fewer bits in the instruction to specify the operand addresses Easier for a compiler to use

D. Show the memory state (contents given in hexidecimal) after executing the following code sequence where $s0 is initialized to 0x1000 0000. Memory Before After MIPS Code Sequence 1000 0000 ff ff ff ff aa aa aa aa ff ff aa ff aa aa aa ff lb $t0, 1($s0) sb $t0, 6($s0) lb $t0, 4($s0) sb $t0, 3($s0) E. Fill in the blanks in the diagram shown below for the MIPS addressing modes. Register addressing op rs rt rd funct Register word operand Base op rs rt offset addressing Memory word or byte operand Immediate base register addressing op rs rt operand -relative addressing op rs rt offset Memory branch designation instr Program counter Pseudo-direct addressing op jump address Memory jump destination Program counter

F. Give the six steps in the execution of a procedure as discussed in class. 1 Caller puts arguments where callee can find them (in $a0 - $a3 and/or on stack) 2 Caller transfers control to the procedure (callee) jal subroutine 3 Callee acquires the storage resources needed (by spilling registers to the stack) 4 Callee performs the desired task 5 Callee places result values where caller can find them (in $v0-$v1 and/or on stack) 6 Callee returns control to the caller jr G. List three tasks that the assembler performs (e.g., the SPIM assembler) in addition to its basic job of assembling the instructions (i.e., in addition to its job of filling in the instruction format with the binary opcode and register address information, computing branch offsets, and determining jump addresses). 1 Converts pseudo-instructions to legal MIPS instructions 2 Converts far away branches to a branch followed by a jump 3 Converts instrs with large immediates into a lui followed by a ori Converts decimal values into binary and characters into their ASCII equivalents Builds the symbol table of instr. Labels and their addresses H. Fill in the blanks in the translation hierarchy diagram shown below.

C program compiler Assembly assembler object (machine) code library routines linker executable loader memory (13 pts) 2. Compiling MIPS Code

Only a very inefficient compiler would produce the code we derived in class for the C while loop C while loop MIPS assembler while (i!= k) loop: beq $s0, $s2, exit i = i + j add $s0, $s0, $s1 j loop exit:... Give the MIPS assember code for the while loop that uses at most one branch or one jump each time through the loop. loop: add $s0, $s0, $s1 bne $s0, $s0, loop sub $s0, $s0, $s1... beq $s0, $s2, exit loop: add $s0, $s0, $s1 bne $s0, $s0, loop exit:... sub $s0, $s0, $s1 loop: add $s0, $s0, $s1 bne $s0, $s0, loop... j test loop: add $s0, $s0, $s1 test: bne $s0, $s0, loop... How many instructions are executed if the loop is executed three times (e.g., if = 0, j = 1, and k = 3 coming into the loop)? i Original code 10 Your optimized code 7 for all solutions except j test that takes 8 (18 pts) 3. Assembling MIPS Code

Give the machine code for the MIPS assembler code assembled at the starting address 0x0040 0000. (You may use a combination of decimal, hexidecimal and/or binary encodings.) Address MIPS assembler 0x0040 0000 loop: beq $s0, $s2, exit add $s0, $s0, $s1 j loop exit: lui $s0, 48 Machine Code: bit 0 beq bit 31 4 16 18 2 add 0 16 17 16 0 32 j 2 0x0100000 lui 15 0 16 48

(28 pts) 4. Code Tracing and Subrouting Handling For the following MIPS code sequence and given that $a0 = 1 initially, show the contents of the program counter (), register, and the memory stack after the execution of each of the instructions marked below. Point 1 is given for you. main:... jal next0:... sub1 Point 1 sub1: addi $sp, $sp, -8 sw, 4($sp) sw $a0, 0($sp) bne $a0, $zero, L1 jr L1: addi $a0, $a0, -1 jal sub1 : lw $a0, 0($sp) lw, 4($sp) addi $sp, $sp, 8 jr Point 1 Point 3 Point 2 Point 4 Point 2 $sp = next0 $a0 = 1 $sp next0 sub1 sub1

Point 3 Point 4 (first time) = next0 = next0 $a0 = 1 $a0 = 1 = $a0 = 0 $sp $sp Point 4 (second time) $sp next0 next0