BL55077(A) LCD Driver

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BL55077(A) LCD Driver LCD Driver for 160 Display Units BL55077(A) General Description The BL55077(A) is a general LCD driver IC for 160 units LCD panel. It features a wide operating supply voltage range, incorporates simple communication interface with microcomputer and is suitable for multiple application. Features Single-chip LCD controller/driver Selecable backplane drive configuration: static, 1/2, 1/3 or 1/4 backplane multiplexing. Selectable display bias configuration : static, 1/2 or 1/3 bias Operation voltage: 2~5.5V Serial data interface 160(40 SEG x 4 COM) Display Units Low power dissipation design: Power saving mode: Idd=14uA @ 5V and Idd=9uA @ 3.3V; Sleeping mode: Idd 1.5uA Maybe cascaded up to 16pcs for large LCD application Versatile blinking modes VLCD for adjusting LCD operating voltage TTL/CMOS compatible Excellent EMC immunity Compatible with general microcomputer LQFP-64 package Application Power Meter, Gas Meter Toy, Clock Industrial instrument Shanghai Belling Corp., Ltd 1 / 10 V1.0

Pin Assignment BL55077(A) LCD Driver Pin Description Pin No. SYMBOL DESCRIPTION 10 SDA Serial data input/output 11 SCL Serial clock input 12 SYNC Cascade synchronization clock 13 CLK External clock input 14 Vdd Supply voltage 15 OSC Oscillator input 16-18 A0 A1 A2 Subaddress inputs 19 SA0 Slave address input;bit0 20 Vss ground 21 Vlcd LCD supply voltage 25-28 Com0 Com2 Com1 Com3 Common terminal driving output 29-32 34-37 49-64 2-7 S0 S39 Segment terminal driving output 1 8 9 22 23 24 33 48 NC Unused Shanghai Belling Corp., Ltd 2 / 10 V1.0

Block Diagram BL55077(A) LCD Driver Function Description Function Circuit The BL550077(A) has all function circuits that can directly drive any static or multiplexed LCD containing up to four commons and up to 40 segments. The function circuits include:power-on reset, LCD bias generator, LCD voltage selector, Oscillator, display RAM, Display latch, Shift register, Common/segment outputs, input/output bank selector, Blinker, Data pointer, Subaddress counter,etc. Shanghai Belling Corp., Ltd 3 / 10 V1.0

BL55077(A) LCD Driver Display Function Decription The display RAM is a static 40x 4-bit RAM which stores LCD data. A logic 1 in the RAM bit-map indicates the on state of the corresponding LCD segment; similarly, a logic 0 indicates the off state. There is a one-to-one correspondence between the RAM addresses and the segment outputs, and between the individual bits of a RAM word and the common outputs. Display RAM address and SEGMENT(S0~S39)output COM (Com0~ Com3) outpu t 0 1 2 3 0 1 2 3 36 37 38 39 When display data is transmitted to the BL55077(A), the display bytes received are stored in the display RAM in accordance with the selected LCD drive mode. To illustrate the filling order, an example of a 7-segment numeric display showing all drive modes is given in Fig.3; the RAM filling organization depicted applies equally to other LCD types. I 2 C-bus protocol Two I2C-bus slave addresses (0111000 and 0111001) are reserved for the BL55077(A). The least significant bit of the slave address that a BL55077(A) will Shanghai Belling Corp., Ltd 4 / 10 V1.0

BL55077(A) LCD Driver respond to is defined by the level tied at its input SA0. Therefore, two types of BL55077(A) can be distinguished on the same I2C-bus which allows: 1) Up to 16 BL55077(A) on the same I2C-bus for very large LCD applications. 2) The use of two types of LCD multiplex on the same I2C-bus. The I2C-bus protocol is shown in Fig.4. The sequence is initiated with a START condition (S) from the I2C-bus master which is followed by one of the two BL55077(A) slave addresses available. All BL55077(A)s with the corresponding SA0 level acknowledge in parallel with the slave address but all BL55077(A)s with the alternative SA0 level ignore the whole I2C-bus transfer. After acknowledgement, one or more command bytes (m) follow which define the status of the addressed BL55077(A)s. The last command byte is tagged with a cleared most significant bit, the continuation bit C. The command bytes are also acknowledged by all addressed BL55077(A)s on the bus. After the last command byte, a series of display data bytes(n) may follow. These display bytes are stored in the display RAM at the address specified by the data pointer and the subaddress counter. Both data pointer and subaddress counter are automatically updated and the data is directed to the intended BL55077(A) device. The acknowledgement after each byte is made only by the (A0, A1 and A2) addressed BL55077(A). After the last display byte, the I2C-bus master issues a STOP condition (P). Command Decoder The command decoder identifies command bytes that arrive on the I 2 C-bus. All available commands carry a continuation bit C in their most significant bit position. The five commands available to the BL55077(A) are defined. Shanghai Belling Corp., Ltd 5 / 10 V1.0

BL55077(A) LCD Driver Shanghai Belling Corp., Ltd 6 / 10 V1.0

Absolute Maximum Rating BL55077(A) LCD Driver Parameter Symbol Rating Unit Supply voltage Vdd -0.5~+6.0 V LCD operating voltage Vlcd 0~ Vdd V Input voltage Vi Vss-0.5~Vdd+0.5 V Output voltage Vo Vlcd-0.5~Vdd+0.5 V Vdd,Vss,Vlcd current Idd,Iss,Ilcd -50~+50 ma Maximum power consumption Ptot 400 mw Operating temperature Topr -40~ +75 Storage temperature Tstg -65~ +150 DC Characteristic(Ta=25 ) Symbol Parameter Test Condition Min Typ Max Unit IC Operating Vdd voltage 2.5-5.5 V LCD operating Vlcd voltage 0 - Vdd-2 V Idd1 Supply current Vdd=5V,VLCD=0V,Normal mode,internal oscillator - 25 50 ua Idd2 Idd3 Supply current Supply current Vdd=5V,VLCD=0V,power saving mode,internal oscillator - 14 30 ua Vdd=3.3V,VLCD=0V,Normalm ode,internal oscillator - 16 30 ua Idd4 Supply current Vdd=3.3V,VLCD=0V,power saving mode,internal oscillator - 9 15 ua I SL Sleep current Vdd=5V,VLCD=0V - 1.5 ua ViL Low voltage input SDA,SCL Vss - 0.3Vdd V ViH High voltage input SDA,SCL 0.7Vdd - Vdd V Rph Pull high resister SYNC 30 50 100 kω V C V S DC voltage component C COM =32nF, COM0~COM3-40 40 mv DC voltage component C S =4.7nF, SEG0~SEG39-40 40 mv NOTE: the voltage of DC voltage component test: VDD=3.3 V, VLCD=0V AC Characteristics Symbol Parameter Conditions MIN. TYP. MAX. UNIT. Fclk Oscillator frequency Vdd=5V,normal mode 125 180 300 KHz Fclklp Oscillator frequency Vdd=3.3V,power-save 21 31 48 KHz Shanghai Belling Corp., Ltd 7 / 10 V1.0

BL55077(A) LCD Driver mode Tclkh CLK High time 1 - - us Tclkl CLK Low time 1 - - us IIC-bus tbuf bus free time 4.7 - - us thd;sta START condition 4 - - us hold time tlow SCL Low time 4.7 - - us thigh SCL High time 4 - - us tsu;sta set-up time for a 4.7 - - us repeated START condition thd;dat Data hold time 0 - - us tsu;dat Data set-up time 250 - - ns Tr SCL and SDA rise - - 1 us time Tf SCL and SDA fall - - 300 us time tsu;sto Set-up time for STOP condition 4.7 - - us I 2 C-bus timing waveforms Shanghai Belling Corp., Ltd 8 / 10 V1.0

Typical Application BL55077(A) LCD Driver Typical cascaded Application Shanghai Belling Corp., Ltd 9 / 10 V1.0

Package Outlines LQFP64 BL55077(A) LCD Driver Unit D E e b f m n mm 10.0(0.1) 12.0(0.15) 0.5 0.22(0.05) 1.25(0.2) 1.0 0.6(0.15) Shanghai Belling Corp., Ltd 10 / 10 V1.0