General Description The Evaluation Board is designed to demonstrate the capabilities of MPS MP50 triple output step-up converter which is capable of powering a TFT panel from a regulated.v or 5V. The MP50 includes a.mhz fixedfrequency step-up converter and a positive and negative linear regulator. The linear regulators are powered from a charge-pump driven by the step-up converter, switching node, SW. A single on/off control drives all outputs. The outputs are internally sequenced at power on and power off for ease of use. An internal softstart prevents overloading the input source at startup. Cycle-by-cycle current limits component overstress. Ordering Information Evaluation Board Number MPS IC Number QFN6 Evaluation Board (Actual Size =.75 X x.4 Y) MP50: Triple Output TFT Bias Converter Absolute Maximum Ratings IN Supply Voltage -0.V to 6V SW Voltage -0.V to 8V IN Voltage -0.V to 40V IN Voltage 0.V to -5V IN to IN Voltage -0.V to 60V All Other Pins -0.V to 6V Recommended Operating Conditions Input Voltage.7V to 5.5V Main Output Voltage V IN to V IN Voltage 0V to 6V IN Voltage 0V to -0V Features.7 to 5.5V Operating Input Range A Switch Current Limit Outputs In Single Package Step-Up Converter up to V Positive 0mA Linear Regulator Negative 0mA Linear Regulator 50mΩ Internal Power MOSFET Switch Up to 95% Efficiency µa Shutdown Mode Fixed.4MHz frequency Positive Regulator up to 8V Negative Regulator down to -0V Internal Power-On Sequencing Adjustable Soft-Start/ Fault Timer Thermal Shutdown Cycle-by-Cycle Over Current Protection Under Voltage Lockout Ready Flag Applications TFT LCD Displays Portable DVD Players Tablet PCs Car Navigation Displays MP50 Rev 0.5_04/0/0 www.monolithicpower.com
Figure : EV006 Schematic C4 C0 D5 D C9 C C C D4 D C0 C5 TP5 VGH TP4 TP VGL +7V -8.5V +V TP9 VMAIN D TP0 TP RDY C8 0uF/5V C5 N589HW L 4.7uH/.A C 0nF R 00k R6 R C8 0 7pF R8 05k R9 0k R4 C uf/50v R 00k TP EN TP TP7 VIN TP8 C4 9.k C 0uF/6.V R7 0k C9 R 6.8k C 0nF C6 C7 68.k R0 0 R5 0k C7 7pF C6 uf/5v / MP50 Evaluation Board Schematic ev0055_mp50_rev_d.sch /6/04 Rev.0_0//04 www.monolithicpower.com
Board Operation The three output voltages of this board are set to +7V, +V and -8.5V. The board layout accommodates most commonly used inductors and output capacitors.. Attach positive end of loads to VMAIN, VGH and VGL pins respectively. Attach negative end of loads to pins.. Attach input voltage.7v V IN 5.5V and input ground to VIN and pins respectively.. To enable the MP50 apply a voltage,.5v V EN 6V, to the EN pin. To disable the MP50 connect the EN pin to ground. 4. During startup RDY will be left HIGH. Once the turn-on sequence is complete, this pin will be pulled low if all regulators exceed 80% of their specified voltages. After all regulators are turned-on, a fault in any regulator will cause RDY to go LOW after approximately 5µS. If the fault persists for more than approximately 6mS (for CT=0nF), the entire chip will shut down. 5. To adjust the output voltages: Rev.0_0//04 www.monolithicpower.com
Table : EV006 Bill of Materials Component Description Manufacturer Part No. Qty U MP50, QFN6-X MPS: MP50DQ L 4.7µH,.6A, SMD, Unshielded Toko: 87FY-4R7M-P D Schottky Diode, 40V, A, SOD- Diodes Inc: N589HW-7 D 0 D, D4, D5 Schottky Diodes, Dual, 40V, 00mA, SOT Diodes Inc: C 0µF, Ceramic Capacitor, 0V, 0, X5R Panasonic: ECJ-4YBA06K C, C 0nF, Ceramic Capacitor, 50V, 0805, X7R Panasonic: ECJ-VBH0K C4, C5, C7, C9, C0, C, C, C6 0.µF, Ceramic Capacitor, 50V, 0805, X7R Panasonic: ECJ-YBH04K 8 C6 µf, Ceramic Capacitor, 5V, 06, X7R Panasonic: ECJ-YBE05K C8 0µF, Ceramic Capacitor, 5V, 0, X5R Panasonic: ECJ-4YBE06M C µf, Ceramic Capacitor, 50V, 0, X7R C4, C5, C9, C0, C 0 C7, C8 7pF, Ceramic Capacitor, 50V, 0805, NPO Panasonic: ECJ-VCH70J R, R 00KΩ, Resistor, 0805, 5% Panasonic: ERJ-6GEYJ04V R 6.8KΩ, Resistor, 0805, 5% Panasonic: ERJ-6GEYJ68V R4 68.KΩ, Resistor, 0805, % Panasonic: ERJ-6ENF68V R5, R7, R9 0KΩ, Resistor, 0805, 5% Panasonic: ERJ-6GEYJ0V R6 9.KΩ, Resistor, 0805, % Panasonic: ERJ-6ENF9V R8 05KΩ, Resistor, 0805, % Panasonic: ERJ-6ENF05V R0, R 0Ω, Resistor, 0805, 5% Panasonic: ERJ-6GEYJ00V Total Rev.0_0//04 www.monolithicpower.com 4
Figure : Top Silk Layer Figure 4: Top Layer Figure 5: Bottom Layer Figure 6: Bottom Silk Layer NOTICE: MPS believes the information in this document to be accurate and reliable. However, it is subject to change without notice. Please contact the factory for current specifications. No responsibility is assumed by MPS for its use or fit to any application, nor for infringement of patent or other rights of third parties. Rev.0 Monolithic Power Systems, Inc. 5 0//04 98 University Ave. Building A, Los Gatos, CA 950 USA 004 MPS, Inc. Tel: (408) 57-6600, Fax: (408) 57-660, Web: www.monolithicpower.com