Assembly AVR Boot loader

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Assembly AVR Boot loader Mariano Barrón Ruiz ispbarum@sb.ehu.es Introduction This document presents a software written in assembly for self-programming all AVR microcontrollers with Boot Loader Flash Section. The program uses the USART serial bus interface to read, program, or verify either the EEPROM or the Flash memory. Overview The ATMEL application note AVR109: Self-Programming describes a boot loader written in C and assembly. This software needs the IAR C compiler to generate the object code. The program is size optimized to 504 bytes. The boot loader presented in this document has been written in assembly, so you only need the AVR Studio to generate the object code. The program fills 382 bytes and supports the same commands as the AVR109 boot loader. The Boot loader, see the bold lines in source code, can use the Eeprom two last positions to count the reprogramming cycles of Flash memory (Flash endurance: 1000 write/erase cycles). On each chip erase, the boot loader increments the chip erase counter located at Eeprom addresses: last (counter high byte) and last-1 (counter low byte). In this case the code size increments to 412 bytes. On programming the Eeprom, user must take care not to overwrite the Eeprom two last positions. The boot loader starts by checking if programming is to be done, or if the user program in the Application Flash Section is to be executed. If a selected pin (PC0) is pulled low during reset, programming mode is entered. If this pin is high, normal execution is done from address $0000 as if an ordinary reset had occurred. After a reset, the I/O ports are configured as input ports with internal pull-up disabled, so the selected pin should be pulled high by an external pull-up resistor. In programming mode, the boot loader receives commands form AVRprog via the UART. AVRProg is a part of AVR Studio software but also you can get it separately. The communication uses 19200 bps, 8N1 (8 data bits, no parity bits and one stop bit). Each command executes an associated task Any command not recognized by the boot loader results in a? being sent back to AVRprog. Special Considerations The boot loader has been written for an ATmega163 with 7.3728 MHz clock, nevertheless it can be used with an ATmega16 without modification. In this case the ATmega16 will be recognized as an ATmega163. The first time you must program the boot loader code into the AVR Boot Flash Section using an external programmer. Next times, the boot loader enables Flash and EEPROM programming via de UART with a PC running the AVRProg programming software.

To avoid the user can unadvisedly protect the Application Flash Section from software updates, the Boot loader supports neither Fuse bits nor Lock bits programming. After programming a new ATmega163 with this boot loader you must program Fuse and Lock bits as follows: The ATmega163 Fuse High bits must be programmed to 0x04 in order to configure the Boot size to 256 words and to move the reset vector to word address 0x1f00. The Lock bits must be programmed to 0xEF to protect the Boot Flash Section from unintentional changes and to allow accessing the Application Flash Section. The Fuse bits must be programmed before programming the Lock bits. Source Code ;********** B O O T L O A D E R F O R A T m e g a 1 6 3 ********** ;* File : AVRBoot2.asm (Include chip erase counter) ;* Version : 1.3 ;* Compiler : AVR Studio ;* Target : ATmega163 ;* Output size : 412 bytes.equ DT = 0x66 ; Device Type = 0x66 (ATmega163).equ SB1 = 0x02 ; Signature byte 1.equ SB2 = 0x94 ; Signature byte 2.equ SB3 = 0x1e ; Signature byte 3.equ UBR = 23 ; Baud rate = 19.200 bps with fck = 7.3728 MHz.INCLUDE "m163def.inc".org SECONDBOOTSTART ; Include Register/Bit Definitions for the ATmega163 ; ($1F00) second boot. Block size is 512B sbic PINC,PINC0 ; Skip next instruction if PINC0 cleared rjmp FLASHEND+1 ; else normal execution from Reset (FLASHEND+1 = Address 0000) ; Programming mode ldi R24,low(RAMEND) ldi R25,high(RAMEND) out SPL,R24 out SPH,R25 ; SP = RAMEND ldi R24,UBR ; Baud rate = 19.200 bps out UBRR,R24 ldi R24,(1<<RXEN) (1<<TXEN) out UCSRB,R24 ; Enable receiver & transmitter, 8-bit mode ; data -> R22,R23 ; address -> R26,R27 L10: ; repeat (R16 = uartget) cpi R16,27 ; while (R16 == ESCAPE) breq L10 cpi R16,'a' brne L12 ldi R16,'Y' ; if(r16=='a') 'a' = Autoincrement? ; Autoincrement? Yes, autoincrement is quicker L12: cpi R16,'A' ; else if(r16=='a') write address brne L14 mov R27,R16 ; R27 <= address high byte mov R26,R16 ; R26 <= address low byte lsl R26 ; address=address<<1 rol R27 ; convert from word address to byte address

L14: cpi R16,'c' ; else if(r16=='c') write program memory, low byte brne L16 mov R22,R16 ; R22 <= data low byte L16: cpi R16,'C' ; else if(r16=='c') write program memory, high byte brne L18 mov R23,R16 ; R23 <= data high byte movw R30,R26 ; Z pointer <= address movw R0,R22 ; R0&R1 <= data ldi R24,(1<<SPMEN); page load (fill temporary buffer) rcall Do_SPM ; do fill temporary buffer adiw R26,2 ; address=address+2 L18: cpi R16,'e' ; else if(r16=='e') Chip erase brne L28 ; for(address=0; address < (2*SECONDBOOTSTART); address += (2*PAGESIZE)) clr R26 ; page_erase(); clr R27 rjmp L24 L20: movw R30,R26 ; Z pointer <= address ldi R24,(1<<PGERS) (1<<SPMEN) out SPMCR,R24 ; page_erase rcall Do_SPM ; do page_erase ldi R24,(1<<ASRE) (1<<SPMEN) ; Re-Enable the RWW section rcall Do_SPM ; do Enable RWW section subi R26,low(-2*PAGESIZE) ; address += (2*PAGESIZE) sbci R27,high(-2*PAGESIZE) L24: ldi R24,low(2*SECONDBOOTSTART) ldi R25,high(2*SECONDBOOTSTART) cp R26,R24 ; address < Boot Flash address (byte address) 0x3E00? cpc R27,R25 brlo L20 ldi R26,low(E2END-1) ; increment Chip Erase Counter located ldi R27,high(E2END-1); at address E2END-1 movw R22,R26 ; Save Chip Erase Counter Address in R22 ldi R17,1 ; read EEPROM mov R24,R16 ; R24 <- Chip Erase Counter low byte mov R25,R16 ; R25 <- Chip Erase Counter high byte adiw R24,1 ; counter ++ out EEDR,R24 ; EEDR <- R24 Chip Erase Counter low byte movw R26,R22 ; R26 = Chip Erase Counter Address ldi R17,6 ; write EEPROM out EEDR,R25 ; EEDR <- R25 Chip Erase Counter high byte L28: cpi R16,'m' ; else if(r16== 'm') Write page brne L34 movw R30,R26 ; Z pointer <- address ldi R24,(1<<PGWRT) (1<<SPMEN) ; Write page rcall Do_SPM ; do Write page ldi R24,(1<<ASRE) (1<<SPMEN) ; Re-Enable the RWW section rcall Do_SPM ; do Enable RWW section L32: L34: cpi R16,'P' ; else if(r16=='p') Enter programming mode breq L32 cpi R16,'L' ; else if(r16=='l') Leave programming mode breq L32 cpi R16,'p' brne L38 ldi R16,'S' ; else if (R16=='p') Return programmer type ; uartsend('s') Serial L38: cpi R16,'R' ; else if(r16=='r') Read program memory brne L40 movw R30,R26 ; Z pointer <= address

lpm R24,Z+ ; read program memory LSB; store LSB in R24 and Z pointer ++ lpm R16,Z+ ; read program memory MSB; store MSB in R16 and Z pointer ++ rcall uartsend MSB movw R26,R30 ; address += 2 mov R16,R24 ; LSB stored in R16 LSB L40: cpi R16,'D' ; else if (R16=='D') Write data to EEPROM brne L42 out EEDR,R16 ; EEDR = uartget() ldi R17,6 ; write EEPROM L42: cpi R16,'d' ; else if (R16=='d') Read data from EEPROM brne L44 ldi R17,1 ; read EEPROM ; R16 = EEPROM data L44: cpi R16,'F' ; else if(r16=='f') Read fuse bits brne L46 clr R30 ; Z pointer = 0000 rjmp L50 ; rcall readfuseandlock L46: cpi R16,'r' ; else if(r16=='r') Read lock bits brne L48 ldi R30,1 ; Z pointer = 0001 rjmp L50 ; rcall readfuseandlock L48: cpi R16,'N' ; else if(r16=='n') Read high fuse bits brne L52 ldi R30,3 ; Z pointer = 0003 L50: rcall readfuseandlock L52: cpi R16,'t' ; else if(r16=='t') Return supported devices code brne L54 ldi R16,DT ; Device Type rcall uartsend ; uartsend(dt) send Device Type clr R16 ; uartsend(0) L54: ; else if ((R16=='l') (R16=='x') (R16=='y') (R16=='T')) cpi R16,'l' ; 'l' = Write Boot Loader Lockbits cpi R16,'x' ; 'x' = Set LED cpi R16,'y' ; 'y' = Clear LED cpi R16,'T' ; 'T' = Select device type brne L60 L56: ; R16 = uartget() ; YOU CAN INSERT LEDs CODE HERE L60: cpi R16,'S' ; else if (R16=='S') Return software identifier brne L62 ldi R30,low(2*Soft_Id) ldi R31,high(2*Soft_Id) L61: lpm R16,Z+ tst R16 breq L72 ; branch is end of string ((Z) == 0) rcall uartsend ; else send char rjmp L61 L62: cpi R16,'V' ; else if (R16=='V') Return Software Version brne L64 ldi R16,'1' ; uartsend('1') rcall uartsend ldi R16,'3' ; uartsend('3') L64: cpi R16,'s' ; else if (R16=='s') Return Signature Byte brne L66 ldi R16,SB1 ; uartsend(sb1) Signature Byte 1

rcall uartsend ldi R16,SB2 ; uartsend(sb2) Signature Byte 2 rcall uartsend ldi R16,SB3 ; uartsend(sb3) Signature Byte 3 L66: ldi R16,'?' ; else uartsend('?') L68: ldi R16,13 L70: rcall uartsend L72: rjmp L10 readfuseandlock: clr R31 ; Z pointer high byte = 0 ldi R24,9 ; SPMCR = 0x09 out SPMCR,R24 ; read fuse and lock lpm R16,Z ; read program memory EepromTalk: ; if R17 = 6 write, if R17 = 1 read out EEARL,R26 ; EEARL = address low out EEARH,R27 ; EEARH = address high adiw R26,1 ; address++ sbrc R17,1 ; skip if R17 == 1 (read Eeprom) sbi EECR,EEMWE ; EEMWE = 1 (write Eeprom) out EECR,R17 ; EECR = R17 (6 write, 1 read) L90: sbic EECR,EEWE ; wait until EEWE == 0 rjmp L90 in R16,EEDR ; R16 = EEDR Do_SPM: ; check for previous SPM complete Wait_SPM: ; wait until page erase (or page write) is completed in R20,SPMCR ; SPMEN==0 after page erase or page write completed sbrc R20,SPMEN ; skip if bit SPMEN in SPMCR is cleared rjmp Wait_SPM L92: sbic EECR,EEWE ; wait until EEWE == 0 rjmp L92 ; check that no EEPROM write access is running out SPMCR,R24 spm ; store program memory.dw 0xffff ; ensure proper instruction pipelining after nop ; programming (mega163, mega323,...) uartsend: sbis UCSRA,UDRE rjmp uartsend out UDR,R16 uartget: sbis UCSRA,RXC rjmp uartget in R16,UDR ; send R16 ; wait for empty transmit buffer (until UDRE==1) ; UDR = R16, start transmission ; wait for incoming data (until RXC==1) ; urn received data in R16 Soft_Id:.DB "AVRB163", 0 ; END of BOOT LOADER PROGRAM