Introduction to Microprocessor Slide 1
Microprocessor A microprocessor is a multipurpose, programmable, clock-driven, register-based electronic device That reads binary instructions from a storage device called memory accepts binary data as input and processes data according to instructions, and provides result as output. Slide 2
Microprocessor A microprocessor consists of multiple internal function units. A basic design has an arithmetic logic unit (ALU), a control unit, a memory interface, an interrupt or exception controller, and an internal cache. Slide 3
Microprocessor Microprocessor is the controlling unit or CPU of a micro-computer, fabricated on a very small chip capable of performing ALU operations and communicating with the external devices connected to it. It acts as the brain of the computer system. Slide 4
Microprocessor Data Cache RAM I/O Memory Bus System Bus Bus Interface Unit Control Unit Instruction Decoder Instruction Cache Arithmetic & Logic Unit Registers Floating Point Unit Registers Slide 5
Microcomputer A digital computer, in which one microprocessor has been provided to act as a CPU, is called Microcomputer. contain one or more microprocessor to act as CPU A microcomputer contains CPU: processes information stored in the memory» Microprocessor Memory: stores both instructions and data ROM, RAM Slide 6
Microcomputer Input/Output ports: provide a means of communicating with the CPU Connecting I/O devices, e.g., keyboard, monitor, tape, disk, printer and etc. BUS: interconnecting all parts together Address bus Data bus Control bus Slide 7
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Evolution of Microprocessors 1 ST GENERATION 2 ND GENERATION 3 RD GENERATION 4 TH GENERATION 5 TH GENERATION BY GENERATION Slide 9
1 ST GENERATION (1971-1973) Designed with PMOS technology This technology provided Low cost Slow speed Low output current Was not compatible with TTL Generally 4 bit processors processed their instructions serially they fetched the instruction, decoded it, then executed it. When an instruction was completed, the microprocessor updated the instruction pointer and fetched the next instruction, performing this sequential drill for each instruction in turn. Example Intel 4004, Intel 4040, Intel 8008 Slide 10
2 nd GENERATION (1974-1978) Designed with NMOS technology This technology provided Faster speed High density than PMOS TTL compatible Generally 8 bit processors Overlapped fetch, decode, and execute steps the first instruction is processed in the execution unit, the second instruction is decoded and the third instruction is fetched. Examples are Motorola 6800/6809, Intel 8085/8080 Slide 11
3 rd GENERATION (1979-1980) Designed with HMOS technology Speed-power-product of HMOS is four times better than that of NMOS HMOS can accommodate twice the circuit density compared to NMOS incorporated an on-chip cache for the first time The depth of the pipeline increased to five or more stages. Generally 16 bit processors All major workstation manufacturers began developing their own RISC-based microprocessor architectures. Examples are Motorola 68000/68010 Intel 8086/80186/80286 Slide 12
4 th GENERATION (1981-1995) Designed with HCMOS technology Commercial microprocessors to in-house design. Designs surpassing a million transistors. Generally 32 bit processors Examples are Motorola s MC 68020/68030 Intel 80386/80486/80586 Slide 13
5 th GENERATION (1995-Till) emphasis is on introducing chips that carry on-chip functionalities improvements in the speed of memory and I/O devices along with introduction of 64 bit microprocessors. processors working with up to 3.5GHz speed. Examples are Pentium Pro, Pentium II core i7 Slide 14
Evolution of Microprocessors Based on word size 4-Bit Microprocessors 8-Bit Microprocessors 16-Bit Microprocessors 32-Bit Microprocessors 64-Bit Microprocessors Slide 15
4-BIT MICROPROCESSORS TMS 1000 INTEL 4004 Slide 16
INTEL 4004 Introduced in 1971. It was the first microprocessor by Intel. Its data bus is 4-bit and address bus is 10-bit. It has 16 pins. PMOS Technology. Its clock speed was 740KHz. It had 2,300 transistors. It could execute around 60,000 instructions per second. 45 instructions 4KB main memory First programmable device which was used in calculators, was not designed as a general purpose computer. CMOS VLSI Design Slide 17
8-BIT MICROPROCESSORS INTEL 8008 INTEL 8080 INTEL 8085 Motorolla 6800/6809 Slide 18
INTEL 8008 Introduced in 1972. It was first 8-bit µp. It was 8-bit version of 4004 Its data bus is 8-bit and address bus is 14-bit. It has 18 pins. Its clock speed was 500 KHz. Could execute 50,000 instructions per second It had 3500 transistors 16KB main memory. 48 instructions PMOS Technology slow Slide 19
INTEL 8080 Introduced in 1974. It was also 8-bit µp. Its clock speed was 2 MHz. It had 6,000 transistors. Was 10 times faster than 8008. Its data bus is 8-bit and address bus is 16-bit. It has 40 pins. Could execute 5,00,000 instructions per second. 64 KB main memory. NMOS Technology Drawback was that it needed three power supplies. Small computers (microcomputers) were designed in using 8080 as CPU. Slide 20
INTEL 8085 Introduced in 1976. It was also 8-bit µp upgraded version of 8080 Its clock speed was 3-6 MHz. Its data bus is 8-bit and address bus is 16-bit. It has 40 pins. It had 6,500 transistors. Could execute 7,69,230 instructions per second. It could access 64 KB of memory. It had 246 instructions. 64 KB main memory. Use only one +5V power supply. Slide 21
16-BIT MICROPROCESSORS INTEL 8086 INTEL 8088 INTEL 80186 INTEL 80286 Motorola 68000/68010 Slide 22
INTEL 8086 Introduced in 1978. It was first 16-bit µp. Its clock speed is 5-10 MHz Its data bus is 16-bit and address bus is 20-bit. It has 40 pins. It had 29K transistors. Could execute 2.5 million instructions per second. 1 MB main memory. It had 22,000 instructions. It had Multiply and Divide instructions. Slide 23
INTEL 8088 Introduced in 1979. It was also 16-bit µp. Its clock speed is 5-10 MHz It had 29K transistors. Its data bus is 16-bit and address bus is 20-bit. It has 40 pins. Could execute 2.5 million instructions per second. 1 MB main memory. Slide 24
INTEL 80186 Introduced in 1982. They were 16-bit µps. Clock speed was 5-16 MHz. Its data bus is 8-bit and address bus is 20-bit. It has 68 pins. It had 29K transistors. 1 MB main memory. Never used in the PC. They had additional components like: Interrupt Controller Clock Generator Local Bus Controller Counters Slide 25
INTEL 80286 Introduced in 1982. It was 16-bit µp. Its clock speed was 6-12.5 MHz. Its data bus is 16-bit and address bus is 24-bit. 16 MB real and 4GB virtual memory. It has 68 pins. It had 134K transistors. It could execute 4 million instructions per second. Slide 26
32-BIT MICROPROCESSORS INTEL 80386 INTEL 80486 INTEL PENTIUM INTEL PENTIUM PRO INTEL PENTIUM II INTEL PENTIUM III INTEL PENTIUM IV Motorola s MC 68020/68030 Slide 27
INTEL 80386 Introduced in 1986. It was first 32-bit µp. Its data bus is 32-bit and address bus is 24/32-bit. 4 GB main memory. 4 GB real and 64 TB virtual memory. It has 132 pins. It had 275K transistors. Its clock speed is 20-33 MHz Different versions are 80386 DX 80386 SX 80386 SL CMOS VLSI Design Slide 28
INTEL 80486 Introduced in 1989. It was also 32-bit µp. It had 3200K transistors. Its clock speed is 25-100 MHz Its data bus is 32-bit and address bus is 32-bit. 4 GB real and 64 TB virtual memory. It has 168 pins. Integrated numeric coprocessor 8 KB of cache memory was introduced It had five different versions: 80486 DX 80486 SX 80486 DX2 80486 SL 80486 DX4 Slide 29
INTEL PENTIUM Introduced in 1993. It was also 32-bit µp. It was originally named 80586. Its clock speed was 60-200 MHz. Its data bus is 32-bit and address bus is 32-bit. It had 3200K transistors. It has 4 GB real memory. It has 264 pins. Could execute 110 million instructions per second. 16KB L1 Cache memory: 8 KB for instructions and 8 KB for data. Slide 30
INTEL PENTIUM PRO Introduced in 1995. It was also 32-bit µp. It had L2 cache of 256 KB. It had 5500K transistors. Its clock speed was 150-200 MHz. It has 387 pins. Its data bus is 32-bit and address bus is 36-bit. It has 64 GB main memory. 16KB L1 Cache memory(8 KB for instructions. 8 KB for data) and L2 cache of 256 KB. Intel launched this processor for the server market. Slide 31
INTEL PENTIUM II Introduced in 1997. It was also 32-bit µp. Its clock speed was 233 MHz to 500 MHz. It had 7500K transistors. It has 387 pins. Its data bus is 32-bit and address bus is 36-bit. 64 GB main memory. Could execute 333 million instructions per second. 512KB L2 cache & processor were on one circuit. Designed specially to process video, audio and graphics efficiently. Slide 32
INTEL PENTIUM III Introduced in 1999. It was also 32-bit µp. Its clock speed varied from 600 MHz to 1.4 GHz. Its data bus is 32-bit and address bus is 36-bit. 64 GB main memory. It had 9500K transistors. It has 387 pins. Dual independent Bus(simultaneous L2 and system memory access) Designed significantly enhance internet experiences. Slide 33
INTEL PENTIUM IV Introduced in 2000. It was also 32-bit µp. Its clock speed was from 1.3 GHz to 3.8 GHz. Its data bus is 32-bit and address bus is 36-bit. 64 GB main memory. 1MB/512KB/256KB L2 cache. It had 42 million transistors. It has 387 pins. Specialized for streaming video, game and DVD applications. Slide 34
64-BIT MICROPROCESSORS INTEL DUAL CORE INTEL CORE 2 INTEL CORE I7 INTEL CORE I5 INTEL CORE I3 Slide 35
INTEL DUAL CORE Introduced in 2006. It is 64-bit µp. It had 1,72 billion transistors. Its clock speed was 2.93GHz Its data bus is 64-bit and address bus is 40-bit. It has two cores. Both the cores have there own internal bus and L1 cache, but share the external bus and L2 cache Slide 36
INTEL CORE 2 Introduced in 2006. It is a 64-bit µp. Its clock speed is 3.16 GHz. It has 775 pins. It has 410 million transistors. Its data bus is 64-bit and address bus is 40-bit. It has 64 KB of L1 cache per core and 4 MB of L2 cache. It has single, double or quad cores. It is launched in three different versions: Intel Core 2 Duo Intel Core 2 Quad Intel Core 2 Extreme Slide 37
INTEL CORE I7 Introduced in 2008. It is a 64-bit µp. It has 4 physical cores. Its clock speed is from 2.66 GHz to 3.33 GHz. It has 781 million transistors. It has 64 KB of L1 cache per core, 256 KB of L2 cache and 8 MB of L3 cache. Slide 38
INTEL CORE I5 Introduced in 2009. It is a 64-bit µp. It has double or quad cores. Its clock speed is from 2.40 GHz to 3.60 GHz. It has 781 million transistors. It has 64 KB of L1 cache per core, 256 KB of L2 cache and 8 MB of L3 cache. Slide 39
INTEL CORE I3 Introduced in 2010. It is a 64-bit µp. It has 2 physical cores. Its clock speed is from 2.93 GHz to 3.33 GHz. It has 781 million transistors. It has 64 KB of L1 cache per core, 512 KB of L2 cache and 4 MB of L3 cache. Slide 40
summury Slide 41