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Midas Components Limited Electra House 32 Southtown Road Great Yarmouth Norfolk NR31 DU England Telephone +44 ()1493 6262 Fax +44 ()1493 665111 Email sales@midasdisplays.com Website www.midasdisplays.com Specification Part Number: Version: Date: Revision No. Date Description Item Page

Midas LCD Part Number System MC COG 13233 A 6 W S N T L W 1 2 3 4 5 6 7 8 9 1 11 12 13 14 15 16 1 = MC: Midas Components 2 = Blank: COB (chip on board) COG: chip on glass 3 = No of dots (e.g. 2464 = 24 x 64 dots) (e.g. 2165 = 2 x 16 5mm C.H.) 4 = Series 5 = Series Variant: A to Z see addendum 6 = 3: 3 o clock 6: 6 o clock 9: 9 o clock 12: 12 o clock 7 = S: Normal ( to + 5 deg C) W: Wide temp. (-2 to + 7 deg C) X: Extended temp (-3 + 8 Deg C) 8 = Character Set Blank: Standard (English/Japanese) C: Chinese Simplified (Graphic Displays only) CB: Chinese Big 5 (Graphic Displays only) H: Hebrew K: European (std) (English/German/French/Greek) L: English/Japanese (special) M: European (English/Scandinavian) R: Cyrillic W: European (English/Greek) U: European (English/Scandinavian/Icelandic) 9 = Bezel Height (where applicable /available) Top of Bezel to Top of PCB LED Connection Common (via pins 1 and 2) Array or Edge Lit Blank 9.5mm / not applicable via pins 15+ 16- Array 2 8.9 mm Common Array 3 7.8 mm Separate Array 4 7.8 mm Common Array 5 9.5 mm Separate Array 6 7 mm Common Array 7 7 mm Separate Array 8 6.4 mm Common Edge 9 6.4 mm Separate Edge A 5.5 mm Common Edge B 5.5 mm Separate Edge D 6.mm Separate Edge E 5.mm Separate Edge F 4.7mm Common Edge G 3.7mm Separate EL H 7 mm Separate Edge 1 = T: TN S: STN B: STN Blue G: STN Grey F: FSTN F2: FFSTN V: VA (Vertically Aligned) 11 = P: Positive N: Negative 12 = R: Reflective M: Transmissive T: Transflective 13 = Backlight: Blank: Reflective L: LED 14 = Backlight Colour: Y: Yellow-Green W: White B: Blue R: Red A: Amber O: Orange G: Green RGB: R.G.B. 15 = Driver Chip: Blank: Standard I: I 2 C S: SPI T: Toshiba T6963C A: Avant SAP124B R: Raio RA6963 16 = Voltage Variant: e.g. 3 = 3v F/Displays/Midas Brand/Midas LCD Part Number System 16 Oct 213.doc

Contents 1. Precautions in use of LCD Modules 2. General Specification 3. Absolute Maximum Ratings 4. Electrical Characteristics 5. Optical Characteristics 6. Interface Pin Function 7. Power Supply 8. Contour Drawing & Block Diagram 9. Function Description 1. Character Generator ROM Pattern 11. Instruction Table 12. Timing Characteristics 13. Initializing of LCM 14. Quality Assurance 15. Reliability

1. Precautions in use of LCD Modules (1) Avoid applying excessive shocks to the module or making any alterations or modifications to it. (2) Don t make extra holes on the printed circuit board, modify its shape or change the components of LCD module. (3) Don t disassemble the LCM. (4) Don t operate it above the absolute maximum rating. (5) Don t drop, bend or twist LCM. (6) Soldering: only to the I/O terminals. (7) Storage: please storage in anti-static electricity container and clean environment. 2. General Specification N umber Item of Characters Dimension 8 characters x 2 Lines Unit Module dimension (Without LED Backlight) 25. x 17.5 x 4.3 (MAX) mm View area 21. x 9. mm Active area 17.6 x 6. mm Dot size.345 x.345 mm Dot pitch.375 x.375 mm Character size Character pitch LCD type Duty View direction Backlight Type 1.845x 2.595 2.25 x 3.45 STN,GRAY, Reflective 1/16 6 o clock Yellow-green LED Backlight mm mm

3. Absolute Maximum Ratings Item Symbol Min Max Unit Input Voltage VI -.3 VDD+.3 V Supply Voltage For Logic VDD-V SS -.3 7. V Supply Voltage For LCD V DD -V Vdd-13.5 V Normal Temperature Operating Temp. Top 5 C LCM Storage Temp. Tstr -2 7 C 4. Electrical Characteristics Item Symbol Condition Min Typ Max Unit Supply Voltage For Logic V DD -V SS 4.5 5. 5.5 V Supply Voltage For LCD V DD -V Ta=25 C 2.9 3.4 3.9 V Input High Volt. V IH.7 V DD V DD V Input Low Volt. V IL V SS.3 V DD V Supply Current I DD V DD =5V.5 1.2 1.5 ma Supply Voltage of Yellow-green backlight V LED Forward current =15 ma Number of LED die 1x1= 1 2.9 3.1 3.3 V

5. Optical Characteristics Item Symbol Condition Min Typ Max Unit View Angle (V CR 2-2 35 deg (H CR 2-3 3 deg Contrast Ratio CR 3 Response Time T rise 25 ms T fall 25 ms Definition of Operation Voltage (Vop) Definition of Response Time (Tr, Tf) Intensity 1 Selected Wave Non-selected Wave Non-selected Conition Intensity Selected Conition Non-selected Conition 1 Cr Max Cr = Lon / Loff 1 9 Vop [positive type] Driving Voltage(V) Tr [positive type] Tf Conditions: Operating Voltage: Vop Viewing Angle ): Frame Frequency: 64 HZ Driving Waveform: 1/N duty, 1/a bias Definition of viewing angle (CR 2) b f = 18 l r = 27 = 9 =

6. Interface Pin Function Pin No. Symbol Level 1 V SS V Ground 2 V DD 5.V Supply Voltage for logic 3 V (Variable) Operating voltage for LCD 4 RS H/L H: DATA, L: Instruction code Descr iption 5 R/W H/L H: Read(MP Module) L: Write(MP Module) 6 E H, L Chip enable signal 7 DB H/L Data bit 8 DB1 H/L Data bit 1 9 DB2 H/L Data bit 2 1 DB3 H/L Data bit 3 11 DB4 H/L Data bit 4 12 DB5 H/L Data bit 5 13 DB6 H/L Data bit 6 14 DB7 H/L Data bit 7 15 LED(-) Cathode of LED Backlight 16 LED(+) Anode of LED Backlight

7. Power Supply SINGLE SUPPLY VOLTAGE TYPE

8. Contour Drawing & Block Diagram

9. Function Description The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an instruction register (IR) and a data register (DR). The IR stores instruction codes, such as display clear and cursor shift, and address information for display data RAM (DDRAM) and character generator (CGRAM). The IR can only be written from the MPU. The DR temporarily stores data to be written or read from DDRAM or CGRAM. When address information is written into the IR, then data is stored into the DR from DDRAM or CGRAM. By the register selector (RS) signal, these two registers can be selected. RS R/W Operation IR write as an internal operation (display clear, etc.) 1 Read busy flag (DB7) and address counter (DB to DB7) 1 Write data to DDRAM or CGRAM (DR to DDRAM or CGRAM) 1 1 Read data from DDRAM or CGRAM (DDRAM or CGRAM to DR) Busy Flag (BF) When the busy flag is 1, the controller LSI is in the internal operation mode and the next instruction will not be accepted. When RS= and R/W=1, the busy flag is output to DB7. The next instruction must be written after ensuring that the busy flag is. Address Counter (AC) The address counter (AC) assigns addresses to both DDRAM and CGRAM Display Data RAM (DDRAM) This DDRAM is used to store the display data represented in 8-bit character codes. Its extended capacity is 8 8 bits or 8 characters. Below figure is the relationship between DDRAM addresses and positions on the liquid crystal display. High bits Low bits Example: DDRAM addresses 4E AC (hexadecimal) AC6 AC5 AC4 AC3 AC2 AC1 AC 1 1 1 1

Display position DDRAM address 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 4 41 42 43 44 45 46 47 -Line by 8-Character Display Character Generator ROM (CGROM) The CGROM generate 5 8 dot or 5 1 dot character patterns from 8-bit character codes. See Table 2. Character Generator RAM (CGRAM) In CGRAM, the user can rewrite character by program. For 5 8 dots, eight character patterns can be written, and for 5 1 dots, four character patterns can be written. Write into DDRAM the character code at the addresses shown as the left column of table 1. To show the character patterns stored in CGRAM.

Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character patterns Table.1 For 5 8 dot character patterns Character Codes CGRAM Address ( D D R A M data ) C haracter P atterns ( C G R A M data ) 7 6 5 4 3 2 1 5 4 3 2 1 7 6 5 4 3 2 1 H igh L ow H igh L ow H igh L ow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Character pattern( 1 ) Cursor pattern Character pattern( 2 ) Cursor pattern 1 1 1 For 5 1 dot character patterns 7 Character Codes ( D D R A M data ) 6 5 4 3 2 1 H igh L ow 1 1 1 1 1 1 1 1 1 1 1 CGRAM Address H igh 5 4 3 2 1 L ow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C haracter P atterns ( C G R A M data ) 7 6 5 4 3 2 1 H igh L ow Character pattern Cursor pattern : " H igh " 1 1 1 1

1. Character Generator ROM Pattern Table.2

11. Instruction Table Instruction Instruction Code RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB Description Exe cution time (fosc=27khz) Clear Display 1 Write H to DDRAM and se t DDRAM address to H from AC 1.53ms Return Home 1 Entry Mode Set Display ON/OFF Con trol Cursor or Display Shift 1 I/D SH 1 D C B 1 S/C R/L Function Set 1 DL N F Set CGRAM Address Set DDRAM Address Read Busy Flag and Address Writ e Data to RAM Set DDRAM address to H from AC and return cursor to its original position if shifted. The contents of DDRAM are not changed. Assign cursor moving direction and enable the shift of entire display. Set display (D), cursor (C), and blinking of cursor (B) on /o control bit. Set cursor moving and display shift control bit, and the direction, without changing of DDRAM data. Set interface data length (DL:8-bit/4-bit), numbers of display line (N:2-line/1-line)and, display font type (F:5 11 dots/5 8 dots) 1.53ms 1 AC5 AC4 AC3 AC2 AC1 AC Set CGRAM address in address counter. 3 1 AC6 AC5 AC4 AC3 AC2 AC1 AC Set DDRAM address in address counter. 3 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC 1 D7 D6 D5 D4 D3 D2 D1 D Whether during internal operation or not can be known by reading BF. The contents of address counter can also be read. Write data into internal RAM (DDRAM/CGRAM). 3 3 3 3 4 Read Data from RAM 1 1 D7 D6 D5 D4 D3 D2 D1 D Read data from internal RAM (DDRAM/CGRAM). 4 disregard

12. Timing Characteristics 12.1 Write Operation RS t AS t AH R/W E t Er PW EH t DSW t AH t Ef t H DB to DB7 Valid data t cyce Ta=25 C, VDD=5.±.5V Item Symbol Min Typ Max Unit Enable cycle time t cyce 12 ns Enable pulse width (high level) PW EH 14 ns Enable rise/fall time t Er,t Ef 25 ns Address set-up time (RS, R/W to E) t AS ns Address hold time t AH 1 ns Data set-up time t DSW 4 ns Data hold time th 1 ns

12.2 Read Operation RS t AS t AH R/W E t Er PW EH t DDR t AH t Ef t DHR DB to DB7 VOH1 VOL1 Valid data t cyce VOH1 VOL1 NOTE: VOL1 is assumed to be.8v at 2 MHZ operation. Ta=25 C, VDD=5.±.5V Item Symbol Min Typ Max Unit Enable cycle time t cyce 12 ns Enable pulse width (high level) PW EH 14 ns Enable rise/fall time t Er,t Ef 25 ns Address set-up time (RS, R/W to E) t AS ns Address hold time t AH 1 ns Data delay time t DDR 1 ns Data hold time tdhr 1 ns

12.3 Timing Diagram of VDD Against V. Power on sequence shall meet the requirement of Figure 4, the timing diagram of VDD against V.

13. Initializing of LCM Power on Wait for more than 4 ms after VDD rises to 4.5 V RS R/W DB7 DB6 DB5 DB4 DB3 1 1 DB2 DB1 DB BF can not be checked before this instruction. Function set Wait for more than 39us RS R/W DB7 DB6 N F DB5 DB4 DB3 1 DB2 DB1 DB BF can not be checked before this instruction. Function set Wait for more than 39 μs RS R/W DB7 N DB6 F DB5 DB4 DB3 1 BF can not be checked before this instruction. DB2 DB1 DB Function set Wait for more than 37us RS R/W DB7 1 DB6 D DB5 C DB4 B DB3 DB2 DB1 DB Display ON/OFF control Wait for more than 37 μs RS R/W DB7 DB6 DB5 DB4 1 DB3 DB2 DB1 DB Display Clear Wait for more than 1.53ms RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 I/D SH Entry Mode Set Initialization ends 4-Bit Ineterface

Power on Wait for more than 4 ms after VDD rises to 4.5 V RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 1 N F BF can not be checked before this instruction. Function set Wait for more than 39us RS R/W DB7 DB6 DB5 1 DB4 1 DB3 N DB2 DB1 DB F BF can not be checked before this instruction. Function set Wait for more than 37us RS R/W DB7 DB6 DB5 DB4 DB3 DB2DB1 DB 1 B C D Display ON/OFF control Wait for more than 37 μs RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 Display Clear Wait for more than 1.53ms RS R/W DB7 DB6 DB5DB4 DB3 DB2 DB1 DB 1 I/D S Entry Mode Set Initialization ends 8-Bit Ineterface

14. Quality Assurance Screen Cosmetic Criteria Item Defect 1 Spots 2 Bubbles in Polarizer 3 Scratch 4 Allowable Density 5 Coloration Judgment Criter ion Par tition A)Clear Size: d mm Acceptable Qty in active area d.1 Disregard.1<d.2 6.2<d.3 2.3<d Note: Including pin holes and defective dots which must be within one pixel size. Minor B)Unclear Size: d mm Acceptable Qty in active area d.2 Disregard.2<d.5 6.5<d.7 2.7<d Size: d mm Acceptable Qty in active area d.3 Disregard.3<d 1. 3 Minor 1.<d 1.5 1 1.5<d In accordance with spots cosmetic criteria. When the light reflects on the panel surface, the scratches are not to be Minor remarkable. Above defects should be separated more than 3mm each Minor other. Not to be noticeable coloration in the viewing area of the LCD panels. Back-light type should be judged with back-light on state Minor only.

15. Reliability Content of Reliability Test Environmental Test Test Item High Temperature storage Low Temperature storage High Temperature Operation Low Temperature Operation High Temperature/ Humidity Storage High Temperature/ Humidity Operation Temperature Cycle Mechanical Test Content of Test Endurance test applying the high storage temperature for a long time. Endurance test applying the high storage temperature for a long time. Endurance test applying the electric stress (Voltage & Current) and the thermal stress to the element for a long time. Endurance test applying the electric stress under low temperature for a long time. Endurance test applying the high temperature and high humidity storage for a long time. Endurance test applying the electric stress (Voltage & Current) and temperature / humidity stress to the element for a long time. Endurance test applying the low and high temperature cycle. -2 C 25 C 7 C 3min 5min 3min 1 cycle Test Condition 7 C 96hrs -2 C 96hrs 5 C 96hrs C 96hrs 7 C, 9%RH 96hrs 5 C, 9%RH 96hrs -2 7 C 1 cycles Applicable Standard Vibration test 1~22H 1.5mmp-p Endurance test applying the vibration 22~5Hz 1.5G during transportation and using. Total.5hrs Shock test 5G Half sign Constructional and mechanical endurance wave 11 msedc test applying the shock during 3 times of each transportation. direction Supply voltage for logic system=5v. Supply voltage for LCD system =Operating voltage at 25 C