ECE 154A Introduction to Computer Architecture Fall 2012 Dmitri Strukov Lecture 4: Arithmetic and Data Transfer Instructions
Agenda Review of last lecture Logic and shift instructions Load/store instructionsi
Last Lecture
CPU Overview
with muxes
Assembly Language Basic job of a CPU: execute lots of instructions Instructions are the primitive operations that the CPU may execute Different CPUs implement different sets of instructions Instruction Set Architecture (ISA) is a set of instructions a particular CPU implements Examples: Intel 80x86 (Pentium 4), IBM/Motorola Power PC (Macintosh), MIPS, Intel IA64, ARM
High Level Language Program (e.g., C) Compiler Assembly Language Program (e.g.,mips) Assembler Machine Language Program (MIPS) Machine Interpretation Hardware Architecture Description (e.g., block diagrams) Architecture Implementation Logic Circuit Description (Circuit Schematic Diagrams) Below the Program temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw $t0, 0($2) lw $t1, 4($2) sw $t1, 0($2) sw $t0, 4($2) 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111
Instruction Syntax: MIPS Syntax [Label:] Op code [oper. 1], [oper. 2], [oper.3], ],[#comment] (0) (1) (2) (3) (4) (5) Where 1) operation name 2,3,4) operands 5) comments 0) label field is optional, will discuss later For arithmetic and logic instruction 2) operand getting result ( destination ) 3) 1 st operand for operation ( source 1 ) 4) 2 nd d f i ( 2 4) 2 nd operand for operation (source 2 Syntax is rigid 1 operator, 3 operands Why? Keep hardware simple via regularity
Assembly Variables: Registers Unlike HLL like C or Java, assembly cannot use variables Why not? Keep hardware simple Assembly Operands are registers Limited i number of special illocations built directly into the hardware Operations can only be performed on these Benefit: Since registers file is small, it is very fast
Assembly Variables: Registers By convention, each register also has a name to make it easier to code For now: $16 $23 $s0 $s7 (correspond to C variables) $8 $15 $t0 $t7 (correspond to temporary variables) Will explain other 16 register names later In general, use names to make your code more readable
$0 $1 $2 $3 $4 $5 $6 $7 $8 $9 $10 $11 $12 $13 $14 $15 $16 $17 $18 $19 $20 $21 $22 $23 $24 $25 $26 $27 $28 $29 $30 $31 0 $zero $at Reserved for assembler use $v0 Procedure results $v1 $a0 $a1 Procedure Saved $a2 arguments $a3 $t0 $t1 $t2 $t3 Temporary $t4 values $t5 $t6 $t7 $s0 $s1 $s2 Saved $s3 across Operands $s4 procedure $s5 calls $s6 $s7 $t8 More $t9 temporaries $k0 $k1 $gp $sp $fp $ra Reserved for OS (kernel) Global pointer Stack pointer Frame pointer Return address Saved A 4-byte word sits in consecutive memory addresses according to the big-endian order (most significant byte has the lowest address) When loading a byte into a register, it goes in the low end 3 2 1 0 Byte numbering: 3 2 1 0 Doublew ord Word Byte A doubleword sits in consecutive registers or memory locations according to the big-endian order (most significant word comes first) Register Conventions
Instruction formats R format: op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits I format: op rs rt constant or address 6 bits 5 bits 5 bits 16 bits J format: op address 6 bits 26 bits ECE 15B Spring 2011
Instruction formats Why stick to fixed formats? rigid and just few formats + fixed instruction size simple decoding faster clock cycle ( hopefully faster execution) note that it is always a tradeoff: too rigid and simple instruction set could be result in the large number of instructions several visual example later
Arithmetic Instructions
Addition and Subtraction of Integers Addition in assembly Example: add $s0, $s1, $s2 (in MIPS) Equivalent to: a = b + c (in C) Where MIPS registers $s0, $s1, $s2 are associated with C variables a, b, c Subtraction in Assembly Example Sub $s3, $s4, S5 (in MIPS) Equivalent to: d = e f (in C) Where MIPS registers $s3, $s4, $s5 are associated with C variables d, e, f
Addition and Subtraction of Integers How do we do this? f = (g + h) (i+ j) Use intermediate temporary registers add $t0, $s1, $s2 #temp = g + h add $t1, $3$4 $s3, $s4 #temp = I + j sub $s0, $t0, $t1 #f = (g+h) (i+j)
Immediates Immediates are numerical constants They appear often in code, so there are special instructions for them Add immediate: addi $s0, $s1, 10 # f= g + 10 (in C) Where MIPS registers $s0 and $s1 are associated with C variables f and g Syntax similar to add instruction, except that last argument is a number instead of register
R format Example op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits add $t0, $s1, $s2 note the order! (green card) special $s1 $s2 $t0 0 add 0 17 18 8 0 32 000000 10001 10010 01000 00000 100000 00000010001100100100000000100000 2 = 02324020 16
Logic and Shift Instructions
Bitwise operations Up until now, instructions have been: Arithmetic (e.g. add, sub, addi) All these instructions view contents of registers as a single quantity (such as signed or unsigned integer) New Perspective View contents of register as 32 individual bits rather than as a single 32 bit number Introduce two new classes of instructions: Logical operations Shift Instructions
Logical Operations Instructions for bitwise manipulation Operation C Java MIPS Shift left << << sll Shift right >> >>> srl Bitwise AND & & and, andi Bitwise OR or, ori Bitwise NOT ~ ~ nor Useful for extracting and inserting groups of bits in a word
AND Operations Useful to mask bits in a word Select some bits, clear others to 0 and $t0, $t1, $t2 $t2 $t1 0000 0000 0000 0000 0000 1101 1100 0000 0000 0000 0000 0000 0011 1100 0000 0000 $t0 0000 0000 0000 0000 0000 1100 0000 0000
OR Operations Useful to include bits in a word Set some bits to 1, leave others unchanged or $t0, $t1, $t2 $t2 $t1 0000 0000 0000 0000 0000 1101 1100 0000 0000 0000 0000 0000 0011 1100 0000 0000 $t0 0000 0000 0000 0000 0011 1101 1100 0000
NOT Operations Useful to invert bits in a word Change 0 to 1, and 1 to 0 MIPS has NOR 3 operand instruction a NOR b == NOT ( a OR b ) nor $t0, $t1, $zero Register 0: always read as zero $t1 $t0 0000 0000 0000 0000 0011 1100 0000 0000 1111 1111 1111 1111 1100 0011 1111 1111
Shift Operations op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits shamt: how many positions to shift Shift left logical (SLL) Shift left and fill with 0 bits sll by i bits multiplies by 2 i Shift hf right logical l( (SRL) Shift right and fill with 0 bits srl by i bits divides by 2 i (unsigned only) Shift right arithmetic (SRA) Shift right and fill emptied bits by sign extending Notethat that shamt (immediatevalue) is only 5 bits
Uses for Shift Instructions Very convenient operation to extract group of bits (e.g. one byte) within a word (e.g. think of operations on 8 bit pixels or 8 bit characters) For example, suppose we want to get bits 8 to 15 from $t0. The code below will do the job sll $t0, $t0, 16 srl $t0,,$ $t0, 24
Uses for Shift Instructions Since ceshifting is faster than multiplication, utp cato,a good compiler (or a good programmer for that matter) usually notices when C code multiplies by a power of 2 and compiles it to a shift hf instruction For example: a = a*8; (in C) would compile to: sll $s0, $s0, 3 (in MIPS)
Load and Store Instructions
Memory Operands Main memory used for composite data Arrays, structures, dynamic data To apply arithmetic operations Load values from memory into registers Store result from register to memory Memory is byte addressed Each address identifies an8 bitbyte byte Words are aligned in memory Address must be a multiple of 4 MIPS is Big Endian Most significant byte at least address of a word c.f. Little Endian: least significant byte at least address
Data Transfer: Memory to Register MIPS load Instruction Syntax lw register#, offset(register#) (1) (2) (3) (4) Where 1) operation name 2) register that will receive value 3) numerical offset in bytes 4) register containing pointer to memory lw meaning Load Word 32 bits or one word are loaded at a time
Data Transfer: Register to Memory MIPS store Instruction Syntax sw register#, offset(register#) (1) (2) (3) (4) Where 1) operation name 2) register that will be written in memory 3) numerical offset in bytes 4) register containing pointer to memory sw meaning Store Word 32 bits or one word are stored at a time
Memory Operand Example 1 C code: g = h + A[8]; g in $s1, h in $s2, base address of A in $s3 Compiled MIPS code: Index 8 requires offset of 32 4 bytes per word lw $t0, 32($s3) 3) # load word add $s1, $s2, $t0 offset base register
Memory Operand Example 2 C code: A[12] = h + A[8]; h in $s2, base address of A in $s3 Compiled MIPS code: Index 8 requires offset of 32 lw $t0, 32($s3) # load word add $t0, $s2, $t0 sw $t0, 48($s3) # store word
Registers vs. Memory Registers are faster to access than memory Operating on memory data requires loads and stores More instructions to be executed Compiler must use registers for variables as much as possible Only spill to memory for less frequently used variables Register optimization is important!
Byte/Halfword Operations MIPS byte/halfword load/store String processing is a common case lb rt, offset(rs) lh rt, offset(rs) Sign extend to 32 bits in rt lbu rt, offset(rs) lhu rt, offset(rs) Zero extend to 32 bits in rt sb rt, offset(rs) sh rt, offset(rs) Store just rightmost byte/halfword Why do we need them? characters and multimedia data are expressed by less than 32 bits; having dedicated 8 and 16 bits load and store instructions results in faster operation
Two s Compliment Representation
Unsigned Binary Integers Given an n bit number x x n 1 n 2 1 0 n 12 xn 22 x12 x02 Range: 0 to +2 n 1 Example 0000 0000 0000 0000 0000 0000 0000 1011 2 = 0 + + 1 2 3 + 0 2 2 +1 2 1 +1 2 0 = 0 + + 8 + 0 + 2 + 1 = 11 10 Using 32 bits 0 to +4,294,967,295,,
Unsigned Binary Integers 1110 1111 15 0000 0 1 0001 0010 Turn x notches counterclockwise to add x 1101 1100 1011 12 13 11 14 Inside: Natural number Outside: 4-bit encoding 2 3 5 4 0011 0100 0101 14 13 12 11 10 15 9 0 8 1 7 2 3 4 5 6 10 6 1010 9 7 0110 Turn y notches 8 clockwise 1001 0111 to subtract t y 1000 Schematic representation of 4 bit code for integers in [0, 15].
2s Complement Signed Integers Given an n bit number x x n 1 n 2 1 0 n 12 xn 22 x12 x02 Range: 2 n 1 to +2 n 1 1 Example 1111 1111 1111 1111 1111 1111 1111 1100 2 = 1 2 31 + 1 2 30 + + 1 2 2 +0 2 1 +0 2 0 = 2,147,483,648 + 2,147,483,644 = 4 10 Using 32 bits 2,147,483,648,, to +2,147,483,647,,
2s Complement Signed Integers Bit 31 is sign bit 1 for negative numbers 0 for non negative numbers ( 2 n 1 ) can t be represented Non negative numbers have the same unsigned and 2s complement representation Some specific numbers 0: 0000 0000 0000 1: 1111 1111 1111 Most negative: 1000 0000 0000 Most positive: 0111 1111 1111
Two s Complement Representation With k bits, numbers in the range [ 2 k 1, 2 k 1 1] represented. Negation is performed by inverting all bits and adding 1. 1110 0000 1111 0001 Turn x notches counterclockwise +0 1 +1 0010 to add x 1100 1101 1011 2 3 + 4 5 _ +2 +3 +4 +5 0011 0101 0100 2 3 4 5 6 1 7 0 8 1 2 3 4 5 6 7 6 +6 1010 7 +7 0110 Turn 16 y notches 8 counterclockwise to 1001 0111 add y (subtract y) 1000 Schematic representation of 4 bit 2 s complement code for integers in [ 8, +7].
Signed Negation Complement and add 1 Complement means 1 0, 0 1 x x 1111...1112 1 2 x 1 x Example: negate +2 +2 = 0000 0000 0010 2 2 = 1111 1111 1101 2 + 1 = 1111 1111 1110 2
Sign Extension Representing a number using more bits Preserve the numeric value In MIPS instruction set addi: extend immediatevalue lb, lh: extend loaded byte/halfword beq, bne: extend the displacement Replicate the sign bit to the left c.f. unsigned values: extend with 0s Examples: 8 bit to 16 bit +2: 0000 0010 => 0000 0000 0000 0010 2: 1111 1110 => 1111 1111 1111 1110