CENG 336 INT. TO EMBEDDED SYSTEMS DEVELOPMENT Spring 2006 Recitation 01 21.02.2006 CEng336 1
OUTLINE LAB & Recitation Program PIC Architecture Overview PIC Instruction Set PIC Assembly Code Structure 21.02.2006 CEng336 2
LAB & Recitation Program 4 Labs 1st & 2nd Coding 3rd & 4th Implementation on Piclab2 Demo Board Group work (3 Students) You will make demonstration. Individual grading 1 Final Lab Exam 21.02.2006 CEng336 3
LAB & Recitation Program LAB Grading Lab1 Lab2 Lab3 Lab4 Final lab exam Total % 4 6 7 10 8 35 Cheating Policy Any student involved in cheating will be remained pointless from labs. 21.02.2006 CEng336 4
Motivation Microprocessor: vrequires external support hardware ve.g., External RAM, ROM, Peripherals. Microcontroller: vvery little external support hardware. vmost RAM, ROM and peripherals on chip. v Computer on a chip, or System on chip (SOC) 21.02.2006 CEng336 5
Motivation There are a lot of microcontroller manufacturers 21.02.2006 CEng336 6
We will use PIC (Peripheral Interface Controller) 21.02.2006 CEng336 7
PIC Architecture: Background PICs use the Harvard Architecture Used mostly in RISC CPUs Separate program bus and data bus: can be different widths! For example, PICs use:»data memory (RAM): a small number of 8bit registers»program memory (ROM): 12bit, 14bit or 16bit wide (in EPROM, FLASH, or ROM) 21.02.2006 CEng336 8
The PIC Family: Cores PICs come with 1 of 4 CPU cores : 12bit cores with 33 instructions: 10Fxx, 12C50x, 16C5x 14bit cores with 35 instructions: 12C67x,16Cxxx, 16Fxxx 16bit cores with 58 instructions: 17C4x,17C7xx Enhanced 16bit cores with 77 instructions: 18Cxxx 21.02.2006 CEng336 9
We will use 16F877 21.02.2006 CEng336 10
PIC16F877 28/40/44 pin packages 14bit core -35 instructions 200ns instruction time (Tclk = 20MHz) 8,092 14bit FLASH program memory 368 8bit data memory or registers ( File registers ) 256 8bit EEPROM (nonvolatile) data registers 8 level hardware stack Interrupt capability (up to 14 sources) 33 pin I/O (for 40 pin package) 3 Timer/Counter modules Timer0: 8-bit Timer1: 16-bit Timer2: 8-bit 21.02.2006 CEng336 11
PIC16F877 Two Capture, Compare, PWM modules -Capture: 16-bit -Compare: 16-bit -PWM: max. resolution is 10-bit 10-bit 8 channel Analog-to-Digital Converter Synchronous Serial Port (SSP) with SPI and I2C Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI) with 9-bit address detection Parallel Slave Port (PSP) 8-bit 21.02.2006 CEng336 12
PIC16F877 DEVICE OVERVIEW 21.02.2006 CEng336 13
PIC16F877 DATA MEMORY 21.02.2006 CEng336 14
PIC16F877 DATA MEMORY Special Function Registers Core (CPU) Registers»STATUS»OPTION_REG»INTCON»PIE1»PIR1»PIE2»PIR2»PCON Peripheral Registers 21.02.2006 CEng336 15
PIC16F877 DATA MEMORY 21.02.2006 CEng336 16
PIC INSTRUCTION SET 21.02.2006 CEng336 17
INSTRUCTION FORMATS Instructions are encoded in binary in ROM. The instructions are fixed format, each occupying 14 bits. The division of the bits into fields is flexible. 21.02.2006 CEng336 18
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INSTRUCTION FORMATS Byte-oriented file register operations 21.02.2006 CEng336 20
INSTRUCTION FORMATS Bit-oriented file register operations 21.02.2006 CEng336 21
INSTRUCTION FORMATS Literal operations 21.02.2006 CEng336 22
INSTRUCTION FORMATS Control operations 21.02.2006 CEng336 23
INSTRUCTION FORMATS Examples GOTO 0x32 101 000 0011 0010 Binary for GOTO Binary for 32h 21.02.2006 CEng336 24
INSTRUCTION FORMATS Examples ADD 0x17 to W 11 1110 0001 0111 Add literal instruction Value to add: 17h 21.02.2006 CEng336 25
INSTRUCTION FORMATS Examples ADD register 47h to W 000 111 0 100 0111 Add register Destination is W Register number: 47h W = W + Reg[47h] 21.02.2006 CEng336 26
INSTRUCTION FORMATS Examples ADD W to register 47h Only difference from previous instruction 000 111 1 100 0111 Add register Destination is Reg[47] Reg[47h] = W + Reg[47h] Register number: 47h 21.02.2006 CEng336 27
Register Addition ADDWF f,d Add reg[f] to W and store in either W or reg[f] depending on d, if d=0 then store in W, else in reg[f] If reg[24h] =06h and W=04h then ADDWF 24h,1 ; hexadecimal 24 Sets reg[24h] to 0Ah 21.02.2006 CEng336 28
Addition of a constant ADDLW k Add k to W and store in W If W=4 then ADDLW H'24' ; hexadecimal 24 Sets W to 28h 21.02.2006 CEng336 29
ANDWF ANDWF f,d And reg[f] with W and store in either W or reg[f] depending on d, if d=0 then store in W, else in reg[f] If W = 0001 1111 and reg[20h]= 1111 0100 ANDWF 20h,0 will set W to 0001 0100 21.02.2006 CEng336 30
ANDLW ANDLW k And k with W and store in W If W = 0001 1111 and k= 06h (0000 0110) ANDLW 0x6 will set W to 0000 0110 21.02.2006 CEng336 31
Clear registers CLRF f ; set reg[f] to zero CLRF 0x40 ; reg[40h]:=0 CLRW ; set w register to zero 21.02.2006 CEng336 32
Move operations MOVFW f Moves contents of register f to the W register MOVWF f Moves the W reg to register f MOVLW k Moves the literal constant to the W register -Last two letters are memonics FW,WF,LW - No special intsruction to move one file register to another. 21.02.2006 CEng336 33
NOP NOP stands for NO operation It is an opcode that does nothing 21.02.2006 CEng336 34
Subtractions This can be done by using complement or subtract operations, subtract is not strictly needed COMF f,d ; sets either reg[f] or W to reg[f] For example if x is in reg[32h] and y in reg[33h] then x:=x-y would be done by COMF 0x33,0 ; W:=-y ADDWF 0x32,1 ; x:=x+w 21.02.2006 CEng336 35
SUBWF SUBWF f,d Subtract W from f This has two forms»subwf f,0 ; W := reg[f] W»SUBWF f,1 ; reg[f] := reg[f] -W MOVF 0x33,0 ; W := y SUBWF 0x32,1 ; x := x - W 21.02.2006 CEng336 36
SUBLW SUBLW k Subtract W from k and store in W If W = 0001 1111 and k= 0010 1111 SUBLW b' 0010 1111 ' ; binary representation will set W to 0001 0000 21.02.2006 CEng336 37
Decrement register DECF f,d Decrements reg[f] and stores result in either reg[f] or Wdepending on d DECF 0x50,1 Subtracts 1 from register 50 DECF 0x50,0 Sets W := reg[50h] -1 21.02.2006 CEng336 38
Decrement and skip DECFSZ f,d If the result of decrementing is zero, skip the next instruction Top: ;some instructions DECFSZ 0x38,1 GOTO Top ;some other instructions Reg[38h] holds the number of times to go round loop 21.02.2006 CEng336 39
Incrementing INCF and INCFSZ work like DECF and DECFSZ except that they increment In this case you would load a negative number into your count register and count up towards zero. Alternatively, count up, and skip when the result would have been 256. INCFSZ 0x50,1 reg[50h] := reg[50h]+1 if reg[50h] is 0 then skip next instruction 21.02.2006 CEng336 40
Inclusive OR IORWF f,d Example If W=1100 0001 and reg[40h]=0001 0001 IORWF 0x40,0 Will set W= 1101 0001 11000001 00010001 or 11010001 21.02.2006 CEng336 41
Inclusive OR literal IORLW k Example If W=1100 0001 IORLW 0x7 Will set W= 1100 0111 11000001 00000111 or 11000111 21.02.2006 CEng336 42
Exclusive OR XORWF f,d Example If W=1100 0001 and reg[40h]=0001 0001 XORWF 0x40,0 Will set W= 1101 0000 11000001 00010001 xor 11010000 21.02.2006 CEng336 43
Exclusive OR literal XORLW k Example If W=1100 0001 XORLW 0x7 Will set W= 1100 0110 11000001 00000111 xor 11000110 21.02.2006 CEng336 44
Bit operations BCF f,b ; set bit b of register f to 0 BSF f,b ; set bit b of register f to 1 Example BCF 0x34,1 Clears bit 1 of register 34 21.02.2006 CEng336 45
Bit test operations BTFSC f,b ; bit test skip if clear BTFSS f,b ; bit test skip if set Example INCF 0x33 BTFSC 0x33,4 GOTO OVERFLOW ; gotooverflow when ; reg 33 >7 21.02.2006 CEng336 46
SWAPF SWAPF f,d Swaps nibbles in f, stores result in either reg[f] or Wdepending on d SWAPF W,W ; will not work! ; because W can not be addressed in ; 16F877. 21.02.2006 CEng336 47
Rotate right RRF f,d - The contents of register f are rotated one bit to the right through the Carry Flag. -If d is 0, the result is placed in the W register. If d is 1, the result is stored back in register f. 21.02.2006 CEng336 48
Rotate left RLF f,d -The contents of register f are rotated one bit to the left through the Carry Flag. -If d is 0, the result is placed in the W register. If d is 1, the result is stored back in register f. 21.02.2006 CEng336 49
GOTO GOTO label Example: GOTO home home MOVLW 0x7 Transfers control to the label 21.02.2006 CEng336 50
CALL and RETURN Thare used for subroutines or procedures. CALL foo foo ; start of procedure ; body of procedure RETURN; end of procedure 21.02.2006 CEng336 51
CALL and RETURN When a call occurs the PC+1 is pushed onto the stack and then the PC is loaded with the address of the label When return occurs the stack is popped into the PC transferring control to the instruction after the original call. 21.02.2006 CEng336 52
RETLW RETLW k -The W register is loaded with the eight bit literal 'k'. -The program counter is loaded from the top of the stack (the return address). 21.02.2006 CEng336 53
CODE STRUCTURE LIST P=16F877 ; list directive to define processor #INCLUDE P16F877.INC ; processor specific variable definitions CONFIG (_CP_OFF&_WDT_OFF&_PWRTE_OFF&_XT_OSC&_LVP_OFF) ; variable and constant definitions ORG 0x000 ; processor reset vector goto init ; go to beginning of initialization ORG 0x004 ; Interrupt Vector goto $ ; do nothing, just stop here ' CONFIG' directive is used to embed configuration word within.asm file. The labels following the directive are located in the respective.inc file. See data sheet for additional information on configuration word settings. init mainline goto end mainline ; initialization code ; main code The ORG directive says where the instruction start in ROM. Address 0 is where the hardware starts running Address 4 is where the hardware goes on an interrupt 21.02.2006 CEng336 54
Variable and constant definitions Definition: count1 equ H 35 Usage: movlw movwf count1 count1 #define myport #define myled PORTB PORTB,3 21.02.2006 CEng336 55
ASSEMBLER PROCESS PIC 21.02.2006 CEng336 56