Designing with STM32F2x & STM32F4

Designing with STM32F2x & STM32F4 Course Description Designing with STM32F2x & STM32F4 is a 3 days ST official course. The course provides all necessary theoretical and practical know-how for start developing platforms based on STM32F2x and STM32F4 families. The course begins with an introduction to STM32F microcontroller families and focuses on Cortex-M3/M4 architectures. The course continues with an in-depth study of the memory organization, reset unit, interrupts handling, low power modes, and all the SoC peripherals such as I/O ports, ADC, RTC, USART, I2C, DAC, TSC, SPI, CAN, USB, Timers, Op-Amps, embedded comparators, HDMI, DMA and CRC. The course also employs hardware and software design tools, and combines 60% theory with 40% practical work in every meeting. Course Duration 3 days

Goals 1. Become familiar with STM32F families 2. Become familiar with ARM Cortex-M3/M4 architectures 3. Become familiar with STM32F2x & STM32F4 peripherals 4. Become familiar with hardware and software design tools 5. Build a new project using the development tools 6. Work with Firmware libraries Target Audience Software and hardware engineers who would like start developing with STM32F2x & STM32F4 microcontrollers Prerequisites Computer architecture background Experience in C programming Experience in developing embedded systems Course Material KEIL MDK-ARM or IAR ST Eval board Course book (including labs)

Agenda Day #1 STM32F4 Series o STM32F4 highlights o Applications served o STM32F block diagram o STM32F4 portfolio o STM32 product series STM32F4 Key Features o ST s ART Accelerator o Real-time performance o Power efficiency o Peripherals o Tools and software libraries STM32F4 Architecture o STM32F4xx block diagram o Bootloader o Boot mode through I-D code bus o CPU, DMA & Multi-Bus matrix o DMA transfers o Flash performance o Role of the ART accelerator o Core performance Cortex-M4F Architecture o Cortex-M processors overview o ARM Cortex-M4 core o Cortex-M4 processor microarchitecture o Cortex-M feature set comparison o Single cycle MAC unit o Saturated arithmetic o Single cycle SIMD instructions

o DSP and non-dsp instructions o Packed data types o DSP performance for control application o DSP lib o Tools o Main DSP operations (FIR, IIR, FFT) o Assembly or C? o Optimization strategies o FIR filter example Cortex-M inner loop Loop unrolling Apply SIMD CMSIS files Data organization with caching o Floating point unit FPU usage Benefits of a FPU Rounding issues C example IEEE 754 Floating point operations Floating point format conversion Exceptions ARM FPv4-SP single precision FPU FPU instructions Exception handling Lab #1: Tools installation and test ( Hello STM32 world! )

Day #2 STM32F4x vs STM32F10x/STM32F2xx o Compatibility o Pin out differences o Compatible board design o IPs comparison o Differences in core and system architecture o Differences in peripheral system architecture o New RTC implementation in F4 vs F2 Embedded Flash o Flash features overview o Slash operations o Flash user configuration and specific block o Flash read protection o Flash write protection CRC Calculation Unit o CRC features Power Control (PWR) o Power supply o Limitations o I/O compensation cell o Voltage regulators o Voltage regulator bypass o Power on and power down reset (POR/PDR) o Brown out reset (BOR) o Programmable voltage detector (PVD) o Backup domain o STM32F4xx low power modes features o Wakeup time from low power Reset & Clock Control (RCC) o Reset sources o Clock features o Internal/external clock measurement using TIM5/TIM11

External Interrupt/Event Controller (EXTI) o EXTI features System Configuration Controller (SYSCFG) o System configuration usage General Purpose I/Os (GPIO) o GPIO features o GPIO configuration modes o Alternate function features o Use of external oscillators pins as standard I/Os Direct Memory Access (DMA) o DMA features o DMA1 controller o DMA2 controller o Streams and channels configuration o Transfer size and flow control o FIFO: data packing/unpacking o FIFO: threshold and burst mode o Circular and double buffer modes o DMA events and interrupt flags Lab #2: DMA Digital Camera Interface (DCMI) o DCMI features o DCMI block diagram o DCMI data transfer o DCMI extended data mode o DCMI capture mode o DCMI CROP feature Lab #3: DCMI to LCD Real-Time Clock (RTC) o RTC features o RTC block diagram o RTC registers write protection

o RTC clock sources o RTC in low power modes and in reset o RTC alternate function configuration o RTC calendar o RTC programmable alarms o Wakeup configuration o STM32F4xx RTC vs STM32F2xx Analog-to-Digital Converter (ADC) o ADC features o ADC speed performances o ADC sampling time o ADC regular/injected channels group o ADC sequencer o ADC conversion modes o ADC discontinuous conversion mode o ADC analog watchdog o Temperature sensor and V BAT monitoring o ADC dual modes o ADC triple modes o ADC and DMA o ADC flags and interrupts Lab #4: ADC Simultaneous Controller Area Network (BXCAN) o CAN features o Block diagram dual CAN Flexible Static Memory Controller (FSMC) o FSMC features o FSMC block diagram o FSMC bank memory mapping o NOR/PSRAM address mapping o NOR/PSRAM interface signals o LCD modules interface signals o NOR/PSRAM controller o NAND address mapping o PCCARD address mapping o NAND/PCCARD interface signals

o NAND/PCCARD controller o STM32F4xx FSMC vs STM32F2xx Digital-to-Analog Converter (DAC) o DAC features o DAC channelx block diagram o DAC output voltage o Single DAC channel data format o DAC conversion triggers o Noise wave generation o Triangle wave generation o DMA o Dual DAC channel mode o Dual DAC channel data format o DAC buffered output o DAC applications General Purpose Timers (TIM) o STM32F4xx timer features overview o Counter modes o Update event o Counter clock selection o General purpose timer features overview o Advanced timer features overview o General purpose 2 channels timer features overview o General purpose 1 channel timer features overview o Capture compare array presentation o Input capture mode o PWM input mode o Output compare mode o PWM mode o Advanced control timer TIM1 and TIM8 for motor control o One pulse mode o Encoder interface o Hall sensor interface o TIMs synchronization o Synchronization-configuration example

Day #3 Independent Watchdog (IWDG) o IWDG features Window Watchdog (WWDG) o WWDG features Inter-Integrated Circuit Interface (I2C) o I2C features o DMA capability o Dual addressing mode o PEC o SMBus mode o STM32F4xx I2C vs STM32F10x Universal Synchronous Asynchronous Receiver Transmitter (USART) o USART features o DMA capability o Synchronous mode o IrDA SIR encoder decoder o Smart card mode o Single wire half duplex mode o STM32F4xx USART vs STM3210x Serial Peripheral Interface (SPI) and I2S o SPI features o DMA capability o Data frame format o Full duplex communication o Simple communication o NSS hardware & software management o Single master: SS output management o CRC calculation

o SPI/I2S mode switch o I2S features o I2S audio protocol o Data format and packet frame o I2S upgrade from half to full-duplex o Half-duplex communication o Full-duplex communication o Clocking system o DMA capability o STM32F4xx SPI vs STM322xx SD/SDIO MMC Card Host Interface (SDIO) o SDIO features o SDIO block diagram o SDIO adapter o SDIO DMA requests o SDIO clock configuration o SD/SDIO & MMC cards o STM32F4xx SDIO vs STM32F10x Lab #5: WWDG and SDIO USB 2.0 On-The-Go Full Speed (OTG FS) o General features o Device mode features o Host mode features o Embedded full-speed OTG PHY features o Hardware connections o FIFO space allocation for Device mode o FIFO space allocation for Host mode o FIFO push and pop address region o Shared RxFIFO operation o Packet transfer on TxFIFO o SOF trigger feature o Host frame interval trimming USB 2.0 On-The-Go High Speed (OTG HS) o Main features o Device mode features o Host mode features

o ULPI high speed PHY connection o USB high-speed DMA features overview Cryptographic Processor (CRYP) o Definitions o CRYP algorithms principle o CRYP features o CRYP block diagram o Electronic codebook mode (ECB) o ECB encryption o Cipher block chaining mode (CBC) o CBC encryption and decryption o Counter mode (CTR): AES only o CTR encryption and decryption o CRYP FIFOs o CRYP throughput o CRYP data swapping o CRYP and DMA o CRYP context swapping o CRYP flags and interrupts o AES applications o DES/TDES applications Lab #6: Crypto Random Number Generator (RNG) o RNG features o RNG block diagram HASH Processor (HASH) o Definitions o HASH features o HASH block diagram o Message digest computing o HMAC operation o HASH throughput o Context swapping o HASH data swapping o HASH and DMA o HASH flags and interrupts

o HASH applications Ethernet MAC 10/100 o Main features o Ethernet block diagram o Physical layer interface o Ethernet interface solution o Frame MAC address filtering o HASH filtering o MAC FIFOs o Checksum offload o Flow control o Power management block o Entry in power down mode o MAC management counters (MMC) o DMA controller o IEEE1588 precision time protocol o STM32 support for IEEE1588