Chapter 08: The Memory System. Lesson 01: Basic Concepts

Similar documents
COMPUTER SYSTEM. COMPUTER SYSTEM IB DP Computer science Standard Level ICS3U. COMPUTER SYSTEM IB DP Computer science Standard Level ICS3U

Chapter 05: Basic Processing Units Control Unit Design. Lesson 15: Microinstructions

Chapter 02: Computer Organization Functional units and components in a computer organization Part 3 Bus Structures

ECE 341. Lecture # 16

Chapter 5: Computer Systems Organization

Chapter 5: Computer Systems Organization. Invitation to Computer Science, C++ Version, Third Edition


A Review of Chapter 5 and. CSc 2010 Spring 2012 Instructor: Qian Hu

The Von Neumann Architecture Odds and Ends. Designing Computers. The Von Neumann Architecture. CMPUT101 Introduction to Computing - Spring 2001

Chapter 4. Computer Organization

Basic Computer Architecture

CENG4480 Lecture 09: Memory 1

ECE Lab 8. Logic Design for a Direct-Mapped Cache. To understand the function and design of a direct-mapped memory cache.

Three-box Model: These three boxes need interconnecting (usually done by wiring known as a bus. 1. Processor CPU e.g. Pentium 4 2.

CMPUT101 Introduction to Computing - Summer 2002

The Central Processing Unit

Concept of Memory. The memory of computer is broadly categories into two categories:

Alternate definition: Instruction Set Architecture (ISA) What is Computer Architecture? Computer Organization. Computer structure: Von Neumann model

Computer-System Organization (cont.)

Another fundamental component of the computer is the main memory.

What Operating Systems Do An operating system is a program hardware that manages the computer provides a basis for application programs acts as an int

Computer Architecture and Assembly Language. Spring

Chapter 1: Introduction. Operating System Concepts 9 th Edit9on

Pharmacy college.. Assist.Prof. Dr. Abdullah A. Abdullah

Computer Architecture

Computer Organization

CC312: Computer Organization

Von Neumann Architecture

Computer Architecture (part 2)

Cambridge International Examinations Cambridge International Advanced Subsidiary and Advanced Level

CENG3420 Lecture 08: Memory Organization

Latches. IT 3123 Hardware and Software Concepts. Registers. The Little Man has Registers. Data Registers. Program Counter

The Von Neumann Architecture. Designing Computers. The Von Neumann Architecture. CMPUT101 Introduction to Computing - Spring 2001

Memory hierarchy and cache

Memory General R0 Registers R1 R2. Input Register 1. Input Register 2. Program Counter. Instruction Register

CMPUT101 Introduction to Computing - Summer 2002

COMPUTER ORGANISATION CHAPTER 1 BASIC STRUCTURE OF COMPUTERS

Overview of Computer Organization. Chapter 1 S. Dandamudi

Designing Computers. The Von Neumann Architecture. The Von Neumann Architecture. The Von Neumann Architecture

CS 265. Computer Architecture. Wei Lu, Ph.D., P.Eng.

Computer Organization. Chapter 12: Memory organization

Overview of Computer Organization. Outline

machine cycle, the CPU: (a) Fetches an instruction, (b) Decodes the instruction, (c) Executes the instruction, and (d) Stores the result.

Introduction to parallel computing

Getting Embedded Software into the Target System using Device Programmer

The CPU and Memory. How does a computer work? How does a computer interact with data? How are instructions performed? Recall schematic diagram:

Computer Systems Organization

Chapter 10: Virtual Memory. Lesson 05: Translation Lookaside Buffers

Chapter 02: Computer Organization. Lesson 02: Functional units and components in a computer organization- Part 1: Processor

Computer Architecture Dr. Charles Kim Howard University

OS And Hardware. Computer Hardware Review PROCESSORS. CPU Registers. CPU Registers 02/04/2013

Microcomputer Architecture and Programming

COSC 122 Computer Fluency. Computer Organization. Dr. Ramon Lawrence University of British Columbia Okanagan

Information Science 1

PESIT Bangalore South Campus

Computers in Business: Concepts in Hardware and Software

Chapter 11: Input/Output Organisation. Lesson 02: Accessing the I/O devices and Interface circuit

Computer Architecture

Knowledge Organiser. Computing. Year 10 Term 1 Hardware

UNIT-V MEMORY ORGANIZATION

IB Computer Science Topic.2-

MA Unit 4. Question Option A Option B Option C Option D

Computer Architecture and Organization (CS-507)

In 8086 Carry flag, Parity flag, Auxiliary carry flag, Zero flag, Overflow flag, Trace flag, Interrupt flag, Direction flag, and Sign flag.

Introduction to OS. Introduction MOS Mahmoud El-Gayyar. Mahmoud El-Gayyar / Introduction to OS 1

Four Components of a Computer System

MICROPROCESSOR MCQs. 1) What does the microprocessor comprise of? a. Register section b. One or more ALU c. Control unit d.

Lecture1: introduction. Outline: History overview Central processing unite Register set Special purpose address registers Datapath Control unit

ELCT 912: Advanced Embedded Systems

COSC 243. Computer Architecture 1. COSC 243 (Computer Architecture) Lecture 6 - Computer Architecture 1 1

Computer Organization (Autonomous)

Lecture Objectives. Introduction to Computing Chapter 0. Topics. Numbering Systems 04/09/2017

2 MARKS Q&A 1 KNREDDY UNIT-I

Introduction. Computer System Organization. Languages, Levels, Virtual Machines. A multilevel machine. Sarjana Magister Program

Chapter 1: Introduction Dr. Ali Fanian. Operating System Concepts 9 th Edit9on

Question 1: What criteria define Von Neumann architecture? Identify clearly and coherently. Solution

Computer Architecture 2/26/01 Lecture #

UNIT 2 (ECS-10CS72) VTU Question paper solutions

Structure of Computer Systems

FACTFILE: GCE DIGITAL TECHNOLOGY

+ Random-Access Memory (RAM)

Elementary Computing CSC M. Cheng, Computer Science 1

What Are The Main Differences Between Program Counter Pc And Instruction Register Ir

Chapter One. Introduction to Computer System

MARTHANDAM COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY TWO MARK QUESTIONS AND ANSWERS

STANDARD I/O INTERFACES

History. 3rd Generation- Integrated Circuits, Transistors (Integrated Circuit form) for Memory ( memory is now volatile), Terminal/Keyboard for I/O

Universität Dortmund. ARM Architecture

CS 101, Mock Computer Architecture

CS Part III 1 Dr. Rajesh Subramanyan, 2005

Computer Systems. Binary Representation. Binary Representation. Logical Computation: Boolean Algebra

CPU ARCHITECTURE. QUESTION 1 Explain how the width of the data bus and system clock speed affect the performance of a computer system.

3. Which of the following is volatile? [ ] A) Bubble memory B) RAM C) ROM D) Magneticdisk

EE 457 Unit 7b. Main Memory Organization

Donn Morrison Department of Computer Science. TDT4255 Memory hierarchies

Embedded Systems Architecture

Systems software. Definition. Categories of software. Examples Of Systems Software 11/23/2018

SYSTEM BUS AND MOCROPROCESSORS HISTORY

William Stallings Computer Organization and Architecture 10 th Edition Pearson Education, Inc., Hoboken, NJ. All rights reserved.

Memory classification:- Topics covered:- types,organization and working

Transcription:

Chapter 08: The Memory System Lesson 01: Basic Concepts

Objective Understand the concepts of interconnecting processor to memory devices Understand the speed of access of memorydevices, latency and bandwidth Learn how they relate in a memory system 2

Buses of Memory System 3

A simple view of Computer Organisation Responsible for storing the instructions for execution and data The processor is responsible for actually executing the instructions that make up programs and the operating system 4

A view of Computer Organisation 5

The Von Neumann stored-program computer architecture Memory stores the data and program, and processor fetches the instruction and data from the memory and stores the data to memory 6

Previous Assumptions for Memory System 7

Assumption so far Until now, treated the memory system as a "black box", which stores the program and data, from which the processor fetches the instructions to execute at the processing subunits, and into which the processor could place data for retrieval later 8

Assumption so far All memory operations take the same amount of time to complete, and that each memory operation finishes before the next one begins As processing logic circuit performance increases, the instruction throughput also increases proportionately in instruction throughput 9

Not Considered so far How does the memory system affects the instruction throughput in our discussions thus far? 10

Buses for Memory Interconnection 11

Memory Interconnection Memory system interconnection with the processor through three buses Address bus, data bus, and control bus 12

Interconnection of the processor and memory system 13

Addresses 14

Addresses Memory units have addresses Can store one byte at one address A word has 1 or 2 or 4 bytes in an organisation A word stores as either little-endian or big-endian 15

Addresses The address bus from processor is of 32 bits There are 4 G addresses at memory for 4 GB 4 G addresses Between 0 and (4 1024 1024 1024 1) We assume by convention that 1 K memory = 2 10 = 1024 1 M memory = 2 20 = 1024 1024 1 G = 2 30 = (4 1024 1024 1024) = 1K 1 K 1 K 16

Fetch or Store 17

Instruction-fetch When a PC (program counter) writes the MAR (memory address register), which connects address bus to memory system 18

Transfer on fetch of instruction or data word Transfer to MDR MDR a register in the processor, which interconnects to the data bus of the memory system 19

The control signals from the processor Read (MEMRD) Write (MEMWR) to the memory system Active during transfer from the memory-address to MDR or MDR to memory-address else inactive 20

Number of words accesses per cycle 21

Memory access cycle Starts from the program counter PC or other operand transferring the address to MAR Issuing of control signals Data-bus transferring to or from MDR Finally, deactivating control signals to memory 22

Number of Words/Cycle Early computers only one word (= 32 in 32-bit data bus) can be fetched in one cycle of fetch 23

More Number of Words/Cycle Modern computers, however, have more complexity 24

RAM, ROM and Cache 25

ROM ROM the read-only memory Cannot be modified by the computer but may be read In general, the ROM to hold a program that is executed automatically by the computer every time it is turned on or reset 26

RAM Random-access memory can be both read and written Used to hold the programs, operating system, and data required by the computer Volatile does not retain the data stored in it when the computer's power is turned off 27

Cache Memory access cycle time > instruction execution time taken by the processing unit Cache memory inside the processor used for issuing instructions to the execution unit at a fast rate 28

Memory System 29

Virtual memory 30

Virtual Memory Physical addresses Memory addresses issued by the processor for the semiconductor memory RAM or ROM A program specified addresses could be different from the physical location of the addresses in the RAM or ROM A program can have a large number of addresses, as the program size is unlimited 31

Memory size and Virtual Memory Memory size, however limited by the actual presence of the addresses Virtual addresses the specified addresses in stored program Virtual addresses translated and mapped to physical addresses when a program or program section loads into the memory chips Also called logical addresses 32

Secondary memory 33

Secondary Memory Stores the OS, application programs, and the programs data Processor executes the instructions after these or part of these is loaded into RAM 34

Secondary Memory ROM has a program called the bootstrap, or "boot" loader, which instructs the computer to load its operating system (OS) off of its hard disk or other secondary storage IO device 35

Summary 36

We learnt Basic concepts of addresses Number of words/cycle RAM, ROM, Cache, Virtual and secondary memory 37

End of Lesson 01 on Basic Concepts