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Module 1: Introduction to Tanner Front-End Flow... 17 Objectives... 18 Course Schedule... 19 Course Objectives... 20 Analog Implementation Process... 21 What Is a Design Project?... 22 Tanner Analog IC Design: Front-End Flow... 23 Tanner Analog IC Design Features... 24 Typical Project Structure... 25 Libraries... 26 Cells: Overview... 27 Hierarchical Designs... 29 SPICE Netlists... 30 Process Design Kits... 31 Tanner Analog IC Design: Front-End Flow... 32 Starting Up Tanner Tools... 33 Accessing Help... 34 Setup Examples... 35 Example Design Outline... 36 Lab Exercise... 37 Module 2: Introduction to Tanner S-Edit... 39 Objectives... 40 Course Schedule... 41 Design Flow... 42 I
Tanner S-Edit Interface... 43 Tanner S-Edit User Interface... 44 Tanner S-Edit User Interface... 45 Window/Toolbars Positioning... 47 Window Positioning... 48 Command Window... 50 User Interface Customization... 51 Creating and Editing Toolbars... 52 Creating and Editing Menus... 54 Keyboard Shortcuts... 55 Tanner S-Edit Designs... 56 Creating New Designs... 57 Tanner S-Edit Project Data Structure... 58 Opening Existing Designs... 60 Library Navigator... 62 Exclusivity And Editing Protection... 63 Library Referencing... 65 Library Navigator Cell Navigation... 66 The Hierarchy Navigator... 68 Tanner S-Edit Settings... 69 Tanner S-Edit Settings... 70 Technology Settings Schematic Colors... 71 Technology Settings Schematic Grids... 72 Technology Settings Schematic Units... 73 Technology Settings Schematic Page... 74 II
Technology Settings Protection... 75 Preferences General... 76 Preferences Mouse... 77 Preferences Selection... 78 Preferences Text Editor... 80 Preferences Text Styles... 81 Saving/Loading Settings... 82 Additional Resources... 83 Lab Exercise... 84 Module 3: Schematic Entry in Tanner S-Edit... 85 Objectives... 86 Course Schedule... 87 Design Flow... 88 Basic Cell Operations... 89 Cell/View Operations Overview... 90 Creating New Cells... 91 Creating New Schematics... 92 Opening Cell Views... 93 Traversing Cell Views... 95 Cell Instantiation... 96 Instance Properties... 99 Properties Navigator... 100 Query and Editable Sub-properties... 101 Instance Arrays... 103 Design Area... 104 III
Design Area Elements... 105 Display Area View Options... 107 Design Area Default Controls View... 109 Mouse Buttons Toolbar... 110 Splitting a Schematic Into Multiple Pages... 111 Status Toolbar... 112 Locator Toolbar... 113 Design Tools... 114 Electrical Toolbar... 115 Drawing Wires... 116 Drawing Modes... 117 Net Labels... 118 Net Label Settings... 119 Buses... 120 Working With Buses And Vectors... 121 Soldering Point and Connect/Disconnect... 122 Net Caps... 123 Ports... 124 Editing Tools... 125 Selection and Editing Commands... 126 Rubber Banding... 128 Move By... 129 Edit In-Place... 130 Additional Tools and Features... 131 Accidental Connectivity Prevention... 132 IV
Net Highlighting... 133 Design Checking... 134 Design Checking Settings... 135 Snap To Grid... 136 Hierarchy Navigator... 137 Find And Replace... 138 Additional Resources... 139 Lab Exercise... 140 Module 4: Cell Operations in Tanner S-Edit... 141 Objectives... 142 Course Schedule... 143 Design Flow... 144 Creating Symbol Views... 145 Symbol Views... 146 Creating Symbol Views Procedure... 147 Creating Symbol Views New Symbol... 148 Creating Symbol Views Draw The Symbol... 149 Creating Symbol Views Add Ports... 152 Creating Symbol Views Add Properties... 153 Generating Symbols Automatically... 154 Cell Properties... 155 Property Types... 156 Property Data Types... 157 Property Values... 158 Property Value Evaluation... 159 V
Special Property Value Expressions... 160 Property Display Attributes... 161 Property Trees (Hierarchies)... 162 Service Sub-Properties... 163 Control Properties... 164 Creating Language Views... 166 Language Views... 167 Creating Language Views... 168 Language Design Checking... 170 Language Design Checking Settings... 171 Verilog-A Reference Manual... 172 Interface View of Language Views... 173 Symbols for Language Views... 174 Cell Operations... 175 Libraries Navigator Cells List... 176 Copying Cells... 177 Copying Views... 179 Renaming Cells... 181 Renaming Views... 182 Deleting Cells / Views... 183 Redirecting Instances... 184 Unresolved Instances... 185 Cells with Multiple Views... 186 Additional Resources... 187 Lab Exercise... 188 VI
Module 5: Capturing, Importing and Exporting Designs in Tanner S-Edit.. 189 Objectives... 190 Course Schedule... 191 Design Flow... 192 Capturing Designs... 193 Capturing Designs... 194 Importing and Exporting Options... 195 Importing and Exporting Design Formats... 196 Importing EDIF Designs... 197 Exporting EDIF Designs... 200 Importing OpenAccess... 202 Importing and Exporting Language Formats... 204 Exporting SPICE Netlists... 205 Importing SPICE Files... 207 Importing Verilog Files... 209 Exporting Verilog Files... 211 Additional Resources... 212 Lab Exercise... 213 Module 6: Introduction to SPICE Simulation... 215 Objectives... 216 Course Schedule... 217 Design Flow... 218 Overview & General Setup... 219 Overview... 220 Simulation Types... 221 VII
Simulation Setup... 222 Setting Up Testbenches... 223 SPICE Simulation Setup... 224 General SPICE Simulation Setup... 225 Model Files and Libraries... 227 SPICE Simulation Setup Additional SPICE Commands... 228 SPICE Simulation Setup Parameters... 229 Running & Controlling Simulation... 230 SPICE Simulation Setup General Procedure... 231 Introduction to Tanner T-SPICE... 232 Tanner T-SPICE Interface... 233 Simulation Controls... 234 Running Tanner T-SPICE From the Command Line... 235 Simulation Manager... 236 Simulation Status Dialog... 237 Introduction to Tanner Waveform Viewer... 238 Tanner Waveform Viewer Interface... 239 Charts Window Features... 242 Default Keyboard and Mouse Shortcuts... 243 Draw Toolbar... 244 Chart books, Charts and Plots... 245 Controlling The Plot View... 246 Plot Operations... 248 Plot Properties... 249 Traces Navigator... 250 VIII
Waveform Comparison Dialog... 252 Application Preferences... 255 Application Preferences (Trace Styles)... 256 Command Window... 257 Additional Resources... 258 Lab Exercise... 259 Appendix A: T-SPICE Settings & Batch Simulations... 260 Batch Simulations... 261 Text Editor... 263 Simulation Settings... 265 Module 7: DC, AC and Noise Analysis... 269 Objectives... 270 Course Schedule... 271 Design Flow... 272 Simulation Types... 273 SPICE Libraries... 274 Waveform Probing... 276 Waveform Probing Procedure... 277 Small Signal Parameters... 278 Enabling Back Annotations... 279 General Notes / Rules... 280 DC Operating Point Analysis... 281 DC Operating Point Analysis... 282 DC Operating Point Analysis Procedure... 283 Contents of the.op File... 284 IX
Contents of Operating Point Results File... 285 DC Operating Point Analysis SPICE Command... 286 DC Sweep Analysis... 287 DC Sweep Analysis... 288 DC Sweep Analysis Procedure... 289 DC Sweep Analysis Example... 290 DC Sweep Analysis SPICE Command... 291 AC Analysis... 292 AC Analysis... 293 AC Analysis Procedure... 294 AC Analysis Example... 295 AC Analysis SPICE Command... 296 Noise Analysis... 297 Noise Analysis... 298 Noise Analysis Procedure... 299 Noise Analysis Print and Measurement... 300 Noise Analysis Example... 301 Noise Analysis SPICE Command... 303 Additional Resources... 304 Lab Exercise... 305 Module 8: Transient Analysis, Parametric Sweep and Temperature Sweep 307 Objectives... 308 Course Schedule... 309 Design Flow... 310 Simulation Types... 311 X
Transient Analysis... 312 Transient Analysis... 313 Transient Analysis Procedure... 314 Transient Analysis Example... 315 Transient Analysis SPICE Command... 316 Parameter Sweep... 317 Parameter Sweep... 318 Parameter Sweep Procedure... 319 Parameter Sweep Example... 321 Parameter Sweep SPICE Command... 323 Temperature Sweep... 325 Temperature Sweep... 326 Temperature Sweep Procedure... 327 Temperature Sweep Example... 328 Temperature Sweep SPICE Command... 330 Parameter List in Tanner Waveform Viewer... 331 Additional Resources... 332 Lab Exercise... 333 Module 9: Monte Carlo and Corner Simulations... 335 Objectives... 336 Course Schedule... 337 Design Flow... 338 Simulation Types... 339 Monte Carlo Analysis... 340 Monte Carlo Analysis... 341 XI
Monte Carlo Analysis Results... 342 Monte Carlo Analysis Prerequisites... 344 Monte Carlo Analysis Setup... 345 Monte Carlo Analysis Procedure... 346 Monte Carlo Analysis Example... 347 Histogram Chart Parameters... 349 Corner Simulations... 350 Corner Simulations... 351 Corner Simulations Setup... 352 Corner Simulations Example... 355 Corner Simulation Example Results... 356 Corner Simulations SPICE Command... 357 Additional Resources... 358 Lab Exercise... 359 Appendix A: Automation in Tanner S-Edit... 361 Objectives... 362 Course Schedule... 363 Design Flow... 364 Command Window... 365 Command Window... 366 Command Window Options... 367 Command Window Customization General... 368 Command Window Customization Filters... 369 Command Window Customization Folders... 370 Tcl/Tk Commands... 371 XII
Tcl/Tk Commands Help... 372 Creating & Editing Tcl/Tk Scripts... 374 Executing Tcl/Tk Scripts... 375 Sourcing Tcl/Tk Scripts... 377 Executing Tcl/Tk Scripts Automatically... 378 Callbacks... 379 Tcl Callbacks... 380 Protection Settings... 382 Evaluated Expressions... 383 Evaluated Expressions... 384 Evaluated Expressions & Control Properties... 385 Additional Resources... 386 Lab Exercise... 387 Appendix B: SPICE Netlisting... 389 Objectives... 390 Course Schedule... 391 Design Flow... 392 T-SPICE Fundamentals... 393 Basic T-SPICE Rules... 394 SPICE Options... 396 Supported Arithmetic Operators... 397 Supported Logical Operators... 398 Built-In Functions... 399 Device Statements... 400 Common Device Statements... 401 XIII
Subcircuits... 403 Subcircuit Device Statement... 404 Subcircuit Example... 405 Library & Include Files... 406 Defining Parameters & Functions... 407 Conditional Statements... 408 Compact Conditional Statement... 409 Simulation Options... 410 Accuracy vs. Speed... 411 DC Analysis... 412 Transient Analysis... 413 Tolerances... 414 Methods of Time Integration... 415 Common Simulation Problems... 416 Non-Convergence Errors... 417 Non-Convergence Checking... 418 Non-Convergence Solutions... 419 Trapezoidal Integration Failure... 421 Gear BDF Integration Failure... 422 Command Wizard... 423 Additional Resources... 424 Lab Exercise... 425 Appendix C: Verilog-A Behavioral Modeling... 427 Objectives... 428 Course Schedule... 429 XIV
Design Flow... 430 Verilog-A Simulation... 431 Verilog-A Modules... 432 Verilog-A Simulation Settings in Tanner S-Edit... 433 Verilog-A Settings in Tanner T-SPICE... 434 T-SPICE Commands to Include Verilog-A Models... 435 Instantiating Verilog-A Devices... 436 Simulating Verilog-A Models Procedure... 437 Additional Resources... 438 Lab Exercise... 439 XV