VENUS INTERNATIONAL COLLEGE OF TECHNOLOGY Gandhinagar Department of Computer Enggineering ADVANCE MICROPROCESSOR & INTERFACING Name : Enroll no. : Class Year : 2014-15 : 5 th SEM C.E.
VENUS INTERNATIONAL COLLEGE OF TECHNOLOGY Gandhinagar CERTIFICATE This is certify that Mr./Ms. Roll No. of B.E Third Year 5 th Sem C.E. has satisfactory completed the course in Advance Microprocessor and Interfacing. Signature of Faculty Signature of HOD DATE OF SUBMISSION : 12 / 11 / 2014
Index Sr. No. Description Page No. Date 1 Introduction to microprocessor 8086 1 / /14 Sign 2 Study of Debugging Commands. 7 / /14 3(a) Transfer the data using immediate addressing mode. 8 / /14 3(b) Copy the data from register using register mode. 9 / /14 4 Find average of ten 16-bit numbers. 10 / /14 5 Separate odd and even number from given array. 12 / /14 6 Addition of two random numbers by using MACRO 14 / /14 7 Multiplication of two 32-bit numbers. 15 / /14 8 Find maximum number from given array. 17 / /14 9 Find minimum number from a given array. 19 / /14 10 Arrange array in ascending order. 21 / /14
Practical 1 Date : AIM : To familiarize with 8086 Microprocessor. DESCRIPTION: The 8086 is a 16-bit microprocessor chip designed by Intel between early 1976 and mid- 1978, when it was released. The Intel 8088, released in 1979, was a slightly modified chip with an external 8-bit data bus (allowing the use of cheaper and fewer supporting logic chips), and is notable as the processor used in the original IBM PC. The 8086 gave rise to the x86 architecture which eventually turned out as Intel's most successful line of processors. All internal registers, as well as internal and external data buses, are 16 bits wide, firmly establishing the "16-bit Microprocessor" identity of the 8086. A 20-bit external address bus gave a 1 MB physical address space (220 = 1,048,576). This address space was addressed by means of internal 'segmentation'. The data bus was multiplexed with the address bus in order to fit a standard 40-pin dual in-line package. 16-bit I/O addresses meant 64 KBof separate I/O space (216 = 65,536). The maximum linear address space was limited to 64 KB, simply because internal registers were only 16 bits wide. Programming over 64 KB boundaries involved adjusting segment registers (see below) and remained so until the 80386 introduced wider (32 bits) registers (and more advanced memory management hardware). Advance Microprocessor & Interfacing VICT CE 2014-15 1
Micro architecture of 8086 microprocessor The Micro architecture of a processor is its internal architecture that is the circuit building blocks that implement the software and hardware architecture of the 8086 microprocessor. The micro architecture of a 8086 employ parallel processing that is they are implemented with several simultaneously operating processing units. They have dedicated functions and they operate at the same time. This results in efficient use of the system bus and higher performance for the 8086 processor. The micro architecture of 8086 is classified into two parts: 1) Bus Interface Unit 2) Execution Unit. The BIU provides H/W functions, including generation of the memory and I/O addresses for the transfer of data between the outside world -outside the CPU. The EU receives program instruction codes and data from the BIU, executes these instructions, and store the results in the general registers. By passing the data back to the BIU, data can also be stored in a memory location or written to an output device. Note that the EU has no connection to the system buses. It receives and outputs all its data thru the BIU. Bus Interface Unit (BIU) This unit handles all transfer of data and addresses on the buses for the EU(execution unit). This unit sends out addresses, fetches instructions from memory, reads data from ports and memory and writes data to ports and memory. Different Parts of BIU: a. Segment Register b. Instruction Pointer c. The Queue 1.) Segment Register:- BIU contains four 16-bit segment registers as follows: Code segment (CS) register Stack segment (SS) register Extra segment (ES) register Data segment (DS) register Advance Microprocessor & Interfacing VICT CE 2014-15 2
Function of Segment Register In 8086 complete 1MB memory is divided into 16 logical segments. Each segment thus contains 64 KB of memory. While addressing any location in the memory bank, the Physical address is calculated from two parts, the first part is Segment address, and the second is Offset. The segment registers contain 16-bit segment base addresses related to different segments. Thus the CS, DS, ES, SS segment registers, respectively contain the segment addresses for the Code, Data, Extra and Stack segments. They may or may not be physical separated. Each segment register contains a 16-bit base address that points to the lowestaddressed byte of that particular segment in memory. Generation of physical address Segment address- 1005H Offset address - 5555H Segment address-1005h - 0001 0000 0000 0101 Shifted by 4-bit positions- 0001 0000 0000 0101 0000 + Offset address - 0101 0101 0101 0101 Physical address - 0001 0101 0101 1010 0101 1 5 5 A 5 Advance Microprocessor & Interfacing VICT CE 2014-15 3
Instruction Pointer It is 16-bit register, which identifies the location of the next word of instruction code that is to be fetched in the current code segment. IP contains an offset instead of the actual address of the next instruction. The 20-bit address produced after addition of the offset stored in IP to segment base address in the CS is called the Physical address of the code byte. The Queue The last section of BIU is the FIFO group of registers called a queue. It is basically a group of registers. This arrangement makes possible for the BIU to fetch the instruction byte while EU is decoding an instruction or executing an instruction which does not require use of buses. This arrangement is called pipelining. This is done to speed up the program execution. Registers Most of the registers contain data/instruction offsets within 64 KB memory segment. There are four different 64 KB segments for instructions, stack, data and extra data. To specify where in 1 MB of processor memory these 4 segments are located the 8086 microprocessor uses four Segment registers: Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor instructions. The processor uses CS segment for all accesses to instructions referenced by instruction pointer (IP) register. CS register cannot be changed directly. The CS register is automatically updated during far jump, far call and far return instructions. Stack segment (SS) is a 16-bit register containing address of 64KB segment with program stack. By default, the processor assumes that all data referenced by the stack pointer (SP) and base pointer (BP) registers is located in the stack segment. SS register can be changed directly using POP instruction. Data segment (DS) is a 16-bit register containing address of 64KB segment with program data. By default, the processor assumes that all data referenced by general registers (AX, BX, CX, DX) and index register (SI, DI) is located in the data segment. DS register can be changed directly using POP and LDS instructions. Extra segment (ES) is a 16-bit register containing address of 64KB segment, usually with program data. By default, the processor assumes that the DI register references the ES segment in string manipulation instructions. ES register can be changed directly using POP and LES instructions. It is possible to change default segments used by general and index registers by prefixing instructions with a CS, SS, DS or ES prefix. Advance Microprocessor & Interfacing VICT CE 2014-15 4
All general registers of the 8086 microprocessor can be used for arithmetic and logic operations. The general registers are: Accumulator register consists of 2 8-bit registers AL and AH, which can be combined together and used as a 16-bit register AX. AL in this case contains the low-order byte of the word, and AH contains the high-order byte. Accumulator can be used for I/O operations and string manipulation. Base register consists of 2 8-bit registers BL and BH, which can be combined together and used as a 16-bit register BX. BL in this case contains the low-order byte of the word, and BH contains the high-order byte. BX register usually contains a data pointer used for based, based indexed or register indirect addressing. Count register consists of 2 8-bit registers CL and CH, which can be combined together and used as a 16-bit register CX. When combined, CL register contains the low-order byte of the word, and CH contains the high-order byte. Count register can be used as a counter in string manipulation and shift/rotate instructions. Data register consists of 2 8-bit registers DL and DH, which can be combined together and used as a 16-bit register DX. When combined, DL register contains the low-order byte of the word, and DH contains the high-order byte. Data register can be used as a port number in I/O operations. In integer 32-bit multiply and divide instruction the DX register contains high-order word of the initial or resulting number. The following registers are both general and index registers: Stack Pointer (SP) is a 16-bit register pointing to program stack. Base Pointer (BP) is a 16-bit register pointing to data in stack segment. BP register is usually used for based, based indexed or register indirect addressing. Source Index (SI) is a 16-bit register. SI is used for indexed, based indexed and register indirect addressing, as well as a source data address in string manipulation instructions. Destination Index (DI) is a 16-bit register. DI is used for indexed, based indexed and register indirect addressing, as well as a destination data address in string manipulation instructions. Other registers: Instruction Pointer (IP) is a 16-bit register. Advance Microprocessor & Interfacing VICT CE 2014-15 5
Flags are a 16-bit register containing 9 1-bit flags: Overflow Flag (OF) - set if the result is too large positive number, or is too small negative number to fit into destination operand. Direction Flag (DF) - if set then string manipulation instructions will autodecrement index registers. If cleared then the index registers will be auto-incremented. Interrupt-enable Flag (IF) - setting this bit enables maskable interrupts. Single-step Flag (TF) - if set then single-step interrupt will occur after the next instruction. Sign Flag (SF) - set if the most significant bit of the result is set. Zero Flag (ZF) - set if the result is zero. Auxiliary carry Flag (AF) - set if there was a carry from or borrow to bits 0-3 in the AL register. Parity Flag (PF) - set if parity (the number of "1" bits) in the low-order byte of the result is even. Carry Flag (CF) - set if there was a carry from or borrow to the most significant bit during last result calculation. Instruction Set Instruction set of Intel 8086 processor consists of the following instructions: Data moving instructions. Arithmetic - add, subtract, increment, decrement, convert byte/word and compare. Logic - AND, OR, exclusive OR, shift/rotate and test. String manipulation - load, store, move, compare and scan for byte/word. Control transfer - conditional, unconditional, call subroutine and return from subroutine. Input/output instructions. Other - setting/clearing flag bits, stack operations, software interrupts, etc. RESULT: Familiarized the 8086 microprocessor. Advance Microprocessor & Interfacing VICT CE 2014-15 6
Practical 2 Date : AIM : Study of Debugging Commands. Run command prompt and go to Masm directory i.e. C:\masm\ Type the program by opening an editor using Edit command i.e. C:\masm\edit filename.asm After typing the program assemble the program using masm command. i.e. C:\masm\masm filename. asm; After assembling, link the file using link command. i.e. C:\masm\link filename.obj; Finally use debug or afdebug command to execute the program. C:\masm\debug filename.exe -t -g -I -d -q ; for single step execution ; for at a time execution ; for restarting the program execution ; to see the data segment ; to quit the execution C:\masm\afdebug filename.exe F1 g L filename.exe Quit ; for single step execution ; for at a time execution ; to reload the program ; to come out of the execute screen Advance Microprocessor & Interfacing VICT CE 2014-15 7
Practical 3(a) Date : Aim: Write ALP to transfer the data 1234h into register Ax, Bx, Cx, Dx. Using immediate addressing mode. Program: DATA SEGMENT DATA ENDS CODE SEGMENT ASSUME CS: CODE, DS: DATA START: MOV AX, DATA Output: MOV DS, AX MOV AX, 1234H MOV BX, 1234H MOV CX, 1234H MOV DX, 1234H INT3 CODE ENDS END START AX BX CX DX 1234H 1234H 1234H 1234H Advance Microprocessor & Interfacing VICT CE 2014-15 8
Practical 3(b) Date : Aim: Write ALP to copy the data from register Ax into Bx, Cx & Dx and DI using register mode. Program: DATA SEGMENT DATA ENDS CODE SEGMENT ASSUME CS: CODE, DS: DATA START: MOV AX, 1111H MOV DS, AX MOV BX, AX MOV CX, BX MOV DX, CX MOV DI, DX INT3 CODE ENDS Output: END START AX 1111 BX 1111 CX 1111 DX 1111 DI 1111 Advance Microprocessor & Interfacing VICT CE 2014-15 9
Practical 4 Date : Aim: Write ALP to find average of ten 16-bit numbers. Program: DATA SEGMENT A DW 0100H,0200H,0300H,0400H,0500H,0600H,0700H,0800H,0900H,0A00H B DW? DATA ENDS CODE SEGMENT ASSUME CS: CODE, DS: DATA START: MOV AX, DATA MOV DS, AX CLC MOV AX, 0000H MOV CL, 0AH LEA SI, A BACK: ADC AX, [SI] INC SI INC SI DEC CL CMP CL, OOH JE NEXT JMP BACK Advance Microprocessor & Interfacing VICT CE 2014-15 10
NEXT: LEA DI, B MOV [DI], AX MOV IS, 0AH DIV SI INC DI INC DI MOV [DI], AX INT3 CODE ENDS END START Output: AX 1B80 Advance Microprocessor & Interfacing VICT CE 2014-15 11
Practical 5 Date : Aim: Write ALP to separate odd and even number from given array. Program: DATA SEGMENT A DW 298H,255H,253H,299H,125H,072H,360H,120H,351H,111H B DW 10 DUP (0) C DW 10 DUP (0) DATA ENDS CODE SEGMENT ASSUME CS: CODE, DS: DATA START: MOV AX, DATA MOV DS, AX LEA SI, A LEA DI, B LEA BP, C MOV CL, 0AH NEXT: CMP CL, 00H JE END1 MOV AX, [SI] MOV BX, 0002H DIV BX CMP DX, 0000H JE EVEN1 MOV AX, [SI] MOV [BP], AX INC SI Advance Microprocessor & Interfacing VICT CE 2014-15 12
INC SI INC BP INC BP LOOP NEXT JMP END1 EVEN1: MOV AX, [SI] MOV [DI], AX INC SI INC SI INC DI INC DI LOOP NEXT END1: INT 3 CODE ENDS Output: END START AX 298, 072, 360, 120 BX 255, 253, 299, 215, 351, 111 Advance Microprocessor & Interfacing VICT CE 2014-15 13
Practical 6 Date : Aim: Write ALP for addition of two random numbers by using MACRO Program: ADDI MACRO MOV AL, N1 ADD AL, N2 ENDM DATA SEGMENT N1 DB 20H N2 DB 30H N3 DB? DATA ENDS CODE SEGMENT ASSUME CS: CODE, DS: DATA START: MOV AX, DATA INT3 MOV DS, AX MOV AX, 0000H ADDI CODE ENDS END START OUTPUT: MOV N3, AL AX 1B80 Advance Microprocessor & Interfacing VICT CE 2014-15 14
Practical 7 Date : Aim: Write ALP for multiplication of two 32-bit numbers. Program: DATA SEGMENT A DD 12345678H, 31101600H B DD? DATA ENDS CODE SEGMENT ASSUME CS: CODE, DS: DATA START: MOV AX, DATA MOV DS, AX MOV AX, [SI] MOV BX, [SI+6] MUL BX MOV [DI], AX MOV CX, DX MOV AX, [SI+2] MUL BX ADD AX, CX MOV [DI+8], DX MOV [DI+2], AX MOV AX,[SI] MOV BX, [SI+4] MUL BX MOV CX, DX MOV [DI+4], AX Advance Microprocessor & Interfacing VICT CE 2014-15 15
MOV AX, [SI+2] MUL BX ADD AX, CX MOV [DI+6], AX MOV [DI+10], DX MOV AX, [DI] ADD AX, [DI+6] MOV [DI+12] AX MOV AX,[DI+2] ADD AX, [DI+10] MOV [DI+14], AX MOV AX, [DI+14] MOV [DI+6], AX MOV AX, [DI+12] MOV [DI+14], AX MOV AX, [DI+14] MOV [DI+2], AX MOV AX, [DI+8] MOV [DI], AX INT3 CODE ENDS END START Output: AX 37D5DB68EE5000 Advance Microprocessor & Interfacing VICT CE 2014-15 16
Practical 8 Date : Aim: Write ALP to find maximum number from given array. Program: DATA SEGMENT A DB 22H, 34H, 79H, 3AH, 17H DATA ENDS CODE SEGMENT ASSUME CS: CODE, DS: DATA START: MOV AX, DATA MOV DS, AX LEA SI, A MOV AL, [SI] MOV CL, 04H AGAIN: INC SI MOV BL, [SI] CMP AL, BL JBE OUT1 BACK: DEC CL CMP CL, 0000H JE OUT2 JMP AGAIN OUT1: MOV AL, BL JMP BACK Advance Microprocessor & Interfacing VICT CE 2014-15 17
OUT2: MOV DL, AL INT3 CODE ENDS END START Output: AX 3A Advance Microprocessor & Interfacing VICT CE 2014-15 18
Practical 9 Date : Aim: Write ALP to find minimum number from a given array. Program: DATA SEGMENT A DB 22H, 34H, 79H, 3AH, 17H DATA ENDS CODE SEGMENT ASSUME CS: CODE, DS: DATA START: MOV AX, DATA MOV DS, AX LEA SI, A MOV AL, [SI] MOV CL, 04H AGAIN: INC SI MOV BL, [SI] CMP AL, BL JA OUT1 BACK: DEC CL CMP CL, 0000H JE OUT2 JMP AGAIN OUT1: MOV AL, BL JMP BACL OUT2: MOV DL, AL Advance Microprocessor & Interfacing VICT CE 2014-15 19
INT3 CODE ENDS END START Output: AX 17 Advance Microprocessor & Interfacing VICT CE 2014-15 20
Practical 10 Date : Aim: Write ALP to arrange array in ascending order. Program: DATA SEGMENT A DB 62H, 34H, 54H, 66H, 12H DATA ENDS CODE SEGMENT ASSUME CS: CODE, DS: DATA START: MOV AX, DATA MOV DS, AX MOV CH, 05H AGAIN: MOV CL, 05H LEA SI, A BACK: MOV AL, [SI] INC SI MOV BL, [SI] CMP AL, BL JA SWAP DEC SI MOV [SI], AL INC SI NEXT: DEC CL CMP CL, 00H JBE OUT1 JMP BACK Advance Microprocessor & Interfacing VICT CE 2014-15 21
SWAP: MOV [SI], AL DEC SI MOV [SI], BL INC SI JPMP NEXT OUT1: DEC CH CMP CH, 00H JA AGAIN INT3 CODE ENDS END START Output: AX 12, 34, 54, 62, 66 Advance Microprocessor & Interfacing VICT CE 2014-15 22