Announcements. Microprogramming IA-32. Microprogramming Motivation. Microprogramming! Example IA-32 add Instruction Formats. Reading Assignment

Similar documents
5.7. Microprogramming: Simplifying Control Design 5.7

Microprogrammed Control Approach

CC 311- Computer Architecture. The Processor - Control

EECE 417 Computer Systems Architecture

Implementing the Control. Simple Questions

Multicycle Approach. Designing MIPS Processor

Chapter 4 The Processor (Part 2)

Initial Representation Finite State Diagram Microprogram. Sequencing Control Explicit Next State Microprogram counter

Microprogramming: Basic Idea

ENE 334 Microprocessors

The Processor: Datapath & Control

ECE468 Computer Organization and Architecture. Designing a Multiple Cycle Controller

Initial Representation Finite State Diagram. Logic Representation Logic Equations

CS152 Computer Architecture and Engineering Lecture 13: Microprogramming and Exceptions. Review of a Multiple Cycle Implementation

Multicycle conclusion

CpE 442. Designing a Multiple Cycle Controller

ECE 361 Computer Architecture Lecture 11: Designing a Multiple Cycle Controller. Review of a Multiple Cycle Implementation

Review: Abstract Implementation View

Micro-programmed Control Ch 17

Hardwired Control (4) Micro-programmed Control Ch 17. Micro-programmed Control (3) Machine Instructions vs. Micro-instructions

ECE 486/586. Computer Architecture. Lecture # 7

Lecture 5 and 6. ICS 152 Computer Systems Architecture. Prof. Juan Luis Aragón

1 5. Addressing Modes COMP2611 Fall 2015 Instruction: Language of the Computer

IC220 SlideSet #2: Instructions (Chapter 2)

Instruction Set Architecture. "Speaking with the computer"

CS152 Computer Architecture and Engineering. Lecture 8 Multicycle Design and Microcode John Lazzaro (

Introduction. ENG3380 Computer Organization and Architecture MIPS: Data Path Design Part 3. Topics. References. School of Engineering 1

Instruction Set Architectures

Micro-programmed Control Ch 15

Chapter 5 Processor Design Advanced Topics

Machine Instructions vs. Micro-instructions. Micro-programmed Control Ch 15. Machine Instructions vs. Micro-instructions (2) Hardwired Control (4)

Stored Program Concept. Instructions: Characteristics of Instruction Set. Architecture Specification. Example of multiple operands

Micro-programmed Control Ch 15

Computer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: MIPS Instruction Set Architecture

Lets Build a Processor

Outline of today s lecture. EEL-4713 Computer Architecture Designing a Multiple-Cycle Processor. What s wrong with our CPI=1 processor?

Chapter 2. lw $s1,100($s2) $s1 = Memory[$s2+100] sw $s1,100($s2) Memory[$s2+100] = $s1

Chapter 3 MIPS Assembly Language. Ó1998 Morgan Kaufmann Publishers 1

TDT4255 Computer Design. Lecture 4. Magnus Jahre. TDT4255 Computer Design

CPE 335. Basic MIPS Architecture Part II

Introduction to CPU Design

Microprogramming. The DLX ISA

T F The immediate field of branches is sign extended. T F The immediate field of and immediate (andi) and or immediate (ori) is zero extended.

Computer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: Data Paths and Microprogramming

Virtual Machines and Dynamic Translation: Implementing ISAs in Software

Basic Processing Unit: Some Fundamental Concepts, Execution of a. Complete Instruction, Multiple Bus Organization, Hard-wired Control,

Instructions: MIPS arithmetic. MIPS arithmetic. Chapter 3 : MIPS Downloaded from:

Designing a Multicycle Processor

Mapping Control to Hardware

Microprogramming. Microprogramming

361 datapath.1. Computer Architecture EECS 361 Lecture 8: Designing a Single Cycle Datapath

Materials: 1. Projectable Version of Diagrams 2. MIPS Simulation 3. Code for Lab 5 - part 1 to demonstrate using microprogramming

Lecture 3: Instruction Set Architecture

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA MIPS ISA. In a CPU. (vonneumann) Processor Organization

Advanced Computer Architecture

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA

The Big Picture: Where are We Now? CS 152 Computer Architecture and Engineering Lecture 11. The Five Classic Components of a Computer

Digital System Design Using Verilog. - Processing Unit Design

Outline. EEL-4713 Computer Architecture Designing a Single Cycle Datapath

14:332:331. Computer Architecture and Assembly Language Fall Week 5

CS 430 Computer Architecture. C/Assembler Arithmetic and Memory Access William J. Taffe. David Patterson

Topic #6. Processor Design

CSEE 3827: Fundamentals of Computer Systems

More advanced CPUs. August 4, Howard Huang 1

Recap: A Single Cycle Datapath. CS 152 Computer Architecture and Engineering Lecture 8. Single-Cycle (Con t) Designing a Multicycle Processor

Computer Systems Laboratory Sungkyunkwan University

CS152 Computer Architecture and Engineering January 29, 2013 ISAs, Microprogramming and Pipelining Assigned January 29 Problem Set #1 Due February 14

RTN (Register Transfer Notation)

Chapter 2. Instructions: Language of the Computer. HW#1: 1.3 all, 1.4 all, 1.6.1, , , , , and Due date: one week.

ECE260: Fundamentals of Computer Engineering

Computer Architecture

Controller Implementation--Part II

ISA and RISCV. CASS 2018 Lavanya Ramapantulu

Computer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: MIPS Instruction Set Architecture

Lecture 4: Instruction Set Architecture

CPU Organization (Design)

CENG 3420 Computer Organization and Design. Lecture 06: MIPS Processor - I. Bei Yu

MICROPROGRAMMED CONTROL

CSE 141 Computer Architecture Spring Lecture 3 Instruction Set Architecute. Course Schedule. Announcements

Chapter 1. Computer Abstractions and Technology. Lesson 3: Understanding Performance

Operations, Operands, and Instructions

Chapter 4. Chapter 4 Objectives. MARIE: An Introduction to a Simple Computer

Systems Architecture I

Topics/Assignments. Class 10: Big Picture. What s Coming Next? Perspectives. So Far Mostly Programmer Perspective. Where are We? Where are We Going?

ECE369. Chapter 5 ECE369

COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface. 5 th. Edition. Chapter 4. The Processor

THE MICROPROCESSOR Von Neumann s Architecture Model

ELEC / Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2)

Chapter 2: Instructions:

Computer Architecture. Chapter 2-2. Instructions: Language of the Computer

MC9211Computer Organization. Unit 4 Lesson 1 Processor Design

Advanced Computer Architecture-CS501. Vincent P. Heuring&Harry F. Jordan Chapter 2 Computer Systems Design and Architecture

Topic Notes: MIPS Instruction Set Architecture

Midterm I October 6, 1999 CS152 Computer Architecture and Engineering

COMP3221: Microprocessors and. and Embedded Systems. Instruction Set Architecture (ISA) What makes an ISA? #1: Memory Models. What makes an ISA?

Review of instruction set architectures

MARIE: An Introduction to a Simple Computer

Computer Architecture 2/26/01 Lecture #

MARIE: An Introduction to a Simple Computer

Processing Unit CS206T

Transcription:

Announcements Microprogramming CS 333 Fall 2006 Reading Assignment Read Chapter 5, Section 5.4 end of chapter Lab 2 Postlab Homework clarifications 4.11, 4.12, 4.19 Microprogramming Motivation Control functions Complex Manageable for smaller, more regular instruction sets, but consider: IA-32 IA-32 Intel Architecture 32-bit CISC-like instruction set architecture Several hundred instructions of varying classes Varying length instructions Many addressing modes First implementation 80386 Pentium, Pentium 4, AMD K7 Example IA-32 add Instruction Formats Microprogramming! Thousands of states Hundreds of different control sequences Control signals can be thought of as if they are instructions executed by the datapath Simplifies control design Varying lengths/formats, makes control unit design more complicated

Microprogramming Process 1. Define microinstruction format 2. Create microprogram 3. Implement the microprogram Defining the Microinstruction Format Microinstructions To avoid confusion with ISA (instruction set architecture) microinstructions Defines set of datapath control signals to assert in a given state Executing a microinstruction Asserts control signals specified in microinstruction Microprogram Algorithmic description for how to execute instructions (from ISA) in a program by asserting a sequence of control signals Each instruction in ISA has a list of microinstructions Ex., control sequences in concrete RTN for uencing The next microinstruction to be executed needs to be specified Analogy In programs we use functions/methods to reuse commonly executed sequences of instructions (control flow/subroutines) Microprograms are similar Several instructions in the ISA may have similar control sequences (these can be reused instead of recoded) Example, every instruction at least needs to be fetched before execution Microprogramming Designing the control symbolically Analogy: Assembly language is a symbolic representation of machine instructions Fields: op code, registers, offsets, immediate field, etc. Microprogram is a symbolic representation of microinstructions Also has fields. Many different arrangements Microcoded control units are used to implement complex microprograms

Microinstruction Format Need to choose: Number of fields What control signals are specified by each field Would like: Readability: Format needs to be simple enough to write and understand the microprogram Difficult to write inconsistent microinstructions Don t want a particular control signal to be specified as two different values in one microinstruction Signals never asserted simultaneously can share the same field More Parallels with Assembly Programs Microinstruction fields may allow combinations that can t be supported by the datapath microassembler checks/flags these errors Control Store Often a PLA (programmable logic array) or ROM (read-only memory) Each entry has an address 0 a1 Microaddress a2 a3 2 n -1 µcode for instruction fetch µcode for add µcode for br µcode for shr Ways of uencing 1. Increment address of current microinstruction like sequential execution of instructions often is default 2. Branch to the next microinstruction that executes the next instruction (ISA) Branch to the instruction fetch microinstruction sequence 3. Dispatch Lookup table (PLA) k µbranch control bits m bits wide c control signals n branch addr. bits Example Microinstruction Fields Creating a Microprogram control Add cause to add Subtract cause to subtract 1 first source register to Register A first input 2 second operand Register B, second input 4-for + 4 Extend (sign extend)

Example Microinstruction Fields Register Control Read read rb, rc write output to ra in register file ory Read read memory using as address; write result to IR Read read from memory using output as address; write result to MD write to memory output as address; write result to MD More Microinstruction Fields control write output of into Branch address write with branch target from instruction uencing choose next instruction sequentially go to first microinstruction to begin a new instruction Dispatch dispatch using ROM Instruction Microinstructions ory Reference Instructions Label 1 2 Reg Label 1 2 Reg Add Add 4 Extsh ft Read Read Disp atch LW Add A Exte nd MD Read Disp atch SW Add Instruction Branch Instruction (brzr) Label 1 2 Reg Label 1 2 Reg AddI nst Add A B brzr Subt A B out Cond

The Final Microprogram Implementing the Microprogram Translating Microprogram to Hardware Need: 1. uencing function 2. Method of storing main control function Comparisons Assembly language program Microprogram microcode Assembler µassembler Machine Language 00010001 Microcode 000011100

Comparisons (cont d) Machine Language/ Program store 1024 (RAM) Microcode/Control store (ROM/PLA) 16 Microcode Schemes 2 32 Different Microcode Schemes 1. Mostly Horizontal (Example) 2. Horizontal 3. Vertical Horizontal 1 bit for every control signal textbook example Microinstruction format Branch cont rol Cont rol signals Branch address P C o ut M i A n P C i n C outa in E nd Vertical Each distinct microinstruction is a single signal sent to control points to be asserted Horizontal vs. Vertical Tradeoffs Horizontal wider microinstruction word width 1 bit for each control signal Vertical narrower microinstruction word width Example, 512 distinct microinstructions 512=2 9, so 9 bits needed to encode control word control signals are fanned out to control points in datapath can be impractical, but saves bit count

Microprogramming Tradeoffs Pros of Microprogramming Ease of design Flexibility Easy to adapt to changes in organization, timing, technology Can make changes late in design cycle, or even in the field Can implement very powerful instruction sets (just more control memory) Generality Can implement multiple instruction sets on same machine. Can tailor instruction set to application. Compatibility Many organizations, same instruction set Cons of Microprogramming Costly to implement Slow Then vs. Now Control units are now integral part of the processor (same die) Can t be changed independent of processor ROM no longer faster than RAM Instruction sets are smaller Reduced complexity CAD tools are better now Relative difficulty of implementing control logic vs. ROM/PLA is small Question 1 Things to Think About Is adding a complex instruction implemented with microprogramming faster than using a sequence of simpler instructions?

Example: IA-32 LOOP Decrements register and branches to a label if the decremented register is not zero Used for loops which have a fixed number of iterations Slower than the macrocode sequence of simpler instructions Optimizing compilers avoid generating LOOP instructions Question 2 If there s space in the control store, why not implement new and cool instructions? Upward compatibility future models will need to support the instruction, even if the space is needed later Example: Intel 80286 Many instructions added to the instruction set Protection mechanism (mostly unused today) Still has to be implemented in newer implementations Decimal instructions (decimal arithmetic on bytes) Rarely used today, performing binary arithmetic and converting to and from decimal is faster Still has to be implemented in newer implementations Microprogramming Summary Why? Microprogramming process Design microinstruction format the microprogram Implement the microprogram Terminology microinstruction, microprogram, microcode Microprogramming Summary (cont d) Similarities and differences between assembly language programs and microprograms Difference between microprogram and microcode Different microcode schemes Horizontal Vertical Microprogramming tradeoffs