Overview The LV51131T is a protection IC for 2-cell lithium-ion secondary batteries.

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Ordering number : ENA1152A LV51131T CMOS IC 2Cell LithiumIon Secondary Battery Protection IC Overview The LV51131T is a protection IC for 2cell lithiumion secondary batteries. Features Monitoring function for each cell: Detects overcharge and overdischarge conditions and controls the charging and discharging operation of each cell. High detection voltage accuracy: Overcharge detection accuracy ±25mV Overdischarge detection accuracy ±100mV Hysteresis cancel function: The hysteresis of overdischarge detection voltage is cancelled by of a load after overcharging has been detected. Discharge current monitoring function: Detects overcurrents, load shorting, and excessively high voltage of a charger. Low current consumption: Normal operation mode typ. 6.0μA Stand by mode max. 0.2μA 0V cell charging function: Charging is enabled even when the cell voltage is 0V by giving a voltage between the pin and V pin. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. 81011HKPC/51408MSPC 20080305S00002 No.A11521/8

Specifications Absolute Maximum Ratings at Ta = 25 C Parameter Symbol Conditions Ratings Unit Power supply voltage V DD 0.3 to 12 V Input voltage Charger minus voltage Output voltage V V DD 28 to V DD 0.3 V Cout pin voltage Vcout V DD 28 to V DD 0.3 V Dout pin voltage Vdout V SS 0.3 to V DD 0.3 V Allowable power dissipation Pd max Independent IC 170 mw Operating ambient temperature Topr 30 to 85 C Storage temperature Tstg 40 to 125 C Electrical Characteristics at Ta = 25 C, unless especially specified. Ratings Parameter Symbol Conditions Unit min typ max Operation input voltage Vcell Voltage between V DD and V SS 1.5 10 V 0V cell charging minimum operation voltage Vmin Voltage between V DD V under V DD V SS =0 1.5 V Overcharge detection voltage Vd1 4.325 4.350 4.375 V Ta=0 to 45 C *1 4.315 4.350 4.385 Overcharge release voltage Vr1 V Vd3 4.100 4.150 4.200 V V > Vd3 4.250 4.360 V Overcharge detection delay time td1 V DD Vc=3.5V 4.5V, VcV SS =3.5V 0.5 1.0 1.5 s Overcharge release delay time tr1 V DD Vc=4.5V 3.5V, VcV SS =3.5V 20.0 40.0 60.0 ms Overdischarge detection voltage Vd2 2.20 2.30 2.40 V Overdischarge release hysteresis Vh2 10.0 20.0 40.0 mv voltage Overdischarge detection delay time td2 V DD Vc=3.5V 2.2V, VcV SS =3.5V 50 100 150 ms Overdischarge release delay time tr2 V DD Vc=2.2V 3.5V, VcV SS =3.5V 0.5 1.0 1.5 ms Overcurrent detection voltage Vd3 V DD Vc=3.5V, VcV SS =3.5V 0.130 0.150 0.170 V Overcurrent release hysteresis voltage Vh3 V DD Vc=3.5V, VcV SS =3.5V 5.0 10.0 20.0 mv Overcurrent detection delay time td3 V DD Vc=3.5V, VcV SS =3.5V 10.0 20.0 30.0 ms Overcurrent release delay time tr3 V DD Vc=3.5V, VcV SS =3.5V 0.5 1.0 1.5 ms Short circuit detection voltage Vd4 V DD Vc=3.5V, VcV SS =3.5V 1.0 1.3 1.6 V Short circuit detection delay time td4 V DD Vc=3.5V, VcV SS =3.5V 0.125 0.250 0.500 ms Excessive charger detection voltage Vd5 Between V DD Vc=3.5V, VcV SS =3.5V 0.60 0.45 0.30 V Voltage between V and V SS Excessive charge detection release Vh5 V DD Vc=3.5V, VcV SS =3.5V 25.0 50.0 100.0 mv hysteresis voltage Standby release voltage Vstb Between V DD Vc=2.0V, VcV SS =2.0V V DD 0.4 V DD 0.5 V DD 0.6 V Voltage between V and V SS Excessive charger detection delay time td5 V DD Vc=3.5V, VcV SS =3.5V *2 0.5 1.5 3.0 ms Excessive charger release delay time tr5 V DD Vc=3.5V, VcV SS =3.5V 0.5 1.5 3.0 ms Internal resistance (VMV DD ) R DD After overdischarge is detected. 100 200 400 kω Internal resistance (VMV SS ) R SS After overcurrent or shortcircuit is detected. 15 30 60 kω Cout Nch ON voltage V O L1 I O L=50μA, V DD Vc=4.4V, VcV SS =4.4V 0.5 V Cout Pch ON voltage V O H1 I O L=50μA, V DD Vc=3.9V, VcV SS =3.9V V DD 0.5 V Dout Nch ON voltage V O L2 I O L=50μA, V DD Vc=2.2V, VcV SS =2.2V 0.5 V Dout Pch ON voltage V O H2 I O L=50μA, V DD Vc=3.9V, VcV SS =3.9V V DD 0.5 V Vc input current Ivc V DD Vc=3.5V, VcV SS =3.5V 0.0 1.0 μa Current consumption I DD V DD Vc=3.5V, VcV SS =3.5V 6.0 13.0 μa Standby current Istb V DD Vc=2.2V, VcV SS =3.5V 0.2 μa Tterminal input ON voltage Vtest V DD Vc=3.5V, VcV SS =3.5V V DD 0.4 V DD 0.5 V DD 0.6 V *1 The Ratings of the table above is a design targets and are not measured. *2 Under overdischarge state, delay operation starts after release of overdischarge. No.A11522/8

Package Dimensions unit : mm (typ) 3245B 200 Pd max Ta (0.53) 8 1 2 3.0 0.65 3.0 0.25 (0.85) 4.9 1.1MAX 0.125 0.5 Allowable power dissipation, Pd max mw Independent IC 170 150 100 68 50 0 30 20 0 20 40 60 80 100 Ambient temperature, Ta C 0.08 SANYO : MSOP8(150mil) Pin Assignment Dout T Vc Sense 8 7 6 5 1 2 V DD Cout 3 4 V V SS Top view Pin Functions Pin No. Symbol Description 1 V DD V DD pin 2 Cout Overcharge detection output pin 3 V Charger minus voltage input pin 4 V SS V SS pin 5 Sense Sense pin 6 Vc Intermediate between both cell voltage input pin 7 T Pin to shorten detection time ( H :Shortening mode, L or Open :Normal mode) 8 Dout Overdischarge detection output pin No.A11523/8

Block Diagram Sence 5 1 Level shift td5,tr5 Vc 6 td1,tr1 Delay control logic td2,tr2 td3,tr3 td4 2 8 Cout Dout 4 3 VSS V 7 T No.A11524/8

Functional Description Overcharge detection If either of the cell voltage is equal to or more than the overcharge detection voltage, stop further charging by turning L the Cout pin and turning off external Nch MOS FET after the overcharge detection delay time. This delay time is set by the internal counter. The overcharge detection comparator has the hysteresis function. Note that this hysteresis can be cancelled by connecting the load after detection of overcharge detection. and it becomes small hysteresis comparator has its own. Once overcharge detection is made, overcurrent detection is not made to prevent incorrect operations. Note that shortcircuit can be detected. Overcharge release If both cell voltages become equal to or less than the overcharge release voltage when VM voltage is equal to or less than Vd3, or when VM voltage is more than Vd3 with load connected, the Cout pin returns to H after the overcharge release delay time set by the internal counter. When VM voltage is more than Vd3 with load connected and either cell or both cell voltages are equal to or more than the overcharge release voltage, the Cout pin does not return to H. But the load current flows through the parasitic diode of external Nch MOS FET on Cout, consequently each cell voltage becomes equal to or less than overcharge release voltage, the Cout pin returns to H. after the overcharge release delay time. However, excessive voltage charger is connected as mentioned below, Cout pin does not return to H because excessive charger detection starts after overcharge release operation. Overdischarge detection When either cell voltage is equal to or less than overdischarge voltage, the IC stops further discharging by turning the Dout pin L and turning off external Nch MOS FET after the overcharge detection delay time. The IC goes into standby mode after detecting overdischarge and its consumption current is kept at about 0A. After overdischarge detection, the V pin will be connected to pin via internal resistor (typ 200kΩ). Overdischarge release Release from overdischarge is made by only connecting charger. If the V pin voltage becomes equal to or lower than the standby release voltage by connecting charger after detecting overdischarge, The IC is released from the standby state to start cell voltage monitoring. While both cell voltages are equal to or less than overdischarge voltages, charging will be made through the parasitic diode of external Nch FET on Dout pin. If both cell voltages become equal to or more than the overdischarge detection voltage by charging, the Dout pin returns to H after the overdischarge release delay time set by the internal counter. Overcurrent detection When excessive current flows through the battery, the V pin voltage rises by the ON resister of external MOS FET and becomes equal to or more than the overcurrent detection voltage, the Dout pin turns to L after the overcurrent detection delay time and the external Nch MOS FET is turned off to prevent excessive current in the circuit. The detection delay time is set by the internal counter. After detection, the V pin will be connected to VSS via internal resistor (typ. 30kΩ). It will not go into standby mode after detecting overcurrent. Short circuit detection If greater discharging current flows through the battery and the V pin voltage becomes equal to or more than the shortcircuit detection voltage, it will go into shortcircuit detection state after the short circuit delay time shorter than the overcurrent detection delay time. When shortcircuit is detected, just like the time of overcurrent detection, the Dout pin turns to L and external Nch MOS FET is turned off to prevent high current in the circuit. The V pin will be connected to VSS after detection via internal resistor (typ. 30kΩ). It will not go into standby mode after detecting short circuit. Overcurrent/shortdetection release After detecting overcurrent or short circuit, the internal resistor (typ. 30kΩ) between V pin and VSS pin becomes effective. If the load resistor is removed, the V pin voltage will be pulled down to the VSS level. Thereafter, the IC will be released from the overcurrent/shortcircuit detection state when the V pin voltage becomes equal to or less than the overcurrent detection voltage, and the Dout pin returns to H after overcurrent release delay time set by the internal counter. No.A11525/8

Excessive charger detection/release If the voltage between V pin and VSS pin becomes equal to or less than the excessive charger detection voltage by connecting a charger, no charging can be made by turning the Cout pin L after delay time and turning off the external Nch MOS FET. If that voltage returns to equal to or more than the excessive charger detection voltage during detection delay time, the excessive charger detection will be stopped. If the voltage between V pin and VSS pin becomes equal to or more than the excessive charger detection voltage after excessive charger detection, the Cout returns to H after delay time. The detection/return delay time is set internally. If Dout pin is L, charging will be made through the parasitic diode of external Nch FET on Dout pin. In that case, the voltage between V pin and VSS pin is nearly Vf which is less than the excessivecharger detection voltage, therefore no excessive charger detection will be made during overdischarge, overcurrent and shortcircuit detection. Furthermore, if excessive voltage charger is connected to the overdischarged battery, no excessive charger detection is made while the Dout pin is L. But the battery is continued charging through the parasitic diode. If the battery voltage rises to the overdischarge detection voltage and the voltage between V pin and VSS pin remains equal to or less than the excessive charger detection voltage, the delay operation will be started after Dout pin turns to H. 0V cell charging operation If voltage between and V becomes equal to or more than the 0V cell charging lowest operation voltage when the cell voltage is 0V, the Cout pin turns to H and charging is enabled. Shorten the test time By turning T pin to the, the delay times set by the internal counter can be cut. If T pin is open, L the delay times are normal. Delay time not set by the counter just like as short circuit detection delay cannot be controlled by this pin. In some circuitboard layout, an excessive current at the load short might cause this IC be in miss operation like as in standby mode due to VSS line impedance. Therefore we recommend that the T pin is connected to the VSS pin. Operation in case of detection overlap During overcharge detection Overlap state Overdischarge detection is made Operation in case of detection overlap Overcharge detection is preferred. If overdischarge state continues even after overcharge detection, overdischarge detection is resumed. State after detection When overcharge state is made first, V is released. When overdischarge is detected after overcharge state is made, the IC does not go into the standby mode. Note that V is connected to V DD via 200kΩ. When, during overdischarge detection When, during overcurrent detection Overcurrent detection is made Overcharge detection is made Overcurrent detection is made Overcharge detection is made Overdischarge detection is made (*1) Both detections can be made in parallel. Overcharge detection continues even when the overcurrent state is made first. If the overcharge state is made first, overcurrent detection is interrupted. Overdischarge detection is interrupted and overcharge detection is preferred. When overdischarge state continues even after overcharge state is made, overdischarge detection is resumed. (*2) When overcurrent state is made first, V is connected to V SS via 30kΩ. When overcharge state is made first, V is released. The IC does not go into the standby mode when overdischarge state is made after overcharge detection. Note that V is connected to V DD via 200kΩ. (*3) Both detections can be made in parallel. (*4) If overcurrent state is made first, V will be Overdischarge detection continues even when connected to V SS via 30kΩ. If overdischarge the overcurrent state is made first. But overcurrent detection is interrupted when the over from V SS and connected to V DD via 200kΩ to detection is made next, V will be disconnected discharge state is made first. get into standby mode. If overdischarge state is made first, V will be connected to V DD via 200kΩ to get into standby state. (*1) (*2) (*3) (*4) (Note) Shortcircuit detection can be made independently. Excessive charger detection cannot be made during overdischarge, overcurrent and shortcircuit detection. And its delay time starts after the Dout pin returns to H. No.A11526/8

Timing Chart [Cout Output System] Hysteresis cancellation by load Charger Charger Charger Overcharger Vd1 Vr1 Vd2 Charging recovery depends on charger voltage when connecting charger. Vd4 Discharging via FETparasite Di Discharging via FETparasite Di V Vd3 VSS Vd5 Cout V td1 tr1 td1 tr1 td5 tr5 [Dout Output System] Overcharge detection state Overcharge detection state Overcharger detection state Charger Overcharger Vd1 Vr1 Overcurrent occurrence shortcircuit occurrence Vd2 To standby To standby V Vd4 Vd3 VSS Vd5 Charging via FETparasite Di Dout td2 tr2 td3 tr3 td4 tr3 td2 tr2 VSS Overdischarge detection state Overcurrent detection state Shortcircuit detection state Cout V Overcharger detection upon charging overdischarged battery is activated after return from overcharge. td5 No.A11527/8

Application Circuit Example R1 R4 R2 C1 C2 V DD Sense T Vc LV51131T V C3 V SS V SS Dout Cout R3 Components Recommended value max unit R1, R2 100 500 Ω R3 2k 4k Ω R4 100 1k Ω C1, C2, C3 0.1μ 1μ F * These numbers don't mean to guarantee the characteristic of the IC. * In addition to the components in the upper diagram, it is necessary to insert a capacitor with enough capacity between and VSS of the IC as near as possible to stabilize the power supply voltage to the IC. * It is advisable to connect the T pin with the VSS pin. There is no problem even if the T pin is left open. SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply highquality highreliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of August, 2011. Specifications and information herein are subject to change without notice. PS No.A11528/8