Lab 1. OMAP5912 Starter Kit (OSK5912) Developing DSP Applications 1. Overview In addition to having an ARM926EJ-S core, the OMAP5912 processor has a C55x DSP core. The DSP core can be used by the ARM to offload signal processing intensive applications (multimedia encoding/decoding, medical imaging, etc). The DSP/BIOS Link and Reference Frameworks 6 (RF6) products included on the OSK5912 CDROM provide easy to use software that allows the user to leverage the DSP from ARM Linux applications. DSP/BIOS Link is a communications library that allows the ARM to control and communicate with the 55x DSP through a standard API. Reference Frameworks 6 for expressdsp Software is provided as starterware for developing applications that use DSP/BIOS and the TMS320 DSP Algorithm Standard (also known as XDAIS). The audio demo referred to in section 1.1 uses both DSP/BIOS Link (for loading the demo onto the DSP and for streaming audio data from the DSP to ARM) and RF6 (to manage the FIR filter and volume algorithms on the DSP). The following sections describe how to build and debug DSP application code for two types of users: Those that want to use a JTAG emulator and Code Composer Studio for OMAP (on Windows), and those that would prefer to build and debug the DSP code within Linux.
2. Hardware Requirements for debugging Figure 1 shows the typical hardware setup used for debugging Link and RF6 applications on the OMAP platform when using CCS and a JTAG emulator. Note that the stereo speakers and CD player are only required for debugging the RF6 audio application. Figure 1. Hardware Device Connections This hardware setup consists of the following platforms: Windows Development/Debug Host. This machine should be a PC running Microsoft Windows NT, 2000, or XP. It is used to build, run, and debug the DSP-side content using Code Composer Studio. The machine must have a free COM port for terminal emulation. Red Hat Linux Development/Debug Host. This may be either a dedicated Linux host workstation or a Linux Virtual machine running under Windows. It should run Red Hat Linux version 7.3 or greater. VmWare (www.vmware.com) is one such package that has been successfully used with RF6. This host is where you build the GPP-side of your RF6-based applications. The Ethernet connection allows the target board to boot up into the Linux kernel and mount its root filesystem for example, using the Network File System (NFS). At production time, you will likely put the target filesystem, including the kernel and necessary utilities (for example, ls and pwd) into Flash memory. This enables a standalone boot, eliminating the need for Ethernet. OMAP platform. OMAP Starter Kit OSK5912. This board contains both an ARM926EJ-S processor and a TMS320C55x DSP.
The hardware connections shown in Figure 1 are as follows: JTAG Emulator (e.g. XDS510, XDS560, XDS510PP+). Connects the DSP to the PC running Windows for connection to Code Composer Studio. Ethernet cable. Connects the target board to the Linux file system. 9-pin null modem serial cable. Connects the GPP to the PC running a terminal emulator. 3. Software Requirements The following software should be installed on the platforms used for RF6: Windows Development/Debug Host. Microsoft Windows NT, 2000, or XP Code Composer Studio for OMAP v2.21 or greater A terminal emulator, for example Tera Term Pro 2.3 or greater. Tera Term is a freeware terminal emulation program with the ability to transfer files in binary format. It is available at http://hp.vector.co.jp/authors/va002416/teraterm.html. Red Hat Linux Development/Debug Host. Red Hat Linux version 7.3 or greater MontaVista Linux Professional v3.1 or Montavista Preview Kit for the OSK, which includes the Linux kernel, bootloader, etc. Network services such as telnetd, ftpd, and nfsd should be configured and available. DSP/BIOS Link v1.10.01 or greater The necessary header files or library components for the following software are supplied with RF6. However, for source-level debugging, we recommend that you download the full packages from TI DSPVillage. Driver Development Kit DDK v1.1 or greater Chip Support Library CSL v3.00.02 or greater DSP/BIOS Link v1.10.01 or greater MSGQ 1.01 or greater 4. DSP Development with Code Composer Studio and a JTAG Emulator The figure above shows the development environment for those that wish to use a JTAG emulator and Code Composer Studio for OMAP. Code Composer Studio is a full Windows based IDE for the C55x DSP with optimizing compilers, performance analysis tools and DSP/BIOS support. A JTAG emulator allows the debug tools to view the exact processor and memory state non-intrusively through an industry standard JTAG scan chain interface designed into the chips themselves. For ARM side Linux application development, industry standard GDB and DDD interfaces can be used via the Ethernet and serial ports found on the OSK5912. For a step by step guide on how to get started with building and debugging DSP code in this environment, please refer to the DSP Users Guide document located in the following directory on the OSK5912 CDROM: docs\osk5912_dspusersguide.pdf
5. Board Description OMAP Tm Starter Kit(OSK) The following is a block diagram of the OSK5912:
A full description of the board can be found in the OSK5912 Hardware Specification on the OSK5912 CD-ROM. The main features of the board are: OMAP5912 processor (192MHz ARM, 192MHz DSP) 32Mb Mobile DDR SDRAM 32Mb on-board Flash 10 Mbit Ethernet interface USB Host interface AIC23 stereo codec RS-232 serial port The board is powered from a +5V DC input using the included AC power adapter. The OMAP5912 uses a 12MHz oscillator as a clock input with internal operating frequencies generated by on-chip PLLs. JP3 is typically the only jumper a user will modify. The Flash memory is physically connected to CS3. When JP3 is in the 2-3 position (default), the OMAP5912 boots in fast boot mode where CS3 is swapped with CS0 so the Flash starts at address 0. When the processor starts running, it will execute the code in Flash (U-Boot is stored in Flash at the factory). If JP3 is in the 1-2 position, the OMAP5912 comes up in full boot mode with the internal ROM at address 0. The internal bootloader supports additional boot modes such as booting from the serial port. At any time, the state of the CS0-CS3 mapping can be changed by modifying the BM (bit 1) of the EMIFS_CONFIG register (address 0xFFFECC00). OMAP5912 Target Module
The TM will contain the OMAP5912 processor. In order to keep the cost down, it will have limited functionality. However, it still must provide a certain level of functionality to be useful to the Linux and Microsoft development community and customers. It will also be able to support other OSs as allowed by the OMAP5912 processor. The OSK creates an opportunity to use the DSP and add various external peripherals to the OMAP5912 processor. 5.1 Memory Map Covered in this section is the memory map of the 5912 TM. 5.1.1 Flash Memory Bus Memory Map Table 3 defines the Flash bus or EMIFS (Expansion Memory Interface Slow) memory map. It should be noted that the Compact Flash interface has an option in the design to move the address space to the CS2 region. This is the default location. Refer to the Compact Flash section for more detail. Table 3. Flash Bus Memory MAP The TM supports multiple configurations of NOR FLASH that can be loaded with various devices to create the different configurations. For more information on the different configurations refer to the Flash memory section in Section 5.4.
5.1.2 SDRAM Memory Map A single DDR SDRAM device is provided on the TM. Table 4 defines the memory map for the DDR SDRAM. The 32MB configuration is the default mode. Table 4. SDRAM Memory MAP