Comparison of 73F/36F and MX25L32xxD/xxE 1. Introduction This application note compares Macronix 75nm 32Mb 3V Serial NOR Flash 73F/36F with Macronix 110nm flash MX25L3235E and MX25L3206/8E and Macronix 150nm flash MX25L32xxD. Generally, the 73F/36F is backward compatible with the MX25L32xxD/xxE as it is pin and command compatible with the basic Read/Program/Erase commands. There may be some differences if special features are used such as using QPI commands, Write Protection, or CP programming. The comparison covers the general features, performance, command codes, and other differences. The document does not provide detailed information on individual devices, but highlights major differences. The information in this document is based on the latest datasheets listed in "8. Reference". Newer versions of the datasheets may override the contents of this document. 2. General Features Macronix 3V 32Mb Serial NOR Flash families have similar features and functions as shown in "Table 2-1. Key Features Comparison". Table 2-1. Key Features Comparison Part Name Technology 75nm 150nm 110nm 110nm Operation Temperature -40 C to 85 C -40 C to 85 C -40 C to 85 C -40C C to 85 C Voltage 2.65V - 3.6V 2.7V - 3.6V 2.7V - 3.6V 2.7V - 3.6V VI/O Supply -- MX25L3237D only -- -- Interface x1 / x2 / x4 x1 / x2 / x4 x1 / x2 x1 / x2 / x4 Page Program Size 256 bytes 256 bytes 256 bytes 256 bytes Sector Size 4KB 4KB 4KB 4KB Block Sizes 64KB and 32KB 64KB 64KB 64KB and 32KB SFDP Mode Yes -- Yes Yes Hold# Pin Yes Yes Yes Yes S/W Reset Yes Yes -- Yes Secured OTP Size 4K bit 4K bit 512 bit 4K bit BP Bit Block Protection TB, BP3 - BP0 BP3 - BP0 BP3 - BP0 TB, BP3 - BP0 Individual Volatile Blk Lock -- -- -- Yes Quad Enable (QE)=1 fixed MX25L3273F only -- -- MX25L3273E only QPI Mode -- -- -- MX25L3239E only Burst Read Mode Yes -- -- MX25L3239E only P/E Suspend/Resume Yes -- -- MX25L3239E only Continuous Pgm (CP) Mode -- Yes -- Yes Endurance (typ.) 100K cycles 100K cycles 100K cycles 100K cycles Data Retention (min) 20 years 20 years 20 years 20 years P/N: AN0325 1
3. Electrical Performance The 73F/36F is capable of similar or improved performance ("Table 3-1: Read Performance (Max. Clock Rate)" and "Table 3-2: Key Performance Comparison"). Table 3-1: Read Performance (Max. Clock Rate) Part Name Read 50MHz 33MHz 33MHz 50MHz Fast Read (x 1I/O) 133MHz 104MHz 86MHz 104MHz DREAD (1I/2O) 133MHz -- 80MHz 86MHz QREAD (1I/4O) 133MHz -- -- 86MHz 2READ(x2 I/O) 133MHz 75MHz -- 86MHz 4READ(x4 I/O) 133MHz 75MHz -- 104MHz Table 3-2: Key Performance Comparison Part Name Performance Typ. Max. Typ. Max. Typ. Max. Typ. Max. Program Time Write Status Register -- 40ms 40ms 100ms 5ms 40ms -- 40ms Page Program (tpp) 0.33ms 1.2ms 1.4ms 5ms 0.6ms 3ms 0.7ms 3ms 4KB Sector (tse) 25ms 200ms 60ms 300ms 40ms 200ms 30ms 200ms Erase Time 32KB Block (tbe32) 0.14s 0.6s NA NA NA NA 0.14s 1.6s 64KB Block (tbe64) 0.25s 1s 0.7s 2s 0.4s 2s 0.25s 2s tclqv Power Clock Low to Output Valid (@15pF) Standby Current (ISB1) Deep Power Down Current (ISB2) Read Current x1i/o (ICC1) Program Current (ICC2) Sector Erase Current (ICC4) -- 6ns -- 6ns -- 6ns -- 6ns 10uA 50uA -- 20uA 15uA 40uA 5uA 50uA 3uA 20uA -- 20uA 2uA 20uA 1uA 25uA -- 5mA (50MHz) -- 10mA (33MHz) -- 10mA (33MHz) -- 10mA (33MHz) -- 15mA -- 20mA -- 25mA -- 20mA -- 15mA -- 20mA -- 25mA -- 20mA P/N: AN0325 2
4. Command Set "Table 4-1. Command Set Table" shows basic Read, Program, and Erase commands are supported by the 73F/36F. Table 4-1. Command Set Table Part Number WREN Write Enable 06 h 06 h 06 h 06 h WRDI Write Disable 04 h 04 h 04 h 04 h WRSR Write Status/ Configuration 01 h 01 h 01 h 01 h Register RDSR Read Status Register 05 h 05 h 05 h 05 h RDCR Read Configuration Register 15 h -- -- 15 h RDID Read Identification 9F h 9F h 9F h 9F h READ Read Data 03 h 03 h 03 h 03 h FAST READ Fast Read Data 0B h 0B h 0B h 0B h DREAD Dual Output Read 3B h -- 3B h 3B h 2READ 2 I/O Fast Read BB h BB h -- BB h QREAD Quad Output Read 6B h -- -- 6B h 4READ 4 I/O Fast Read EB h EB h -- EB h W4READ 4 I/O Read with 4 dummy cycles -- -- -- E7 h Release Read Enhance FF h FF h -- FF h RDSFDP Read SFDP data 5A h -- 5A h 5A h RES Read Electronic ID AB h AB h AB h AB h REMS Read Mfr. ID and Device ID 90 h 90 h 90 h 90 h REMS2 Output ID for 2xI/O -- EF h -- EF h REMS4 Output ID for 4xI/O -- DF h -- DF h SE Sector Erase 20 h 20 h 20 h 20 h BE 64KB Block Erase D8 h D8 h 52 h or D8 h D8 h BE32K 32KB Block Erase 52 h -- -- 52 h CE Chip Erase 60 h or C7 h 60 h or C7 h 60 h or C7 h 60 h or C7 h PP Page Program 02 h 02 h 02 h 02 h CP 4PP Continuously Program Quad Page Program -- AD h -- AD h 38 h 38 h -- 38 h P/N: AN0325 3
Table 4-1: Command Set Table (Continued) RDSCUR WRSCUR Part Number read security register write security register 2B h 2B h 2B h 2B h 2F h 2F h 2F h 2F h ENSO enter secured OTP B1 h B1 h B1 h B1 h EXSO exit secured OTP C1 h C1 h C1 h C1 h Pgm/Ers Suspend Pgm/Ers Resume Program/Erase Suspend Program/Erase Resume 75 or B0 h -- -- 75 h 7A or 30 h -- -- 7A h DP Deep Power Down B9 h B9 h B9 h B9 h RDP Release from Deep Power Down AB h AB h AB h AB h RSTEN Reset Enable 66 h -- -- 66 h RST Reset Memory 99 h -- -- 99 h SBL Set Burst Length C0 or 77 h -- -- 77 h ESRY DSRY Enable SO to output RY/BY# Disable SO to output RY/BY# -- 70 h -- 70 h -- 80 h -- 80 h NOP No Operation 00 h -- -- 00 h EQIO Enter QPI -- -- -- 35 h RSTQIO Exit QPI -- -- -- F5 h QPIID ID read in QPI -- -- -- AF h SBLK Single Block Lock -- -- -- 36 h SBULK Single Block Unlock -- -- -- 39 h RDBLOCK Block Protect Read -- -- -- 3C h GBLK Gang Block Lock -- -- -- 7E h GBULK Gang Block Unlock -- -- -- 98 h WPSEL Write Protect Selection -- -- -- 68 h P/N: AN0325 4
5. Register Comparison APPLICATION NOTE The 73F/36F Status Register bits are backward compatible with the registers of the MX25L32xxD/E, with the exception of the MX25L3225D which has volatile bits which default with the memory array protected at power-up. Table 5-1. Status Register Bits Part No. 3225D**/3236D/3237D Bit [0] Write In Progress Bit Write In Progress Bit Write In Progress Bit Write In Progress Bit Bit [1] Write Enable Latch Write Enable Latch Write Enable Latch Write Enable Latch Bit [2] Block Protect : BP0 Block Protect : BP0 Block Protect : BP0 Block Protect : BP0 Bit [3] Block Protect : BP1 Block Protect : BP1 Block Protect : BP1 Block Protect : BP1 Bit [4] Block Protect : BP2 Block Protect : BP2 Block Protect : BP2 Block Protect : BP2 Bit [5] Block Protect : BP3 Block Protect : BP3 Block Protect : BP3 Block Protect : BP3 Bit [6] Quad Enable Quad Enable Reserved = 0 Quad Enable Bit [7] Status Register Write Protect Status Register Write Protect Status Register Write Protect Status Register Write Protect Note**: MX25L3225D has volatile Status Register Bits with BP bits which default in array protected at power-up. The 73F/36F Configuration Register bits are backward compatible with the registers of the MX25L323xE, with the exception bits 6 and 7 of the 3235E and 3233F which can be used to set the number of dummy cycles when executing a 4READ command. If the default number of dummy cycles is used, then this difference can be ignored. Table 5-2: Configuration Register Bits Part No. 3225D**/3236D/3237D Bit [0] ODS (Out Driver Strength) -- -- Reserved Bit [1] Reserved -- -- Reserved Bit [2] Reserved -- -- Reserved Bit [3] T/B (Top/Bottom Protect) -- -- T/B (Top/Bottom Protect) Bit [4] Reserved -- -- Reserved Bit [5] Reserved -- -- Reserved Bit [6] 2Read and 4READ DC (Dummy Cycles) -- -- Reserved Bit [7] Reserved -- -- 4READ DC (Dummy Cycles) Table 5-3: Security Register Bits Part No. 3225D**/3236D/3237D Bit [0] Secured OTP Indicator Bit Secured OTP Indicator Bit Secured OTP Indicator Bit Secured OTP Indicator Bit Bit [1] LDSO (Lock-down Status) LDSO (Lock-down Status) LDSO (Lock-down Status) LDSO (Lock-down Status) Bit [2] Program Suspend Reserved Reserved Reserved** Bit [3] Erase Suspend Reserved Reserved Reserved** Bit [4] Reserved Continuous Program Continuous Program Reserved Mode Mode Bit [5] P_FAIL; 1=Program fail Reserved Reserved P_FAIL; 1=Program fail Bit [6] E_FAIL; 1=Erase fail Reserved Reserved E_FAIL; 1=Erase fail Bit [7] Reserved Reserved Reserved WPSEL; 1=Individual WP Note**: MX25L3239E has Program/Erase Suspend Resume feature and bits 2 and 3 are same as MX25L3233F. P/N: AN0325 5
6. Data Protection 6-1. BP bit Block Protection All of the listed Macronix flash use BP bits to select groups of memory areas for write protection. The 73F and 39E/73E have the ability to write protect identical groups of blocks with the same BP bit settings. Most of the regions protected by the /08E/36F and MX25L32xxD can be protected by the MX25L3233F ("Table 6-1: Block Protection (BP) with T/B bit = 0"). Table 6-1: Block Protection (BP) with T/B bit = 0 Status Register Bit BP3 BP2 BP1 BP0 73F 39E/73E Protected Blocks MX25L3236F /08E 25D/36D/37D 0 0 0 0 None None 0 0 0 1 1 block (#63) 1 block (#63) 0 0 1 0 2 blocks (#63-62) 2 blocks (#63-62) 0 0 1 1 4 blocks (#63-60) 4 blocks (#63-60) 0 1 0 0 8 blocks (#63-56) 8 blocks (#63-56) 0 1 0 1 16 blocks (#63-48) 16 blocks (#63-48) 0 1 1 0 32 blocks (#63-32) 32 blocks (#63-32) 0 1 1 1 64 blocks (all) 64 blocks (all) 1 0 0 0 64 blocks (all) 64 blocks (all) 1 0 0 1 64 blocks (all) 32 blocks (#0-31) 1 0 1 0 64 blocks (all) 48 blocks (#0-47) 1 0 1 1 64 blocks (all) 56 blocks (#0-55) 1 1 0 0 64 blocks (all) 60 blocks (#0-59) 1 1 0 1 64 blocks (all) 62 blocks (#0-61) 1 1 1 0 64 blocks (all) 63 blocks (#0-62) 1 1 1 1 64 blocks (all) 64 blocks (all) 6-2. Individual Sector Protection The 39E/73E has the ability to protect individual 4KB and 64KB sectors and blocks of memory. The 73F/36F and /08E, MX25L32xxD do not support this feature. P/N: AN0325 6
7. Device Identification The RDID instruction is for reading the 1-byte Manufacturer ID followed by the 2-byte Device ID. The REMS instruction provides both the JEDEC assigned manufacturer ID and the specific Device ID. Table 7-1: ID Code Comparison Part Number MX25L3235E MX25L3273E MX25L3239E Manufacturer ID C2 h C2 h C2 h C2 h C2 h RDID Memory Type 20 h 5E h 20 h 20 h 25 h Memory Density 16 h 16 h 16 h 16 h 36 h REMS Manufacturer ID C2 h C2 h C2 h C2 h -- Device ID 15 h 5E h 15 h 15 h -- 8. Reference "Table 8-1. Datasheet Versions" shows the datasheet versions used for comparison in this application note. For the most current, detailed specification, please refer to the Macronix Website at http://www.macronix.com/ or contact Macronix sales. Table 8-1. Datasheet Versions Data sheet Location Date Issued Versions MX25L3233F Website October 2016 Rev. 1.3 MX25L3236F Website October 2016 Rev. 1.1 MX25L3273F Website October 2016 Rev. 1.1 MX25L3235D Website May 2011 Rev. 1.5 MX25L3225D Macronix August 2009 Rev. 1.0 MX25L3236D Website October 2009 Rev. 1.3 MX25L3237D Macronix July 2009 Rev. 1.0 Website December 2013 Rev. 1.5 Website November 2013 Rev. 1.2 MX25L3235E Website June 2014 Rev. 1.6 MX25L3239E Website November 2013 Rev. 1.3 MX25L3273E Website November 2013 Rev. 1.1 9. Summary Generally, the 73F/36F is backward compatible with the MX25L32xxD/xxE as it is pin and command compatible with the basic Read/Program/Erase commands. There may be some differences if special features are used such as using QPI commands, Write Protection, or CP programming. P/N: AN0325 7
10. Revision History Table 10-1. Revision History Revision No. Description Page Date Rev. 1 Initial Release ALL October 14, 2014 Rev. 2 Rev. 3 Rev. 4 1. Revised Secured OTP Size of 3273F. 2. Modified Table column highlights. 3. Updated MX25L3233F datasheet version. Modified the document title and added the datasheet version information of MX25L3273F Added MX25L3236F; Deleted Table "Package Comparison" 1,7 October 24, 2014 1,7 November 03, 2014 ALL October 13, 2016 P/N: AN0325 8
Except for customized products which have been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations; and Macronix as well as it s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright Macronix International Co., Ltd. 2014-2016. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit, Macronix NBit, elite-flash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vee, Macronix MAP, Rich Audio, Rich Book, Rich TV, and FitCAM. The names and brands of third party referred thereto (if any) are for identification purposes only. For the contact and order information, please visit Macronix s Web site at: http://www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. P/N: AN0325 9