Technical Note TN-FC-60: Refresh Features for e.mmc Automotive 5.1 Introduction Refresh Features for Micron e.mmc Automotive 5.1 Devices Introduction This technical note introduces the concept of data retention and its extension through data refresh, reports on a possible algorithm of manual scan and refresh and describes an additional data refresh feature available in Micron e.mmc automotive 5.1 devices built with Micron firmware. This data refresh feature enables further management of the REFRESH operation and is based on the JEDEC command CMD6, available in JESD84-B51. 1 Products and specifications discussed herein are subject to change by Micron without notice.
REFRESH Operation Table 1: Manual BKOPS Data retention is the length of time that the NAND storage media inside an e.mmc device retains data, with biased or unbiased conditions. Limited data retention makes memory device scanning and refresh essential. An inverse relationship exists between data retention and the PROGRAM/ERASE (P/E) cycles and temperature that affect a device over time. When either or both P/E cycles and temperature increase, data retention decreases, making a REFRESH operation necessary. A REFRESH operation is executed when a device read shows that the number of flip bits are greater than the ECC threshold for the given NAND technology. ECC is able to correct the errors; the corrected data is then copied into a new destination block. A RE- FRESH operation writes data into a new memory location. The e.mmc device firmware manages REFRESH on virtual blocks, which are a software grouping of physical blocks across the NAND die to take advantage of parallel WRITE operations. Virtual block size varies by device size, and the firmware is able to build a queue of the virtual blocks to be refreshed. Manual refresh is recommended when the e.mmc device provides information as shown in the table below. Manual refresh is managed through CMD6. Function Refresh is Required Prerequisite for e.mmc 5.1 Stimulate refresh via manual BKOPS BKOPS_START [164] TN-FC-60: Refresh Features for e.mmc Automotive 5.1 REFRESH Operation Device status, EXCEPTION_EVENT, bit 6 = 1 BKOPS_STATUS [246] = 3 Host sets BKOPS_EN [163] bit 0 = 1 to be informed about the refresh condition. Device status, EXCEPTION_EVENT (bit 6) becomes set when BKOPS_STATUS [246] >1; see JEDEC specification. Manual Scan and Refresh To extend the data retention of the entire memory, including portions where data not often read are stored, the manual scan and refresh can be directly managed by the host. This section describes the implementation of the manual scan and refresh algorithm, which is tailored to the application-specific requirements. This algorithm includes common e.mmc operations: READ to the e.mmc user area (to scan blocks). Check of the card status and/or BKOPS_STATUS [246] (to verify that refresh is required; see Prerequisite in Table 1). WRITE operations from normal use (or dummy on the user area) to trigger the refresh if needed. In addition, if BKOPS_AUTO is enabled (BKOPS_EN [163] bit 1 =1), the e.mmc performs the booked REFRESH operations while not servicing the host (bus idle times). The designed algorithm is executed periodically, considering as the refresh period the timeframe for the host to complete the user area scanning (for example, one year). The scanning is divided into several steps during this timeframe. Each step targets a range of LBAs and, consequently, affects all virtual blocks correlated to that LBA range. 2
REFRESH Operation Consecutive steps target contiguous ranges of LBAs. The host has the burden to save and update addresses. The size of the scan range influences the evolution of the algorithm. The larger the LBA range, the larger the number of virtual blocks involved in the scan that eventually will require the refresh. The queue of blocks booked for refresh is nonvolatile with power cycle when power-off notification is used, so that the refresh can be resumed. Note: Host porting the manual scan and refresh functionality from Micron e.mmc 5.0 to e.mmc 5.1 is required to implement the prerequisite listed in Table 1. Table 2: Manual Scan and Refresh Variables Defined in the Host Software Variable Last_Addr Refresh_Period Scan_Range Description Represents the last LBA checked by the host. Last_Addr is initialized = 0 and varies up to SEC_COUNT (ECSD [215:212]). Timeframe for user area to complete scanning. This value must be based on customer requirements. The complete scan is divided into several scans during Refresh_Period. Range of LBA to be read in each scan step. This range must be submultiples of SEC_COUNT. In this example, a possible value of Scan_Range is 128KB. 3
REFRESH Operation Figure 1: Manual Scan and Refresh Read Last_Addr from file No File exist? Yes Create file Write to file Last_Addr = 0 CMD18 (addr = Last_Addr, chunk = Scan_Range) READ_MULTIPLE_BLOCK CMD13 SEND_STATUS No Device status EXCEPTION_EVENT (Bit 6) set? Yes CMD8 SEND_EXT_CSD No BKOPS status = 3? Yes Write to File Last_Addr = Last_Addr + Scan_Range Exit No Last_Addr > SECT_COUNT? Yes Write to File Last_Addr = 0 Exit 4
Additional e.mmc Automotive 5.1 Refresh Feature An implementation of this algorithm is done with a bash script that is inside the emmcparm 3.0.1 package. The script is in the directory "/usr/refresh" named "./read_scan_refre.sh" and accepts as input option the following: 1. Device file to be refreshed ex. /dev/mmcblk0 2. Refresh_Period in hours 3. Debug option 1 print read data to terminal Is also possible to run the script in background as daemon using setsid: sudo setsid./ read_scan_refre.sh /dev/mmcblk1 1 >./log.log 2>&1 < /dev/null & In this case, a log file named log.log is produced; if no log file is needed, change "./ log.log" to "/dev/null". As a prerequisite, the host sets BKOPS_EN[163] bit 0 = 1 by sending # emmcparm -n The host can enable BKOPS_AUTO, BKOPS_EN [163] bit 1=1 by # emmcparm -c bkops_auto_enablement.csv The host can disable BKOPS_AUTO, BKOPS_EN [163] bit 1=0 by # emmcparm -c bkops_auto_disable.csv Additional e.mmc Automotive 5.1 Refresh Feature The additional e.mmc automotive 5.1 refresh feature, called self refresh, fully controls refresh management, even of data that is seldom read, and applies to all e.mmc partitions. It is an alternative to the manual scan and refresh described in the previous section. This feature acts on virtual blocks and requires the adoption of the POWER-OFF NOTIFICATION operation, as described in the JEDEC specification JESD84-B51. After self refresh is enabled and configured (OTP by CMD6), it is automatic and is executed during host idle time; the host can interrupt it through any command with short latency. Configurable Delay 1 is the start-up time during which self refresh is inhibited, the recommended value is 20s. Delay 1 starts from power-up/software reset/hardware reset. Configurable Delay 2 is the idle time (ms), after which the firmware starts the procedure (recommended 100ms). Self refresh is made of two macro operations: NAND array scan (all NAND valid pages) NAND blocks refresh (if a page is found to have an ECC over threshold). Host sets BKOPS_EN [163] bit 0 = 1 to be informed about the refresh condition. Device status, EXCEPTION_EVENT (bit 6) becomes set when BKOPS_STATUS [246] >1; see JEDEC specification. Self refresh is resumed at every power cycle unless real-time clock functionality (RTC) is used. RTC is described in JEDEC specification JESD84-B51. If the time information is provided through CMD49 (SET_TIME), only one complete scan is performed in 24H. If RTC is assumed to be used according to the configuration but the date is not provided within Delay 1, self refresh will not start within the current power cycle. 5
Additional e.mmc Automotive 5.1 Refresh Feature Self refresh is disabled in production state awareness (PSA) and suspended if CMD5 (sleep) is received during Delay 1. Self refresh is inhibited if there are commands in the CMD-Q queue. The following figure and table show the self refresh progression scheme and relevant parameters. Figure 2: Self Refresh Progression Scheme Host side Delay 1 Host Idle time Power-up Start-up Idle R/W self refresh If ABKOPS is enabled Device side Init Host operations Delay 2 Scan Refresh Scan 4MB 4MB Scan 4MB ABKOPS delay ABKOPS operations Autostby delay Auto standby Table 3: Self Refresh Dedicated Bytes in EXT_CSD Register Name EXT_CSD Byte Register Description Self refresh status 74 [0], R 0: Ongoing 1: Done Set when self refresh read scan of the whole memory has been completed and the related refresh requests have been satisfied; it is cleared by power cycles. Delay 1 72 [7:0], R/W Start-up time [s] during which the feature is inhibited. MAX value is 60s. Delay 2 73 [7:0], R/W Idle time [ms] after which firmware starts the procedure. MAX value is 10s; recommended 100ms. Self refresh ENA- BLE 71 [0], R/W 0: Self refresh is not enabled ECC THRESHOLD 71 [2:1], R/W Set to 2. 1: Self refresh is enabled RTC ENABLE 71 [3], R/W 0: RTC is not used Refresh status, percentage 0, 1, 3 = Reserved (R/W). Do not use. 1: RTC is used 80 [7:0],81 [7:0], R Percentage status of one loop is {ECSD[81]<<8 ECSD[80]} For example: 23.45% is reported like: EXT_CSD[80] = 0x29 EXT_CSD[81] = 0x09 Percentage value = (EXT_CSD[81]<<8 EXT_CSD[80]) = 0x0929 = 2345 23.45 Notes: 1. Delay = Base value Base unit. If host sets Delay 1 and Delay 2 >MAX values, firmware will clamp them to their the respective maximum values. Delay 1 can be 0. Firmware forces the value to 1ms. If Delay 2 = 0, then self refresh must be considered disabled. 2. Delay 1 and Delay 2 format Bits 7 6 5 4 3 2 1 0 Meaning Base value Base unit 6
Enabling Guideline Progression Information Base unit field: 0: 1ms 1: 10ms 2: 100ms 3: 1s 4/7: 10s TN-FC-60: Refresh Features for e.mmc Automotive 5.1 Additional e.mmc Automotive 5.1 Refresh Feature Self refresh enablement: RTC not used, CMD06(SWITCH) ARG:03470500 RTC used, CMD06(SWITCH) ARG:03470D00 Delay 1 set to 20s (example) CMD06(SWITCH) ARG:03482400 Delay 2 set to 100ms (value 100ms are required) CMD06(SWITCH) ARG:03491200 Self refresh information (stored in RAM) is flushed in NAND during synch point or when the array scan is completed. This information is available trough the Secure Smart Report (SSR). Refer to Micron technical note TN-FC-42 about how to retrieve and read it. Cumulative self refresh scan counter [0x50-0x51] reports how many self refresh loops have been completed during the life of the e.mmc. Last date saved [0x58-0x5F] is used only when RTC is enabled. Array scan progression [0xD4-0xD7]. The host can check the scan progression, defined as the total number of scanned LBA out of e.mmc size. 7
Linux Implementation Linux Implementation Using emmcparm to Enable Self Refresh To enable the self refresh feature with emmcparm, check in the "self_refresh_enablement.csv" csv file to determine whether all argument fields of CMD6 are needed: $ cat self_refresh_enablement.csv //opcode,arg,flags,write_flag,blksz,blocks,filename,is_acmd, data_timeout_ns,cmd_timeout_ms,postsleep_min_us,postsleep_max_ 13,0x010000,-0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 //RTC not used (commented in this example): //6,0x03470500,-0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 13,0x10000,-0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 //RTC Used (not commented in this example): 6,0x03470D00,-0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 13,0x10000,-0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 //Delay 1 (ex set to 20s): 6,0x03482400,-0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 13,0x10000,-0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 //Delay 2 (ex set to 100ms): 6,0x03491200,-0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 13,0x10000,-0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 //,this,is,the,last,line,do,not,press,<enter>,, To enable self refresh, run the command with root access and the "emmcparm" in the path: # emmcparm -c self_refresh_enablement.csv To set BKOPS_EN[163] bit 0 = 1 and be informed about the refresh condition during the self refresh progression, run the command in the path: # emmcparm -n Refresh progress can be monitored by reading EXT_CSD for the above command file: # emmcparm -I grep -i refresh REFRESH_PERCENTAGE[81-80]: 0x00 (equivalent to 0.00%) SELF REFRESH STATUS[74(0)]: 1 SELF REFRESH Delay2[73]: 0x12 SELF REFRESH Delay1[72]: 0x24 SELF REFRESH Enable[71(0)]: 1 SELF REFRESH RTC Enable[71(3)]: 1 8
Revision History Revision History Rev. A 05/18 Initial release 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-4000 www.micron.com/products/support Sales inquiries: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. 9