USER S MANUAL. Description. Key Features. References. Specifications. Ordering Information ISL9120IIA-EVZ. Evaluation Board User Guide

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USER S MANUAL ISL90IIx-EVZ Evaluation Board User Guide Description The ISL90 is a highly integrated buck-boost switching regulator for systems using new battery chemistries. It uses Intersil s proprietary buck-boost algorithm to maintain voltage regulation, while providing excellent efficiency and very low output voltage ripple when the input voltage is close to the output voltage. The ISL90IIx-EVZ platforms allow quick evaluation of the high performance features of the ISL90 buck-boost regulator series. Specifications The boards are designed to operate under the following conditions: Input voltage rating from.8v to 5.5V Resistor programmable output voltage on the ISL90IIA-EVZ Fixed.V output voltage on the ISL90IIN-EVZ Up to 800mA output current (V IN =.5V, V OUT =.V) Operating temperature range: -40 C to +85 C Key Features Small, compact design Jumper selectable (enabled/disabled) Jumper selectable (buck-boost/forced bypass) Connectors, test points and jumpers for easy probing References ISL90 Datasheet Ordering Information PART NUMBER DESCRIPTION UG0 Rev.00 ISL90IIN-EVZ Evaluation board for ISL90IINZ, fixed.v output ISL90IIA-EVZ Evaluation board for ISL90IIAZ, adjustable output ISL90IIAZ GND FB GND SGND FIGURE. ISL90IIA-EVZ BLOCK DIAGRAM UG0 Rev.00 Page of 7

Functional Description The ISL90IIx-EVZ evaluation boards provide simple platforms to demonstrate the features of the ISL90 buck-boost regulator. The ISL90IIN-EVZ is for the fixed.v output IC ISL90IINZ. The ISL90IIA-EVZ is for the adjustable output IC ISL90IIAZ. The evaluation boards have been functionally optimized for best performance of the ISL90 IC series. The input power and load connections are provided through multipin connectors for high current operations. The ISL90IIA-EVZ evaluation board schematic is shown in Figure 5, on page. The board s enable function is controlled by the on-board jumper header J. Similarly, the forced bypass function is controlled by the on-board jumper header J4. The schematic for the ISL90IIN-EVZ is shown in Figure 7. The PCB layout images for all layers are shown in Figures 8 and 9. The bill of materials for the ISL90IIA-EVZ is shown in Table on page 4. The bill of materials for the ISL90IIN-EVZ is shown in Table on page 5. Operating Range The V IN range of the boards is.8v to 5.5V. The V OUT range for the ISL90IIA-EVZ is V to 5V. The I OUT range of the boards is 0 to A. The operating ambient temperature range is -40 C to +85 C. Quick Start Guide For the ISL90IIA-EVZ board, the default output voltage is set at.v. Should other output voltages be desired, resistor R can be changed to set to a desired voltage as shown in Table (use a resistor with % accuracy). Refer to the following Quick Setup Guide to configure and power up the board for proper operation. During the power-on process, the expected waveforms are shown in Figures and. Quick Setup Guide. Install jumper on J, shorting to.. Install jumper on J4, shorting to GND.. Connect power supply to J, with voltage setting between.8v and 5.5V. 4. Connect electronic load to J. 5. Place scope probes on the V OUT test point and other test points of interest. 6. Turn on the power supply. 7. Monitor the output voltage start-up sequence on the scope. The waveforms will look similar to that shown in Figures and. 8. Turn on the electronic load. 9. Measure the output voltage with the voltmeter. The voltage should regulate within datasheet spec limits. TABLE. OUTPUT VOLTAGE PROGRAMMING For ISL90IIA-EVZ DESIRED OUTPUT VOLTAGE (V) (V/DIV) V OUT (V/DIV) I L (500mA/DIV) R RESISTOR VALUE (k ).0 4.5 88.7.0 68.. 60.4.4 57.6 4.0 46.4 4.5 40. 5.0 5.7 FIGURE. SOFT-START (V IN = V, V OUT =.V, NO LOAD) (V/DIV) V OUT (V/DIV) I L (500mA/DIV) 400µs/DIV 400µs/DIV FIGURE. SOFT-START (V IN = 4V, V OUT =.V, NO LOAD) UG0 Rev.00 Page of 7

Recommended PCB Layout Correct PCB layout is critical for proper operation of the ISL90. The input and output capacitors should be positioned as closely to the IC as possible. The ground connections of the input and output capacitors should be kept as short as possible and should be on the component layer to avoid problems that are caused by high switching currents flowing through PCB vias. FIGURE 4. ISL90IIA-EVZ EVALUATION BOARD FIGURE 5. ISL90IIA-EVZ EVALUATION BOARD SCHEMATIC UG0 Rev.00 Page of 7

ITEM# QTY TABLE. ISL90IIA-EVZ EVALUATION BOARD BILL OF MATERIALS REFERCE DESIGNATOR PART TYPE FOOTPRINT DESCRIPTION MANUFACTURER U ISL90IIAZ Wx.9E; WLCSP Intersil ISL90 Buck-boost Regulator with Adjustable Output Voltage L µh 0806 Power Inductor Toko DFE060R series,.7a (typ), 80mΩ (typ) INTERSIL TOKO C 50µF 0 Capacitor, Tantalum 4 C 0µF/6V/X5R 060 Capacitor, 5 C 47µF/6.V/X5R 060 Capacitor, 6 C4 pf 040 Capacitor, 7 R 87kΩ % 040 Resistor, 8 R 60.4kΩ % 040 Resistor, 9 R, R4 MΩ 5% 060 Resistor, 0 J, J HDR-6 HDR-6 Vert. Pin Header, 6-Pin, 0. Spacing, J, J4 HDR- HDR- Vert. Pin Header, -Pin, 0. Spacing, 4 TP, TP, TP, TP4 Terminal Pin 0.05" hole Test Point, Terminal Pin Turret 0.08" [0--00-80-00-00-07-0] MILL MAX MANUFACTURING CORP. FIGURE 6. ISL90IIN-EVZ EVALUATION BOARD UG0 Rev.00 Page 4 of 7

ISL90IIN-EVZ Evaluation Board Schematic J 4 5 6 C 50uF C 0uF A B A U ISL90_EVZ B SGND B FB A C C C L uh R 0 FB R DNP TP C4 DNP TP C 47uF TP 4 5 6 J TP4 GND R M R4 M J J4 FIGURE 7. ISL90IIN-EVZ EVALUATION BOARD SCHEMATIC ITEM# QTY TABLE. ISL90IIN-EVZ EVALUATION BOARD BILL OF MATERIALS REFERCE DESIGNATOR PART TYPE FOOTPRINT DESCRIPTION MANUFACTURER U ISL90IINZ, Wx.9E; WLCSP Intersil ISL90 Buck-Boost Regulator INTERSIL L µh 0806 Power Inductor Toko DFE060R series,.7a (typ), 80mΩ (typ) TOKO C 50µF 0 Capacitor, Tantalum 4 C 0µF/6V/X5R 060 Capacitor, 5 C 47µF/6..V/X5R 060 Capacitor, 6 C4 DNP 040 7 R 0Ω 040 Resistor, 8 R DNP 040 9 R, R4 MΩ 5% 060 Resistor, 0 J, J HDR-6 HDR-6 Vert. Pin Header, 6-Pin, 0. Spacing, J, J4 HDR- HDR- Vert. Pin Header, -Pin, 0. Spacing, 4 TP, TP, TP, TP4 Terminal Pin 0.05" hole Test Point, Terminal Pin Turret 0.08" [0--00-80-00-00-07-0] MILL MAX MANUFACTURING CORP. UG0 Rev.00 Page 5 of 7

PCB Layout FIGURE 8. TOP LAYER FIGURE 9. BOTTOM LAYER UG0 Rev.00 Page 6 of 7

Notice. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation or any other use of the circuits, software, and information in the design of your product or system. Renesas Electronics disclaims any and all liability for any losses and damages incurred by you or third parties arising from the use of these circuits, software, or information.. Renesas Electronics hereby expressly disclaims any warranties against and liability for infringement or any other claims involving patents, copyrights, or other intellectual property rights of third parties, by or arising from the use of Renesas Electronics products or technical information described in this document, including but not limited to, the product data, drawings, charts, programs, algorithms, and application examples.. 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