CS/COE 0447 Example Problems for Exam 2 Fall 2010

Similar documents
CS/COE 0447 Example Problems for Exam 2 Spring 2011

CS/COE0447: Computer Organization

CS/COE0447: Computer Organization

COMP 303 Computer Architecture Lecture 6

Rui Wang, Assistant professor Dept. of Information and Communication Tongji University.

Chapter 3 Arithmetic for Computers

Chapter 2A Instructions: Language of the Computer

October 24. Five Execution Steps

2B 52 AB CA 3E A1 +29 A B C. CS120 Fall 2018 Final Prep and super secret quiz 9

Week 7: Assignment Solutions

4. Write a sum-of-products representation of the following circuit. Y = (A + B + C) (A + B + C)

Computer Architecture Set Four. Arithmetic

Chapter 1. Computer Abstractions and Technology. Lesson 3: Understanding Performance

Lecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook)

ECE331: Hardware Organization and Design

CS3350B Computer Architecture

ECE260: Fundamentals of Computer Engineering

Integer Multiplication and Division

Chapter 3: Arithmetic for Computers

Addition and multiplication

Computer Organization and Structure. Bing-Yu Chen National Taiwan University

ECE 30 Introduction to Computer Engineering

ECE331: Hardware Organization and Design

We are quite familiar with adding two numbers in decimal

CS3350B Computer Architecture MIPS Introduction

Course Administration

Lecture 14: Recap. Today s topics: Recap for mid-term No electronic devices in midterm

Binary Adders: Half Adders and Full Adders

Homework 4 - Solutions (Floating point representation, Performance, Recursion and Stacks) Maximum points: 80 points

ECE 154A Introduction to. Fall 2012

MIPS Assembly Programming

Cache Organizations for Multi-cores

ECE260: Fundamentals of Computer Engineering

Format. 10 multiple choice 8 points each. 1 short answer 20 points. Same basic principals as the midterm

COMPUTER ORGANIZATION AND DESIGN

ECE 30 Introduction to Computer Engineering

Assembly Language Programming. CPSC 252 Computer Organization Ellen Walker, Hiram College

Lectures 3-4: MIPS instructions

2) Using the same instruction set for the TinyProc2, convert the following hex values to assembly language: x0f

The ALU consists of combinational logic. Processes all data in the CPU. ALL von Neuman machines have an ALU loop.

Combinational Circuits

Computer Architecture

CSCE 212: FINAL EXAM Spring 2009

Computer Hardware Engineering

LECTURE 4. Logic Design

CSE Lecture In Class Example Handout

Instructions: Language of the Computer

Arithmetic Logic Unit. Digital Computer Design

COMP 303 Computer Architecture Lecture 3. Comp 303 Computer Architecture

CPS 104 Computer Organization and Programming

Binary Arithmetic Intro to Assembly Language CS 64: Computer Organization and Design Logic Lecture #3

EE292: Fundamentals of ECE

Reduced Instruction Set Computer (RISC)

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine

ECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010

Reduced Instruction Set Computer (RISC)

McGill University Faculty of Engineering FINAL EXAMINATION Fall 2007 (DEC 2007)

CSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI.

Math 230 Assembly Programming (AKA Computer Organization) Spring 2008

Binary Values. CSE 410 Lecture 02

Chapter 3: part 3 Binary Subtraction

Introduction to the MIPS. Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University

Slide Set 1. for ENEL 339 Fall 2014 Lecture Section 02. Steve Norman, PhD, PEng

CS61C Machine Structures. Lecture 12 - MIPS Procedures II & Logical Ops. 2/13/2006 John Wawrzynek. www-inst.eecs.berkeley.

Lecture Topics. Announcements. Today: Integer Arithmetic (P&H ) Next: continued. Consulting hours. Introduction to Sim. Milestone #1 (due 1/26)

Course Administration

Part II Instruction-Set Architecture. Jan Computer Architecture, Instruction-Set Architecture Slide 1

Microcomputers. Outline. Number Systems and Digital Logic Review

CSE Lecture In Class Example Handout

EN164: Design of Computing Systems Lecture 09: Processor / ISA 2

CENG3420 Lecture 03 Review

ECE 2030D Computer Engineering Spring problems, 5 pages Exam Two 8 March 2012

CSCI 402: Computer Architectures

Lecture 10: Floating Point, Digital Design

ICS DEPARTMENT ICS 233 COMPUTER ARCHITECTURE & ASSEMBLY LANGUAGE. Midterm Exam. First Semester (141) Time: 1:00-3:30 PM. Student Name : _KEY

ECE260: Fundamentals of Computer Engineering

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA MIPS ISA. In a CPU. (vonneumann) Processor Organization

Review: MIPS Organization

Computer Architecture Chapter 3. Fall 2005 Department of Computer Science Kent State University

Instructions: MIPS ISA. Chapter 2 Instructions: Language of the Computer 1

Chapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes

Computer Organization and Components

CS61C Machine Structures. Lecture 13 - MIPS Instruction Representation I. 9/26/2007 John Wawrzynek. www-inst.eecs.berkeley.

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA

Computer Organization and Structure. Bing-Yu Chen National Taiwan University

/ : Computer Architecture and Design Fall 2014 Midterm Exam Solution

Do-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero

ELEC / Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2)

Slide Set 5. for ENCM 369 Winter 2014 Lecture Section 01. Steve Norman, PhD, PEng

Computer Architecture

Announcements HW1 is due on this Friday (Sept 12th) Appendix A is very helpful to HW1. Check out system calls

ECE 2035 Programming HW/SW Systems Fall problems, 7 pages Exam Two 23 October 2013

Merging datapaths: (add,lw, sw)

CARLETON UNIVERSITY. Laboratory 2.0

Computer Organization MIPS ISA

Problem 3: Theoretical Questions: Complete the midterm exam taken from a previous year attached at the end of the assignment.

Computer Organization EE 3755 Midterm Examination

UNCA CSCI 255 Exam 1 Spring February, This is a closed book and closed notes exam. It is to be turned in by 1:45 PM.

Computer Organization MIPS Architecture. Department of Computer Science Missouri University of Science & Technology

Patterson PII. Solutions

Transcription:

CS/COE 0447 Example Problems for Exam 2 Fall 2010 1. This time, consider a non-leaf function lisa. This function has no arugments or return value. The return address is on the stack at offset 12 and the activation record is 12 bytes. Give a sequence of three MIPS instructions that cause a function return. lw $ra,12($sp) # loads the return address addi $sp,$sp,12 # adjust the stack pointer to pop the activation frame jr $ra # do the return 2. Suppose the stack pointer ($sp) has the value 0xFF0000020 and the activation record has two halfword fields. Give a single instruction that will load the second field in the activation record into register $t0. lh $t0, 2($sp) # current $sp is the AR, 2nd field is in 2nd halfword For the next questions, consider the program code below (with line numbers): # assume $sp = 0xFFFF0020 0 li $s0,1 1 li $s1,2 2 jal _bart 3 j quit 4 _bart: addi $sp,$sp,-8 5 sw $s0,0($sp) 6 sw $ra,4($sp) 7 jal _homer 8 lw $ra,4($sp) 9 lw $s0,0($sp) 10 addi $sp,$sp,8 11 jr $ra 12 _homer: addi $sp,$sp,-4 13 sw $s1,0($sp) 14 addi $s1,$0,10 15 move $v0,$s1 16 lw $s1,0($sp) 17 addi $sp,$sp,4 18 jr $ra 19 quit:... 3. Give the value of $sp on each line from the code: Line 5: $sp s value is 0xFFFF0018 Line 8: $sp s value is 0xFFFF0018 Line 13: $sp s value is 0xFFFF0014 Line 19: $sp s value is 0xFFFF0020 1 of 6

4. Assume memory is all 0s. Fill in the table below to show the memory contents (as words) after the code above executes (i.e., when line 19 is reached): Address 0xFFFF0028 0xFFFF0024 Value at this Address 0xFFFF0020 (initial $sp before line 4) 0xFFFF001C address of line 3 (return addr) 0xFFFF0018 0x1 ($s0 stored here line 5) 0xFFFF0014 0x2 ($s1 stored here line 12) 0xFFFF0010 0xFFFF000C note: this solution corrects the error mentioned in class on 11/16/09. 5. Show the steps to multiply the 4-bit numbers 3 and 5 with the fast shift-add multipler. Use the table below. List the multiplicand (M) and product (P) in binary. In the field step, write ADD when the multiplicand is added. Write SHIFT to indicate when the product is shifted. In the iteration Start write the initial values for the mutiplicand and product. You may not need all steps (rows) in the table. Iter. Multiplicand (M) Product (P) Step Start 0011 0000 0101 set product=0s:r 1 0011 0011 0101 0001 1010 2 0011 0001 1010 0000 1101 3 0011 0011 1101 0001 1110 4 0011 0001 1110 0000 1111 5 NOT NEEDED lsb=1 => +M lsb=0 => +0 lsb=1 => +M lsb=0 => +0 6 NOT NEEDED 2 of 6

Iter. Multiplicand (M) Product (P) Step 7 NOT NEEDED 6. Show the steps to multiply an 6-bit number 17 and 3 with Booth s algorithm. Use the table below. List the multiplicand and product in binary. In the field step, write ADD, SUB, or NO OP to indicate which operation is done on each iteration. Iter. Multiplicand (M) Product (P) Step Start 010001 (negation is 101111) 000000 000011 0 set P, with pad bit 1 010001 101111 000011 0 110111 100001 1 2 010001 110111 100001 1 111011 110000 1 3 010001 001100 110000 1 000110 011000 0 4 010001 000110 011000 0 000011 001100 0 5 010001 000011 001100 0 000001 100110 0 6 010001 000001 100110 0 000000 110011 0 7 NOT NEEDED Final answer is: 000000 110011 lsbs=10: -M lsbs=11: +0 lsbs=01: +M lsbs=00: +0 lsbs=00: +0 lsbs=00: +0 N/A 7. Explain how the fast shift-add multiply improves over the original slow shift-add multiply. Be sure to indicate what hardware changes make the fast version faster than the slow version. combines registers, reduces size of ALU & does 3-steps in paralle. last two make it fast. 8. Suppose we want to do the computation S = A + B. A and B are positive 2 s complement 8-bit binary numbers. Give a boolean expression that indicates whether there was an overflow when these numbers are added. To represent a certain bit i in A, B or S, use A i, B i or S i. E.g., bit position 3 in A is A 3. Assume the bits are numbered 0 to 7 (right to left). overflow happens when input values have same sign but output has different one Overflow = (A 7 B 7 S 7 ) OR ( A 7 B 7 S7) 3 of 6

9. Give the negation in one s complement binary representation (5 bit numbers) for the decimal numbers: 5d Negation (in one s complement binary) 11010 10d Negation (in one s complement binary) 10101-15d Negation (in one s complement binary) 01111 10. Give the negation in two s complement binary representation (5 bits) for the decimal numbers: 11d Negation (in two s complement binary) 10101 15d Negation (in two s complement binary) 10001-13d Negation (in two s complement binary) 01101 11. Give Booth s encoding for the 8-bit numbers: -19d Booth s encoding 00-11 0-11-1-19 in two s comp: 1110 1101-19 in two s comp with 0 pad: 1110 1101 0 Booth s encoding: 00-11 0-11-1 check yourself: -2 5 +2 4-2 2 +2 1-2 0 = -32+16-4+2-1=-19 27d Booth s encoding 0010-110-1 27 in two s comp: 0001 1011 27 in two s comp with 0 pad: 0001 1011 0 Booth s encoding: 0010-110-1 check yourself: 2 5-2 3 +2 2-2 0 = 32-8 + 4-1 = 27 62d Booth s encoding 0100 00-10 62 in two s comp: 0011 1110 62 in two s comp with 0 pad: 0011 1110 0 Booth s encoding: 0100 00-10 check yourself: 2 6-2 1 = 62 12. Give two reasons to use Booth s algorithm (encoding) to improve the multiplication hardware. 1. it can reduce the number of addition operations 2. it handles signed multiplication 4 of 6

13. Floating point numbers represent a richer set of values than integer numbers. Nevertheless, processors support integer numbers and programs frequently use them. What primary advantage does integer numbers and operations offer over floating point numbers and operations? integer operations are significantly faster, programs frequently use discrete values thus, using integer for common operations/values offers a big performance benefit. 14. Using 1-bit adders, draw the circuit for a 4-bit ripple-carry addition unit. See book / class lecture slides. 15. Using 1-bit adders and 1-bit inverters (i.e., the not of a bit), draw a circuit for a 4-bit ripplecarry subtract unit. See book / class lecture slides (drawn on the board during class). 16. Consider the sum of products boolean equation: A BC + ABC + A B C. Give the truth table representation for this boolean equation. (A is NOT A and + is OR) This truth table has eight rows with three input values (A, B, C) and one output. Label the rows by counting in bianry from 0 to 7. Row 011 (i.e., where A=0, B=1, C=1) has a 1 in the output, row 111 has a 1 in the output, and 001 has a 1 in the output. All other output values are 0. 17. Suppose you want to design a hardware circuit that has two inputs A and B, and one output O. The output O has the value 1 when exactly one input (A/B) is a 1. Give the truth table for this circuit design. INPUTS OUTPUT A B O 0 0 0 0 1 1 1 0 1 1 1 0 (this is exclusive-or!) 18. For question 15, what is the boolean equation for the truth table? O = A B + AB 5 of 6

19. Here is a truth table. What is the boolean equation for O? INPUTS OUTPUT A B C O 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 0 O=A B C + A BC + AB C 20. Let s consider a 4-bit adder. If each 1-bit adder takes 2ns to compute an output (1-bit result and carry-out), how long does it take to compute the full 4-bit result? it takes 4 * 2ns = 8ns (Note: We ll have more to say about this soon.) 21. Consider problem 17 again. This time, let s compute the time for subtraction (A-B). Suppose the 1-bit inverter (used to complement the B input of each 1-bit adder) takes 1ns. How long does it take to compute an answer with this subtraction unit? (Be careful: Think about whether the invert operations can be done simultaneously.) it takes 1ns additional for the first invert (9ns total); the rest are done in parallel. 22. Suppose you have a program P. This program executes 1000 regular instructions, 100 floating point multiply instructions, and 5 floating point square root instructions. Assume a regular instruction takes 10ns, a floating point multiply takes 100ns and and floating point square root takes 1000ns. What is the total amount of time (in ns) that the program takes to execute (the execution time )? time = 1000*10ns + 100*100ns + 5*1000ns = 25000ns 23. Consider the program in question 18. Let s suppose we can improve the floating-point multiply to take 80ns or we can improve the floating-point square root to take 800ns. We cannot do both improvements. Compute the execution time with both improvements. Which improvement would you do? timea = 1000*10ns + 100*80ns + 5*1000ns = 23000ns timeb = 1000*10ns + 100*100ns + 5*800ns = 24000ns the first choice is actually faster, so I d pick this one, assuming costs are the same. 24. Now, consider the fastest improvement from 19 and the original situation from problem 18. What is the speedup of the improvement versus the original case? speedup = slow/fast = 25000ns/23000ns = 1.09 speedup 6 of 6