Instruction Set Architecture (ISA) Data Types

Similar documents
Instruction Set Architectures

Registers. Ray Seyfarth. September 8, Bit Intel Assembly Language c 2011 Ray Seyfarth

Assembly Language Each statement in an assembly language program consists of four parts or fields.

Computer Processors. Part 2. Components of a Processor. Execution Unit The ALU. Execution Unit. The Brains of the Box. Processors. Execution Unit (EU)

Credits and Disclaimers

Binghamton University. CS-220 Spring x86 Assembler. Computer Systems: Sections

Lecture 15 Intel Manual, Vol. 1, Chapter 3. Fri, Mar 6, Hampden-Sydney College. The x86 Architecture. Robb T. Koether. Overview of the x86

Assembly I: Basic Operations. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University

The x86 Architecture

Lecture (02) The Microprocessor and Its Architecture By: Dr. Ahmed ElShafee

UMBC. A register, an immediate or a memory address holding the values on. Stores a symbolic name for the memory location that it represents.

CS 16: Assembly Language Programming for the IBM PC and Compatibles

Instruction Set Architectures

Addressing Modes on the x86

Introduction to Machine/Assembler Language

The von Neumann Machine

Advanced Microprocessors

x86 Programming I CSE 351 Winter

Credits and Disclaimers

The von Neumann Machine

MODE (mod) FIELD CODES. mod MEMORY MODE: 8-BIT DISPLACEMENT MEMORY MODE: 16- OR 32- BIT DISPLACEMENT REGISTER MODE

CSE351 Spring 2018, Midterm Exam April 27, 2018

RISC I from Berkeley. 44k Transistors 1Mhz 77mm^2

MACHINE-LEVEL PROGRAMMING I: BASICS COMPUTER ARCHITECTURE AND ORGANIZATION

6/20/2011. Introduction. Chapter Objectives Upon completion of this chapter, you will be able to:

6/17/2011. Introduction. Chapter Objectives Upon completion of this chapter, you will be able to:

UNIT 2 PROCESSORS ORGANIZATION CONT.

Chapter 2: The Microprocessor and its Architecture

The Microprocessor and its Architecture

EEM336 Microprocessors I. The Microprocessor and Its Architecture

x86 64 Programming I CSE 351 Autumn 2018 Instructor: Justin Hsia

EEM336 Microprocessors I. Addressing Modes

We can study computer architectures by starting with the basic building blocks. Adders, decoders, multiplexors, flip-flops, registers,...

Module 3 Instruction Set Architecture (ISA)

EXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM

Reverse Engineering II: The Basics

Reverse Engineering II: Basics. Gergely Erdélyi Senior Antivirus Researcher

x86 Programming I CSE 351 Autumn 2016 Instructor: Justin Hsia

Machine/Assembler Language Putting It All Together

15-213/ Final Exam Notes Sheet Spring 2013!

CS Bootcamp x86-64 Autumn 2015

Introduction to IA-32. Jo, Heeseung

INTRODUCTION TO IA-32. Jo, Heeseung

X86 Addressing Modes Chapter 3" Review: Instructions to Recognize"

Hardware and Software Architecture. Chapter 2

CS 31: Intro to Systems ISAs and Assembly. Martin Gagné Swarthmore College February 7, 2017

CS165 Computer Security. Understanding low-level program execution Oct 1 st, 2015

CMSC Lecture 03. UMBC, CMSC313, Richard Chang

Microprocessor (COM 9323)

Interfacing Compiler and Hardware. Computer Systems Architecture. Processor Types And Instruction Sets. What Instructions Should A Processor Offer?

Today: Machine Programming I: Basics

Instruction Set Architectures

Function Calls and Stack

CS 261 Fall Machine and Assembly Code. Data Movement and Arithmetic. Mike Lam, Professor

Moodle WILLINGDON COLLEGE SANGLI (B. SC.-II) Digital Electronics

The x86 Architecture. ICS312 - Spring 2018 Machine-Level and Systems Programming. Henri Casanova

Complex Instruction Set Computer (CISC)

Today: Machine Programming I: Basics. Machine Level Programming I: Basics. Intel x86 Processors. Intel x86 Evolution: Milestones

Assembly Language Programming Introduction

1. Introduction to Assembly Language

Lecture 3: Instruction Set Architecture

How Software Executes

Code segment Stack segment

Access. Young W. Lim Fri. Young W. Lim Access Fri 1 / 18

CS241 Computer Organization Spring 2015 IA

Reverse Engineering II: The Basics

CHAPTER 3 BASIC EXECUTION ENVIRONMENT

A4 Sample Solution Ch3

Computer Architecture and System Programming Laboratory. TA Session 3

Assembly Language for Intel-Based Computers, 4 th Edition. Chapter 2: IA-32 Processor Architecture Included elements of the IA-64 bit

CSE2421 FINAL EXAM SPRING Name KEY. Instructions: Signature

C to Assembly SPEED LIMIT LECTURE Performance Engineering of Software Systems. I-Ting Angelina Lee. September 13, 2012

Access. Young W. Lim Sat. Young W. Lim Access Sat 1 / 19

Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions.

CS 31: Intro to Systems ISAs and Assembly. Kevin Webb Swarthmore College February 9, 2016

MACHINE-LEVEL PROGRAMMING I: BASICS

CSE 351 Midterm Exam

CS 31: Intro to Systems ISAs and Assembly. Kevin Webb Swarthmore College September 25, 2018

CMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING LECTURE 03, SPRING 2013

CS241 Computer Organization Spring Introduction to Assembly

The Instruction Set. Chapter 5

Assembly level Programming. 198:211 Computer Architecture. (recall) Von Neumann Architecture. Simplified hardware view. Lecture 10 Fall 2012

Machine Level Programming I: Basics

LAB 5 Arithmetic Operations Simple Calculator

Carnegie Mellon. 5 th Lecture, Jan. 31, Instructors: Todd C. Mowry & Anthony Rowe

Machine Program: Procedure. Zhaoguo Wang

Rev101. spritzers - CTF team. spritz.math.unipd.it/spritzers.html

Meet & Greet! Come hang out with your TAs and Fellow Students (& eat free insomnia cookies) When : TODAY!! 5-6 pm Where : 3rd Floor Atrium, CIT

Turning C into Object Code Code in files p1.c p2.c Compile with command: gcc -O p1.c p2.c -o p Use optimizations (-O) Put resulting binary in file p

CSC 2400: Computer Systems. Towards the Hardware: Machine-Level Representation of Programs

Machine-level Representation of Programs. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University

Lab 2: Introduction to Assembly Language Programming

Assembly Language Programming 64-bit environments

Basic Execution Environment

The Hardware/Software Interface CSE351 Spring 2013

CS24: INTRODUCTION TO COMPUTING SYSTEMS. Spring 2018 Lecture 4

Lecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit

Microcomputer Architecture..Second Year (Sem.2).Lecture(2) مدرس المادة : م. سندس العزاوي... قسم / الحاسبات

CSC 8400: Computer Systems. Machine-Level Representation of Programs

Lecture 4 CIS 341: COMPILERS

Transcription:

Instruction Set Architecture (ISA) Data Types Computer Systems: Section 4.1

Suppose you built a computer What Building Blocks would you use?

Arithmetic Logic Unit (ALU) OP1 OP2 OPERATION ALU RES

Full Adder SUM = A B C CarryOut = A B + A CarryIn + B CarryIn

Shifters

Hardware (Gate) Implementation 8 bit bitwise AND

Arithmetic Logic Unit (ALU) OP2 OP1 ALU BITWISE AND OPCODE RES

Computer Architecture Wikipedia a set of rules and methods that describe the functionality, organization, and implementation of computer systems the capabilities and programming model of a computer but not a particular implementation We will study the x86 architecture. Part of the architecture defines what type of data the hardware can operate on.

X86 Data Types Byte - 8 bit binary or ASCII character Word - 16 bit binary Double Word - 32 bit binary Quad Word - 64 bit binary 32, 64, or 128 bit floating point

ALU + Registers R0: 0x0000 00F0 R1: 0x0000 00F1 R2: 0xFFFF FFFF R3: OPERATION ALU

X86 Integer Registers 8+ 64 bit Registers Fast Read/Write (CPU Speed) No explicit data type! Values undefined (X) until set Register Names based on Historic Usage Naming conventions used to access portions of registers

x86 Integer Registers 64 32 16 8 Origin %rax %eax %ax %ah %al Accumulate %rcx %ecx %cx %ch %cl Counter %rdx %edx %dx %dh %dl Data %rbx %ebx %bx %bh %bl Base %rsi %esi %si Source Index %rdi %edi %di Destination Index %rsp %esp %sp Stack Pointer %rbp %ebp %bp base Pointer

ALU + Registers + Memory R0: 0x0000 00F0 R1: 0x0000 00F1 R2: 0xFFFF FFFF R3: 0x0000 00F0 0x0000 00F1 0xFFFF FFFF OP ALU

Computer vs. Adding Machine What is the difference?

ALU+Registers+Memory+Instructions R0: 0x0000 00F0 R1: 0x0000 00F1 R2: 0xFFFF FFFF R3: 0x0000 00F0 0x0000 00F1 0xFFFF FFFF ALU CONTROL UNIT

ISA Contents The data types the instructions can work on two s complement binary, ascii character, unsigned binary, etc. The instructions the hardware recognizes add, move, get, The data the instructions can work on Registers Memory The external interfaces supported by the instructions File I/O Exception Handling and Interrupts Software ISA

Abstraction Bits are stored in memory from most significant at left to least significant at right (int 100,000 = 0x0001 86A0) 2 31 2 30 2 29 2 28 2 27 2 26 2 25 2 24 2 23 2 22 2 21 2 20 2 19 2 18 2 17 2 16 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 1 0 1 0 0 0 0 0 0 0 0 1 8 6 A 0 Byte m Byte m+1 Byte m+2 Byte m+3

Leaky Abstraction Endian -ness Some machines store as expected (Big endian) S 2 30 2 29 2 28 2 27 2 26 2 25 2 24 2 23 2 22 2 21 2 20 2 19 2 18 2 17 2 16 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 b 31 b 30 b 29 b 28 b 27 b 26 b 25 b 24 b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 1 0 1 0 0 0 0 0 0 0 0 1 8 6 A 0 Byte 42 Byte 43 Byte 44 Byte 45 Some machines store least significant byte first! (Little-endian) 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 23 2 22 2 21 2 20 2 19 2 18 2 17 2 16 S 2 30 2 29 2 28 2 27 2 26 2 25 2 24 b 31 b 30 b 29 b 28 b 27 b 26 b 25 b 24 b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 1 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 A 0 8 6 0 1 0 0 Byte 42 Byte 43 Byte 44 Byte 45

Why Little Endian? Casting: int x; /* 32 bits starting at byte 42 */ y = (short int) x; /* Put the least significant 16 bits from x into y */ Big Endian 00 01 86 A0 42 43 44 45 x (short int) x Little Endian A0 86 01 00 42 43 44 45 x (short int) x

Full Adder SUM = A B CarryIn CarryOut = A&B A&CarryIn B&CarryIn

Eight Bit Adder CI OP1 RESULT OP2 CO

Big Endian vs. Little Endian Adder

When does Endian-ness Leak? Only on multi-byte data types (short, int, long, float, double) Only when we look at the underlying bits Big-endian machine: First byte is the most significant byte Everything works until we get binary data from a little-endian machine Little-endian machine: First byte is the least significant byte When hardware interprets the bits/bytes as a number, bytes are switched We don t even know if a machine is big-endian or little-endian! Until: we get binary data from a big-endian machine OR Until we look at the bit representation of the data, not treated as a number

Managing Endian-Ness Network standard is big-endian stdlib functions machine representation network (big-endian) representation htons (short), htonl (long) Network representation (big-endian) machine representation ntohs (short), ntohl (long) No-ops when hardware is big-endian endian.h functions htobe16, htobe32, htobe64, htole16, htole32, htole64 be16toh, be32toh, be64toh, le16toh, le32toh, le64toh See xmp_endian/network.c

Endian-ness in this Course LDAP machines are little-endian When you put binary data in a file, you must enter numbers in little-endian format! When you print memory from gdb (use the x examine command), if you specify byte output formats, data will appear little endian. (When you specify multi-byte numeric output formats, the hardware switches the bytes for you.) If you make a union of byte-data and multi-byte formats, the byte data will show endian-ness Otherwise, everything looks like big-endian!