Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions.

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8086 Microprocessor

Microprocessor Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions. It is used as CPU (Central Processing Unit) in computers. 2

Microprocessor Fifth Generation Pentium Third Generation During 1978 HMOS technology Faster speed, Higher packing density 16 bit processors 40/ 48/ 64 pins Easier to program Dynamically relatable programs Processor has multiply/ divide arithmetic hardware More powerful interrupt handling capabilities Flexible I/O port addressing Intel 8086 (16 bit processor) First Generation Between 1971 1973 PMOS technology, non compatible with TTL 4 bit processors 16 pins 8 and 16 bit processors 40 pins Due to limitations of pins, signals are multiplexed Fourth Generation During 1980s Low power version of HMOS technology (HCMOS) 32 bit processors Physical memory space 2 24 bytes = 16 Mb Virtual memory space 2 40 bytes = 1 Tb Floating point hardware Supports increased number of addressing modes Intel 80386 Second Generation During 1973 NMOS technology Faster speed, Higher density, Compatible with TTL 4 / 8/ 16 bit processors 40 pins Ability to address large memory spaces and I/O ports Greater number of levels of subroutine nesting Better interrupt handling capabilities Intel 8085 (8 bit processor) 3

Features: It requires a single +5V supply It is a 16 bit processor It can access a memory of 1MB(2^20) It can generate 16 bit I/O address hence it can access 2^16=65536 I/O ports It is possible to perform bit, byte, word and block operations The Intel 8086 is designed to operate in two modes namely minimum mode and maximum mode The Intel 8086 supports multiprogramming The words will be stored ion two memory locations. If the first byte of word is at an even address, the 8086 will read the entire word in one operation. If the first byte of word is at odd address, the 8086 will read the first byte in one operation and the second byte in another operation 4

Architecture of 8086 The architecture of 8086 includes Arithmetic Logic Unit (ALU) Flags General registers Instruction byte queue Segment registers

6

EU & BIU

CPU Set General Control Segment Data Index Pointer Code Segment (CS) Data Segment (DS) Extra Segment (ES) Stack Segment (SS) 15 AH BH CH DH 8 7 AL BL CL DL 0 Stack Pointer (SP) Base Pointer (BP) Source Index (SI) Destination Index (DI) 8

s AX AL AH BP BX CX CL DX SP SI & DI Operation Word multiplication and division, word I/O Byte multiplication and division, Byte I/O, Translation, Decimal Arithmetic Operations Byte multiplication and division Enter, Leave 80186 or 80286 onwards Translation and Base register String Operation and Counter Variable shift and rotate Word multiplication and division Stack Operation String Operation 9

Microprocessor Functional blocks Computational Unit; performs arithmetic and logic operations Various conditions of the results are stored as status bits called flags in flag register Internal storage of data ALU Flag Timing and control unit array or internal memory Instruction decoding unit PC/ IP Data Bus Generates the address of the instructions to be fetched from the memory and send through address bus to the memory Control Bus Address Bus Generates control signals for internal and external operations of the microprocessor Decodes instructions; sends information to the timing and control unit 10

8086 Microprocessor Overview First 16- bit processor released by INTEL in the year 1978 Originally HMOS, now manufactured using HMOS III technique Approximately 29, 000 transistors, 40 pin DIP, 5V supply Does not have internal clock; external asymmetric clock source with 33% duty cycle 20-bit address to access memory can address up to 2 20 = 1 megabytes of memory space. 11

Pins and signals

8086 Microprocessor Pins and Signals Common signals AD 0 -AD 15 (Bidirectional) Address/Data bus Low order address bus; these are multiplexed with data. When AD lines are used to transmit memory address the symbol A is used instead of AD, for example A 0 -A 15. When data are transmitted over AD lines the symbol D is used in place of AD, for example D 0 -D 7, D 8 -D 15 or D 0 -D 15. A 16 /S 3, A 17 /S 4, A 18 /S 5, A 19 /S 6 High order address bus. These are multiplexed with status signals 13